ST VIPer53EDIP - E, VIPer53ESP - E User Manual

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Features

■ Switching frequency up to 300kHz

■ Current mode control with adjustable limitation

■ Soft start and shut-down control

■ Automatic burst mode in standby condition

(“Blue Angel“ compliant )

■ Undervoltage lockout with Hysteresis

■ Integrated start-up current source

■ Over-temperature protection

■ Overload and short-circuit control

■ Overvoltage protection

■ In compliance with the 2002/95/EC European

Directive

Description

The VIPer53E combines an enhanced current
mode PWM controller with a high voltage
MDMesh Power MOSFET in the same package.

Block diagram

VIPer53EDIP - E

VIPer53ESP - E

OFF-line Primary Switch

DIP-8PowerSO-10

Typical applications cover offline power supplies
with a secondary power capability ranging u p to
30W in wide range input voltage, or 50W in single
European voltage range an d DIP-8 package and
40W in wide range input voltage, or 65W in single
European voltage range and PowerSO-10
package, with the following benefits:

– O verload and short -circuit events

controlled by feedback monitoring and
delayed device reset;

– Efficient standby mode by enhanced pulse

skipping.

– Int egrated start-up current source is

disabled during normal operation to reduce
the input power.

OSC DRAIN

ON/OFF

OSCILLATOR

PWM

LATCH

R1
R2

S

FF

R3 R4 R5

BLANKING TIME

150/400ns

BLANKING

SELECTION

PWM

COMPARATOR

STANDBY

COMPARATOR

OVERLOAD

COMPARATOR

Q

1V

0.5V

4.4V

0.5V

H

COMP

CURRENT

AMPLIFIER

Vcc

I

COMP

4.5V

COMP SOURCE

VDD

8.4/

11.5V

18V

UVLO

COMPARATOR

125k

OVERVOLTAGE

COMPARATOR

8V

TOVL

4V

OVERTEMP.

DETECTOR

January 2006 DocRev1 1/31

www.st.com

31

Contents VIPer53EDIP - E / VIPer53ESP - E

Contents

1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Pin connections and function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 Rectangular U-I Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Secondary Feedback Configuration Example . . . . . . . . . . . . . . . . . . . . 9

6 Current Mode Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

7 Sta ndby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

8 High Voltage Start-up Current Source . . . . . . . . . . . . . . . . . . . . . . . . . . 13

9 Short-Circuit and Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . 15

10 Regulation Loop Stability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

11 Special Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

12 Software Implementation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

13 Operation pictures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

14 Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

15 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

2/31 DocRev1

VIPer53EDIP - E / VIPer53ESP - E Electrical data

1 Electrical data

1.1 Maximum rating

Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability . Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.

Table 1. Absolute maximum rating

Symbol Parameter Value Unit

V

V

V

OSC

I

COMP

I

TOVL

Continuous Drain Source Voltage (TJ= 25 ... 125°C)

DS

I

Continuous Drain Curr ent Internally limited A

D

Supply Voltage 0 ... 19 V

DD

OSC Input Voltage Range

COMP and TOVL Input Current Range

Electrost atic Discharge:

V

ESD

Machine Model (R = 0Ω; C = 200pF)
Charged Device Model

T
T

T

STG

1. In order to improve the ruggedness of the device versus eventual drain overvoltages, a resistance of 1kΩ
should be inserted in series with the TOVL pin.\

Junction Operating Temperature Internally li m ited °C

J

Case Operating Temperature -40 to 150 °C

C

St orage Temperature -55 to 150 °C

1.2 Thermal data

Tabl e 2. Thermal data

Symbol Parameter

(1)

(1)

PowerSO-10

-0.3 ... 62 0 V

0 ... V

DD

-2 ... 2 mA

200

1.5

(1)

DIP-8

(2)

V

V

kV

Unit

R
R

1. When mounted on a standard single-sided FR4 board with 50mm² of Cu (at least 35 mm thick) connected
to the DRAIN pin.

2. When mounted on a standard single-sided FR4 board with 50mm² of Cu (at least 35 mm thick) connected
to the device tab.

Thermal Resistance Junction-case Max 2 20 °C/W

thJC

Thermal Resistance Ambient-case Max 60 80 °C/W

thJA

DocRev1 3/31

Electrical characteristics VIPer53EDIP - E / VIPer53ESP - E

2 Electrical characteristics

TJ = 25°C, V

= 13V, unless otherwise specified

DD

Tabl e 3. Power section

Symbol Parameter Test conditions Min. Typ. Max. Unit

BV

I

DSS

R

DS(on)

C

C

1. On clamped inductive load

2. This parameter can be used to compute the energy dissipated at turn on E
to source voltage V

Drain-Source

DSS

Voltage
Off State Dr ain

Current

Static Drain-Source
On St ate Resistance

t

Fall Time

fv

t

Rise Time

rv

Drain Capacitance

oss

Effecti ve Output

Eon

Capacitance

and the following formula:

DSon

I

= 1mA; V

D

V

= 500V; V

DS

I

= 1A; V

D

T

= 25°C

J

= 100°C

T

J

I

= 0.2A; V

D

I

= 1A; V

D

V

= 25V

DS

200V < V

E

ton

1

⋅⋅⋅=

-- - C

2

COMP

COMP

IN

= 300V

IN

DSon

Eon

= 0V

= 0V; Tj = 125°C

COMP

= 4.5V; V

= 300V

(1)

(1)

< 400V

2

300

= 0V

TOVL

(2)

DSon

300

1.5

V

⎛⎞

----------------

⎝⎠

620 V

150 µA

0.9 1

1.7

100 ns

50 ns

170 pF

60 pF

accord ing to the initial drain

ton

Ω

Ω

Tabl e 4. Oscillator Section

Symbol Parame ter T est Conditions Min. T yp. Max. Unit

R

F

OSC1

F

OSC2

V

OSChi

V

OSClo

Oscillator Frequency
Initial Ac cu r ac y

Oscillator Frequency
Total Variation

Oscillator Peak
Voltage

Oscill ato r Valley
Voltage

4/31 DocRev1

= 8kΩ; CT = 2.2nF

T

Figure 15 on page 23

R

= 8kΩ; CT = 2.2nF

T

Figure 17 on page 24

= V

V

DD

T

= 0 ... 100°C

J

DDon

... V

DDovp

95 100 105 kHz

;

93 100 107 kHz

9V

4V

VIPer53EDIP - E / VIPer53ESP - E Electrical characteristics

Table 5. Supply Section

Symbol Parameter T est Conditions Min. Typ. Max. Unit

V

DSstart

I

DDch1

I

DDch2

I

DDchoff

I

DD0

I

DD1

V

DDoff

V

DDonVDD

V

DDhyst

V

DDovp

Drain Voltage Star ting
Threshold

Startup Charging Current

Startup Charging Current
Startup Charging Current

in Thermal Shutdown
Operating Suppl y Current

Not Switc h in g
Operating Suppl y Current

Switching
V

Undervoltage

DD

Shutdown Threshol d

Startup Threshold

VDD Threshold
Hysteresis

V

Overvoltage

DD

Shutdown Threshol d

V

= 5V; I

DD

= 0 ... 5V; V

V

DD

Figure 9 on page 22

V

= 10V; V

DD

V

= 5V; V

DD

> TSD - T

T

J

= 0kHz; V

F

sw

=100kHz

F

sw

= 0mA

DD

= 100V

DS

= 100VFigure 9.

DS

= 100VFigure 11.

DS

HYST

= 0V

COMP

34 50 V

-12 mA

-2 mA

0mA

811mA

9mA

Figure 9 on page 22 7.5 8.4 9.3 V

Figure 9. 10.2 11.5 12.8 V

Figure 9. 2.6 3.1 V

Figure 9. 17 18 19 V

Table 6. Pwm Comparator Section

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

= 1 ... 4 V Figure 14.

H

COMP

V

COMPosVCOMP

I

Dlim

I

Dmax

V

COMPbl

t
t

t

ONmin1

∆V

Peak Drain Current
Limitation

Drain Current
Capability

Current Sense Delay

t

d

to Turn-Off
V

COMP

Change Threshold
Blanking Ti m e V

b1

Blanking Ti m e V

b2

Minimum On Time V

/ ∆I

COMP

DPEAK

Off set

Blanking Ti me

COMP

/dt = 0 1.7 2 2.3 V/A

dI

D

dI

/dt = 0 Figure 14. 0.5 V

D

I

= 0mA; V

COMP

Figure 14.

dI

/dt = 0

D

V

= V

COMP

/dt = 0 1.6 1.9 2.3 A

dI

D

I

= 1A 250 ns

D

COMPovl

TOVL

; V

= 0V

= 0V

TOVL

1.7 2 2.3 A

Figure 10 on page 22 1V

COMP

COMP

COMP

< V
> V
< V

COMPBL

COMPBL

COMPBL

Figure 10. 300 400 500 ns
Figure 10. 100 150 200 ns

450 600 750 ns

DocRev1 5/31

Electrical characteristics VIPer53EDIP - E / VIPer53ESP - E

Table 6. Pwm Comparator Section

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

ONmin2

V

COMPoff

V

COMPhi

I

COMP

1. In order to ensure a correct stability of the internal current source, a 10nF capacitor (minimum value 8nF)
should always be present on the COMP pin.

Minimum On Time V
V

Shutdown

COMP

Threshold

V

High Level

COMP

COMP Pull Up Current V

COMP

> V

COMPBL

250 350 450 ns

Figure 13 on page 23 0.5 V

I

COMP

COMP

(1)

=0mA

4.5 V

= 2.5V 0.6 mA

Table 7. Overload Protection Section

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

V

COMPovl

V

DIFFovl

V

1. V

OVLth

t

OVL

COMPovl

V

Overload

COMP

Threshold

V

COMPhi

to V

COMPovl

Voltage Difference

V

Overload

TOVL

Threshold
Overload Delay

is always lower than V

COMPhi

= 0mA Figu re7 on page 20

TOVL

(1)

V

= V

DD

I

= 0mA

TOVL

Figure 7.

DDoff

(1)

... V

DDreg

;

4.35 V

50 150 250 mV

Figure 7. 4V

C

= 100nF Figure 7.

OVL

8ms

Table 8. Over temperature Protection Section

Symbol Parameter Test Conditions Min. Typ. Max. Unit

T

T

HYST

Thermal Shutdown

SD

Temperature
Thermal Shutdown

Hysteresis

Figure 11 on page 22 140 160 °C

Figure 11 on page 22 40 °C

Table 9. Typical Output Power Capability

Type

European

(195 - 265Vac)

VIPer53EDIP-E 50W 30W

VIPer53ESP-E 65W 40W

US / Wide range

(85 - 265Vac)

6/31 DocRev1

VIPer53EDIP - E / VIPer53ESP - E Pin conne ctions and function

S

IN

S

T

E

I

V

I

S

3 Pin connections and function

Figure 1. Pin connection (top view)

TOVLCOMP

8

VDD

7

6

NC

54

DRA

OSC

OURCE

OURCE

1

2

3

DIP-8 PowerSO-10

Figure 2. Current and voltage conventions

DD

VDD

I

OSC

OSC

15V

DD

I

V

OSC

TOVL

V

TOVL

DRAIN

NC
NC
NC

VDD

OVL

I

COMP

V

COMP

1
2
3
4
5

DRAIN

SOURCECOMPTOVL

10

D

V

D

SOURC

9

NC

8

NC

7

OSC

6

COMP

Table 10. Pin function

Pin Name Pin Function

Power supply of the control circuits. Also provides the chargin g current of the external
capacitor dur ing start- up.

V

DD

SOURCE Power MOSFET source and circuit ground reference.

DRAIN

COMP

TOVL

OSC Allows the setting of the switching frequency through an external Rt-Ct network.

The functions of this pin are managed by four threshold volt ages:

- VDDon: Volt age value at which the device starts switching (Typically 11.5 V).

- VDDoff: V oltage value at which the device stops swit ching (Typically 8.4 V).

- VDDovp: Trig geri ng voltage of the overvoltage protecti on (Trimmed to 18 V).

Power MOSFET drain. Also used by the internal high voltage current source during
the start-up phase, to charge the ext ernal V

capacitor.

DD

Allows the setting of the dynamic characteristic of the converter through an external
passive network. The useful voltage range extends from 0.5V to 4.5V. The Power
MOSFET is always off below 0.5V, and the overload prot ection is triggered if the
voltage exceed s 4.3 5V. This action is delayed by th e tim ing cap acitor conn ected to t he
TOVL pin.

Allows the connection of an external capacitor for delaying the overload protection,
which is triggered by a voltage on the COMP pin higher than 4.4V.

DocRev1 7/31

Rectangular U-I Output characteristics VIPer53EDIP - E / VIPer53ESP - E

T

4 Rectangular U-I Output characteristics

Figure 3. Off Li ne Powe r S upply With Opt ocoupler Fee dback

F1

AC IN

C1

R1

C4

T1

R3

OSC

C12

C5

10nF

VDD

D1

C2

R4

DRAIN

CONTROL

SOURCECOMP TOV L

R5

R9
1k

C7

C6

R2

C3

T2

D2

D3

D4

U2

U3

L1

C8

C10

R8

C9

C11

R7

R6

DC OU

8/31 DocRev1

VIPer53EDIP - E / VIPer53ESP - E Secondary Feedback Configuration Examp le

5 Secondary Feedback Configuration Example

The secondary feedback is implemented through an optocoupler driven by a programmable
zener diode (TL431 type) as shown in Figure 3 on page 8

The optocoupler is connected in parallel with the compensation network on the COMP pin
which delivers a constant biasing current of 0.6mA to the optotransistor. This current does
not depend on the compensation voltage, and so it does not depend on the output load
either. Consequently, the gain of the optocoupler ensures a constant biasing of the TL431
device (U3), which is responsible for secondary regulation. If the optocoupler gain is
sufficiently low, no additio nal components are required to a minimum current biasing of U3.
Additionally, the low biasing current protects the optocoupler from premature failure.

The constant current biasing can be used to simplify the secondary circuit: instead of a
TL431, a simple zener and resistance network in series with the optocoupler diode can
insure a good secondary regulation. Current flowing in this branch remains constant just as
it does by using a TL431, so typical load regulation of 1% can be achieved from zero to full
output current with this simple configuration.

Since the dynamic characteristics of the converter are set on the secondary side through
components associated to U3, the compensation network has only a role of gain
stabilization for the optocoupler, and it s value can be freely chosen. R5 can be set to a fixed
value of 2.2kΩ, offering the possibility of using C7 as a soft start capacitor: When starting up
the converter, t he V IPer53E dev ice delivers a constant current of 0.6mA on the COMP pin,
creating a constant voltage of 1.3V in R5 and a rising slope across C7. This voltage shape,
together with the operating range of 0.5V to 4.5V provides a soft startup of the converter.
The rising speed of the output voltage can be set through the value of C7. The C4 and C6
values must be adjusted accordingly in order to ensure a correct startup.

DocRev1 9/31

Current Mode Topology VIPer53EDIP - E / VIPer53ESP - E

6 Current Mode Topology

The VIPer53E implements the conventional current mode control method for regulating the
output voltage. This kind of feedback includes two nested regulation loops:

The inner loop controls the peak primary current cycle by cycle. When the Power MOSFET
output transistor is on, the inductor current (primary side of the transformer) is monitored
with a SenseFET technique and converted into a voltage. When V

S reaches V

power switch is turned off. This structure is completely integrated as shown on the Block
Diagram of Figure on page 1, with the current amplifier, t he PWM comparator, the blanking
time function and the PWM latch. The following formula gives the peak current in the Power
MOSFET according to the compensation voltage:

I

Dpeak

V

--------------------------------------------------=

–

COMPVCOMPos

H

COMP

The outer loop defines the level at which the inner loop regulates peak current in the power
switch. For this purpose, V

is driven by the feedback network (TL431 through an

COMP

optocoupler in secondary feedback configuration, see Figure 3 on page 8) and is sets
accordingly the peak drain current fo r each switch i n g cycle.

As the inner loop regulates the peak primary current in the primary side of the transformer,
all input voltage changes are compensated for before impacting the output voltage. This
results in an improved line regulation, instantaneous correction to line changes, and better
stability for the voltage regulation loop.

COMP

, the

Current mode topology also provides a good converter start-up control. The compensation
voltage can be controlled to increase slowly during the start-up phase, so the peak primary
current will follow this soft voltage slope to provide a smooth output voltage rise, without any
overshoot. The simpler voltage mode structure whic h only controls the duty cycle, leads
generally to high current at start-up with the risk of transformer saturation.

An integrated blanking filter inhibits the PWM comparator output for a short time after the
integrated Power MOSFET is switched on. This function prevents anomalous or premature
termination of the switching pulse in the case of current spikes caused by primary side
transformer capacitance or secondary side rectifier reverse recovery time when working in
continuous mode.

10/31 DocRev1