ST VIPer20B, VIPer20BSP User Manual

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VIPer20B



TYPE V

DSS

I

R

n

DS(on)

VIPer20B/SP 400V 1.3 A 8.7 Ω

FEATURE

■ ADJUSTABLESWITCHINGFREQUENCYUP

TO200KHZ

■ CURRENT MODE CONTROL

■ SOFTSTART AND SHUT DOWN CONTROL

■ AUTOMATIC BURST MODE OPERATION IN

STAND-BY CONDITIONABLE TO MEET
”BLUE ANGEL” NORM (1W TOTAL POWER
CONSUMPTION)

■ INTERNALLY TRIMMEDZENER

REFERENCE

■ UNDERVOLTAGE LOCK-OUT WITH

HYSTERESIS

■ INTEGRATED START-UPSUPPLY

■ AVALANCHERUGGED

■ OVERTEMPERATUREPROTECTION

■ LOW STAND-BYCURRENT

■ ADJUSTABLECURRENTLIMITATION

VIPer20BSP

SMPS PRIMARY I.C.

PRELIMINARY DATA

10

1

PENTAWATT HV Power SO-10

DESCRIPTION

VIPer20B combineson the same silicon chip a
state-of-the-art PWM circuit together with an
optimized high voltageavalanche rugged Vertical
Power MOSFET(400V 1.3A).

Typical applications cover off line power supplies
with a secondarymax power capabilityof 30W. It
is compatible from both primary or secondary
regulation loop despite using around 50% less
components when compared with a discrete
solution. Burst mode operation is an additional
feature of this device, offering the possibility to
operate in stand-by mode without extra
components.

BLOCK DIAGRAM

VDD

September 1999

13 V

_

+

ERROR

AMPLIFIER

0.5V

UVLO

LOGIC

ON/OFF

+
_

4.5V

SECURITY

LATCH

R/SSQ

OVERTEMP.

DETECTOR

2 µs

delay

OSC

OSCILLATOR

PWM

LATCH

R1

R2 R3

COMP

DRAIN

S

FFFF

Q

0.5V
_

+

+

300 ns

Blanking

6 V/A

_

CURRENT

AMPLIFIER

SOURCE

FC00490

1/17

VIPer20B / VIPer20BSP

ABSOLUTEMAXIMUM RATING

Symbol Para met e r Val u e Uni t

V

I

V

V

OSC

V

COMP

I

COMP

V

I

D(AR)

P

T

T

THERMALDATA

R

thj-case

R

thj-a mb.

Continuous Dr ain-Sour ce Voltage (Tj = 25 to 125oC) -0.3 to 400 V

DS

Maximum Current Internally Limited A

D

Supply Volt age 0 to 15 V

DD

Volt a ge Range Input 0 to V

DD

Volt a ge Range Input 0 t o 5 V
Maximum Conti nuou s C urrent ±2mA
Electrostatic d ischarge (R = 1.5 KΩ C = 100p F )

esd

Avalanche Drain-Source Current , Repetiti ve or No t-R epetitiv e

=100oC, Pulse Width Limite d by TJmax, δ <1%)

(T

C

Power Dissi pation at Tc = 25oC57W

tot

Junction Op erating Temperature -40 to 140

j

St orage Temper at u r e -65 to 150

stg

2000 V

TBD A

Ther mal Resistan c e Junction- case Ma x 2.0
Ther mal Resistan c e Junction- ambient

70

Max

o
o

o

C/W

o

C/W

V

C
C

CONNECTION DIAGRAMS (Top View)

PENTAWATT HV PowerSO-10

CURRENT AND VOLTAGE CONVENTIONS

IDD ID

IOSC

OSC

VDD

13V

VOSC

­+

ICOMP

VCOMP

DRAINVDD

COMP SOURCE

VDS

2/17

FC00020

ORDERING NUMBERS

PENTAW AT T HV PowerSO -10

VIPer 20B VIPer20BSP

VIPer20B / VIPer20BSP

PINSFUNCTIONAL DESCRIPTION
DRAINPIN:

Integrated power MOSFET drain pin. It provides
internal bias current during start-up via an
integrated high voltage current source which is
switched off during normal operation.The device
is able to handle an unclampedcurrent during its
normal operation, assuring self protectionagainst
voltage surges, PCB stray inductance, and
allowing a snubberless operation for low output
power.

SOURCEPIN:

Power MOSFET source pin. Primary side circuit
commongroundconnection.

VDD PIN :

This pin providestwo functions:

- It corresponds to the low voltage supply of the

controlpart of the circuit. If V
the start-up current source is activatedand the
output power MOSFET is switched off untilthe
V

voltage reaches 11V. During this phase,

DD

the internal current consumption is reduced,
the V

pin is sourcing a currentof about 1mA

DD

and the COMP pin is shorted to ground. After
that, the current source is shut down, and the
devicetries to startupby switching again.

goes below 8V,

DD

- Thispin isalsoconnected to the error amplifier,

in order to allow primary as well as secondary
regulation configurations. In case of primary
regulation, an internal 13V trimmed reference
voltage is used to maintain V
secondary regulation, a voltage between 8.5V
and 12.5V will be put on V
transformerdesign, in orderto stuckthe output
of the transconductance amplifier to the high
state. The COMP pin behaves as a constant

at 13V. For

DD

DD

pin by

current source, and can easily be connectedto
the output of an optocoupler. Note that any
overvoltage due toregulation loop failure is still
detected by the error amplifier through the V

DD

voltage, which cannot overpass 13V. The
output voltage will be somewhat higher than
the nominalone, but still under control.

COMP PIN :

This pin provides two functions :

- It is the output of the error transconductance

amplifier, and allows for the connection of a
compensation network to provide the desired
transfer function of the regulation loop. Its
bandwidth can be easily adjusted to the
needed value withusual componentsvalue. As
stated above, secondary regulation
configurations are also implemented through
the COMP pin.

- When the COMP voltage is going below 0.5V,

the shut-downof the circuit occurs, with a zero
duty cycle for the power MOSFET.This feature
can be used to switch off the converter, and is
automatically activated by the regulation loop
(whatever is the configuration) to provide a
burst mode operation in case of negligible
output power or openload condition.

OSC PIN :

An R
to define the switching frequency. Note that
despite the connection of R
significant frequency change occurs for V
varying from 8V to 15V. It provides also a
synchronisationcapability, when connectedto an
external frequencysource.

network must be connected on that pin

T-CT

to VDD,no

T

DD

3/17

VIPer20B / VIPer20BSP

ELECTRICAL CHARACTERISTICS (TJ=25oC, VDD=13 V, unless otherwise specified)

POWERSECTION

Symbol Parameter Test Cond itions Min. Typ. Max. Unit

BV

I

DSS

R

DS(on)

C

OSS

(1) On Inductive Load, Clamped.

SUPPLY SECTION

Symbol Parameter Test Cond itions Min. Typ. Max. Unit

I

DDch

I

DD0

I

DD1

I

DD2

V

DDo f f

V

DDo n

V

DDhyst

Drain-Sourc e V olt age ID=10mA V

DSS

= 0 V 400 V

COMP

Off -St ate Drain Current VDS=300V TJ= 125oC

=0V

V

COMP

St at i c Drain Source o n
Resistance

t

Fall Time ID=0.1A Vin=300V(1)

f

ID=0.9A

=0.9A TJ= 100oC

I

D

7.3 8.7

80 ns

(see fig. 3)

Rise Tim e ID=0.9A Vin= 3 00 V ( 1)

t

r

50 ns

(see fig. 3)

Out put C apa c itance VDS=25V 90 pF

St art-up C harging
Current

Oper ating S upp ly
Current

Oper ating S upp ly

VDD=0toV

DDo n

VDS=70V

-2 mA

(see fig. 2)
VDD=12V, FSW=0KHz

12 TBD mA

(see fig. 2)
VDD=12V, FSW=100KHz 13 mA

Current
Oper ating S upp ly

VDD=12V, FSW=200KHz 14 mA

Current
Unde rv oltage

(see fig. 2) 8 V

Shutdown
Unde rv oltage Res et ( s ee fig. 2) 11 12 V
Hyst eresis S tart-up (see fig. 2) 2.4 3 V

0.6 mA

15.7

Ω
Ω

OSCILLATORSECTION

Symbol Parameter Test Cond itions Min. Typ. Max. Unit

4/17

F

F

V

V

SW1

SW2

OSCih

OSCil

Os cillator F r equ en c y
Init ial Acc ur a c y

Os cillator F r equ en c y
Total Variation

R

T

=8.2K

Ω

CT=2.4 nF

(see fig.7)
R

T

V

DD

=8.2K

Ω

CT=2.4 nF

=9to15V TJ= 0 t o 100oC

Os cillator Pe a k V oltage 7.1 V
Os cillator Va lle y

Voltage

90 100 110 K Hz

80 100 120 K Hz

3.7 V

VIPer20B / VIPer20BSP

ELECTRICAL CHARACTERISTICS (continued)

ERRORAMPLIFIERSECTION

Symbol Parameter Test Cond itions Min. Typ. Max. Unit

V

DDreg

∆V

DDreg

G

A

VOL

G

V

COMPLO

V

COMPHI

I

COMPLO

I

COMPHI

PWM COMPARATOR SECTION

Symbol Parameter Test Cond itions Min. Typ. Max. Unit

H

V

COMPoffVCOMP

I

Dpeak

t

t

VDD Re gul at i on Point I

=0mA(seefig.1) 12.61313.4 V

COMP

Total Variation TJ= 0 to 100oC2%
Unity Gain Bandwidth F rom I nput = VDDto Output = V

BW

COMP

150 KHz

COM P pi n is open (see f ig. 8)

Open Loop Volt age

COM P pi n is open (see f ig. 8) TBD 5 0 dB

Gain
DC Tran sconduct an c e V

m

Out put L ow Level
Out put H igh Level
Out put L ow Curr ent

= 2.5 V (see fig. 1) TBD 1.5 T BD mA/V

COMP

=-400µAVDD=14V

I

COMP

=400µAVDD=12V

I

COMP

V

=2.5V VDD=14V -600 µA

COMP

0.2 V

4.5 V

Capa bility
Output High Current

V

=2.5V VDD= 1 2 V 600 µA

COMP

Capa bility

V

∆V

ID

COMP

/∆I

Dpeak

offset I

= 1 to 3 V TBD 2.3 TBD V/A

COMP

=10mA 0.5 V

Dpeak

Peak Curr ent Limitation VDD= 1 2 V COM P pin open 1.3 TBD A
Current Sense Delay

d

ID= 0. 4 A 250 ns

to turn-off
Blanking Time 300 ns

b

SHUTDOWNAND OVERTEMPERATURE SECTION

Symbol Parameter Test Cond itions Min. Typ. Max. Unit

V

COMPth

t

DISsu

T

T

hyst

Restart threshold (see fig. 4) 0.5 V
Disabl e Set Up Time (see fig. 4 ) 1. 7 5 µ s
Thermal Shutdown

tsd

(see fig. 6) 140 160

Tem p er at u re
Thermal Shutdown

(see fig. 6) 34

Hyst e r esis

o

o

C

C

5/17

VIPer20B / VIPer20BSP

Figure1:VDDRegulationPoint

COMP

I

ICOMPHI

0

ICOMPLO

VDDreg

Figure3: TransitionTime

ID

10%Ipeak

VDS

90%VD

Slope =

Gm in mA/V

FC00150

Figure2: UndervoltageLockout

IDD

IDD0

DD

V

VDDhyst

V

DDoff

IDDch

Figure4: ShutDown Action

VOSC

V

COMP

t

VCOMPth

I

D

tDISsu

VDS=70V

Fsw = 0

V

DDon

FC00170

VDD

t

t

10%V

D

tf tr

t

FC00160

ENABLE

t

ENABLE

DISABLE

FC00060

6/17