ST UA748 User Manual

UA748

PRECISION SINGLE OPERATIONAL AMPLIFIER

■INPUT OFFSET VOLTAGE : 3mV max. OVER TEMPERATURE

■FREQUENCY COMPENSATION WITH A SINGLE 30pF CAPACITOR (C1)

■OPERATION FROM ±5V to ±15V

■LOW POWER CONSUMPTION : 50mW AT ±15V

■CONTINUOUS SHORT-CIRCUIT PROTECTION

■OPERATION AS A COMPARATOR WITH DIFFERENTIAL INPUTS AS HIGH AS ±30V

■NO LATCH-UP WHEN COMMON-MODE RANGE IS EXCEEDED

■SAME PIN CONFIGURATION AS THE LM101A

DESCRIPTION

The UA748 is a general purpose operational amplifier built on a single silicon chip. The resulting close match and tight thermal coupling gives low offsets and temperature drift as well as fast recovery from thermal transients.

■Short-circuit protection

■Offset voltage null capability

■Large common-mode and differential voltage ranges

■Low power consumption

■No latch-up

The unity-gain compensation specified makes the circuit stable for all feedback configurations, even with capacitive loads. However, it is possible to optimize compensation for best high frequency performance at any gain. The low power dissipation permits high voltage operation and simplifies packaging in full-temperature range systems.

PIN CONNECTIONS (top view)

N

DIP8

(Plastic Package)

D

SO8

(Plastic Micropackage)

ORDER CODE

	Part Number	Temperature Range	Package
			N	D
	UA748C	0°C, +70°C	∙	∙
	UA748I	-40°C, +105°C	∙	∙
	UA748M	-55°C, +125°C	∙	∙

Example : UA748CN

N = Dual in Line Package (DIP)

D = Small Outline Package (SO) - also available in Tape & Reel (DT)

1	8
2	7
3	6
4	5

1 - Offset null 1/frequency compensation

2 - Inverting input

3 - Non-inverting input

4- VCC-

5- Offset null 2

6- Output

7- VCC+

8- Frequency compensation

December 2001

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UA748

SCHEMATIC DIAGRAM

ABSOLUTE MAXIMUM RATINGS

Symbol	Parameter	UA748M	UA748I	UA748C	Unit
VCC	Supply voltage		±22		V
Vid	Differential Input Voltage		±30		V
Vi	Input Voltage		±15		V
Ptot	Power Dissipation 1)		500		mW
	Output Short-circuit Duration		Infinite
Toper	Operating Free-air Temperature Range	-55 to +125	-40 to +105	0 to +70	°C
Tstg	Storage Temperature Range		-65 to +150		°C

1.Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded.

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														UA748
ELECTRICAL CHARACTERISTICS
VCC = ±15V, Tamb = +25°C, C1 = 30pF (unless otherwise specified)
Symbol		Parameter			UA748I/M					UA748C					Unit
				Min.		Typ.	Max.		Min.		Typ.	Max.
Vio	Input Offset Voltage (Rs ≤ 10kΩ)
	Tamb = +25°C					0.7		2			2		7.5		mV
	Tmin ≤ Tamb ≤ Tmax							3					10
	Input Offset Current
Iio	Tamb = +25°C					1.5		10			2		50		nA
	Tmin ≤ Tamb ≤ Tmax							20					70
	Input Bias Current
Iib	Tamb = +25°C					25		75			70		250		nA
	Tmin ≤ Tamb ≤ Tmax							10					300
	Large Signal Voltage Gain (Vo = ±10V, RL = 2kΩ)
Avd	Tamb = +25°C			50		100			25		100				V/mV
	Tmin ≤ Tamb ≤ Tmax			25					15
	Supply Voltage Rejection Ratio (Rs ≤ 10kΩ)
SVR	Tamb = +25°C			80		96			70		96				dB
	Tmin ≤ Tamb ≤ Tmax			80					70
	Supply Current, no load
ICC	Tamb = +25°C					1.8		3			1.8		3		mA
	Tmin ≤ Tamb	≤ Tmax						3					3
	Input Common Mode Voltage Range (VCC = ±20V)
Vicm	Tamb = +25°C			±15					±15						V
	Tmin ≤ Tamb ≤ Tmax			±15					±15
	Common Mode Rejection Ratio (RS ≤ 10kΩ)
CMR	Tamb = +25°C			80		96			70		96				dB
	Tmin ≤ Tamb	≤ Tmax		80					70
IOS	Output short Circuit Current			10		30		50	10		30		50		mA
	Output Voltage Swing (VCC = ±15V)
	Tamb = +25°C		R L = 10kΩ	12		14			12		14
±Vopp			RL = 2kΩ	10		13			10		13				V
	Tmin ≤ Tamb ≤ Tmax		RL = 10kΩ	12					12
			RL = 2kΩ	10					10
SR	Slew Rate 1)														V/μs
	Vi = ±10V, RL = 2kΩ, CL = 100pF, unity Gain			0.25		0.5			0.25		0.5
tr	Rise Time														μs
	Vi = ±20mV, RL = 2kΩ, CL = 100pF, unity Gain					0.3					0.3
Kov	Overshoot														%
	Vi = 20mV, RL = 2kΩ, CL = 100pF, unity Gain					5					5
Zi	Input Impedance (VCC = ±15V)			1.5		4			1.5		4				MΩ
Ro	Output Resistance (VCC = ±15V)					75					75				Ω
GBP	Gain Bandwith Product														MHz
	Vi =10mV, RL = 2kΩ, CL = 100pF, f =100kHz			0.5		1			0.5		1
THD	Total Harmonic Distortion														%
	f =1kHz, Av =20dB, RL =2kΩ, Vo =2Vpp, CL = 100pF					0.015					0.015
	Input Offset Current Drift
DI	25°C ≤ Tmax					10		100			10		300		pA/°C
io	Tmin ≤ Tamb ≤ Tmax					20		200			20		600
DVio	Input Offset Voltage Drift														µV/°C
	Tmin ≤ Tamb ≤ Tmax					3		15			6		30

1.May be improved up to 10V/µs in inverting amplifier configuration.

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