The TSH343 is a triple single-supply video buffer
featuring an internal gain of 6dB and a large
280MHz bandwidth.
The main advantage of this circuit is that its input
DC level shifter allows for video signals on 75Ω
video lines without damage to the synchroniza tion
tip of the video signal, while using a single 5V
power supply with no input capacitor. The DC
level shifter is internally fixed and optimized to
keep the output video signals between low and
high output rails in the best position for the
greatest linearity.
This datasheet provides information on using the
TSH343 as a Y-Pb-Pr driver for video DAC output
on a video line. See the TSH344 datasheet for RG-B signals.
IN3
+Vcc
3
4
6dB
DC Shifter
6
5
OUT3
GND
SO8
The TSH343 is available in the compact SO8
plastic package for optimum space-saving.
March 2007 Rev 41/17
www.st.com
17
TSH343
Contents
1Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
TSH343Absolute maximum ratings and operating conditions
1 Absolute maximum ratings and operating conditions
Table 1.Absolute maximum ratings (AMR)
SymbolParameterValueUnit
V
T
T
R
R
P
V
oper
T
max
Supply voltage
CC
Input voltage range
in
Operating free air temperature range-40 to +85°C
Storage temperature-65 to +150°C
stg
Maximum junction temperature150°C
j
SO8 thermal resistance junction to case28°C/W
thjc
SO8 thermal resistance junction to ambient area157°C/W
thja
Maximum power dissipation (@T
CDM: charged device model
ESD
HBM: human body model
MM: machine model
1. All voltage values, except differential voltage, are with respect to network terminal.
2. The magnitude of input and output voltages must never exceed VCC +0.3V.
Table 2.Operating conditions
(1)
(2)
6V
0 to +1.4V
=25°C) for Tj=150°C800mW
amb
2
1.5
200
kV
kV
V
SymbolParameterValueUnit
V
CC
1. Tested in full production at 0V/5V single power supply.
Power supply voltage3 to 5.5
(1)
V
3/17
Electrical characteristicsTSH343
2 Electrical characteristics
Table 3.VCC= +5V single supply, T
= 25°C (unl es s otherwise specified)
amb
SymbolParameterTest conditionsMin.Typ.Max.Unit
DC performance
Input DC shift
V
DC
Figure 16 for the behaviour in
(see
temperature)
I
Input bias current
ib
Input resistanceT
R
in
C
Input capacitanceT
in
R
=150Ω, T
L
-40°C < T
T
, input to GND18.235
amb
-40°C < T
amb
amb
400600 670
amb
< +85°C530
amb
< +85°C20.7
amb
4GΩ
1pF
no load, input to GND14.4 18
Supply current per buffer
I
CC
PSRR
Power supply rejection ratio
20 log (ΔV
out
/ΔVCC)
(1)
GDC voltage gain R
Variation of the DC voltage gain
DG
between inputs of 0.3V and 1V
-40°C < T
F=1MHz-45dB
=150Ω, Vin= 1V1.921.992.05V/V
L
Input step from 0.3V to 1V0.260.8%
< +85°C14.9
amb
MG1Gain matching between 3 channelsInput = 1V0.52%
MG
Gain matching between 3 channelsInput = 0.3V0.52%
0.3
Dynamic performance and output characteristics
mV
μA
mA
-3dB bandwidth
Bw
Gain flatness @ 0.1dB
FPBWFull power bandwidth
DDelay between each channel
SRSlew rate
V
V
High level output voltageV
OH
Low level output voltageRL=150Ω 40mV
OL
(3)
Output current
I
OUT
Output short-circuit current (I
(2)
source
Small signal V
=150Ω
R
L
Small signal V
R
=150Ω
L
V
=2V
out
=150Ω
R
L
0 to 30MHz0.5ns
Input step from 0V to 1V,
=150Ω
R
L
in DC
V
=2V, T
out
-40°C < T
)100mA
4/17
= 20mVp
out
160280
MHz
= 20mVp
p-p
, V
out
ICM
=0.5V,
130200MHz
65
500780V/μs
= +1.5V, RL=150Ω3.73.9V
amb
< +85°C82
amb
4590
mA
TSH343Electrical characteristics
Table 3.VCC= +5V single supply, T
= 25°C (un l es s ot h erw is e sp e ci fie d ) (c on t inued )
amb
SymbolParameterTest conditionsMin.Typ.Max.Unit
Noise and distortion
=50Ω29nV/√Hz
IN
158
290
, RL=150Ω
-58
-45
-72
-50
μVrms
eNTotal input voltage noise
HD22nd harmonic distortion
HD33rd harmonic distortion
1. See Figure28 and Figure 29.
2. See Figure30 and Figure 31.
3. Non-tested value, guaranteed by design.
F = 100kHz, R
10kHz to 30MHz
10kHz to 100MHz
V
=2V
out
p-p
F= 10MHz
F= 30MHz
=2Vp-p, RL=150Ω
V
out
F= 10MHz
F= 30MHz
dBc
dBc
5/17
Electrical characteristicsTSH343
Figure 1.Frequency responseFigure 2.Gain flatness
10
8
6
4
2
0
-2
Gain (dB)
-4
-6
Vcc=5V
-8
Load=150
-10
1M10M100M1G
Ω
Frequency (Hz)
6,20
6,15
6,10
6,05
6,00
5,95
5,90
Gain (dB)
5,85
5,80
Vcc=5V
5,75
Load=150
5,70
1M10M100M1G
Ω
Frequency (Hz)
Figure 3.Cross-talk vs. frequency (amp1)Figure 4.Cross-talk vs. frequency (amp2)
0
Small Signal
-10
Vcc=5V
Load=150
-20
-30
-40
-50
-60
Gain (dB)
-70
-80
-90
-100
1M10M100M
Ω
1/2
1/3
Frequency (Hz)
0
Small Signal
-10
Vcc=5V
Load=150
-20
-30
-40
-50
-60
Gain (dB)
-70
-80
-90
-100
1M10M100M
Ω
2/1
2/3
Frequency (Hz)
Figure 5.Cross-talk vs. frequency (amp3)Figure 6.Input noise vs. frequency
0
Small Signal
-10
Vcc=5V
Load=150
-20
-30
-40
-50
-60
Gain (dB)
-70
-80
-90
-100
1M10M100M
Ω
3/1
3/2
Frequency (Hz)
6/17
100
Input Noise (nV/VHz)
10
101001k10k100k1M10M
Vcc=5V
input in short-circuit
NA
Frequency (Hz)
TSH343Electrical characteristics
Figure 7.Distortion on 150Ω load - 10MHzFigure 8.Distortion on 100Ω load - 10MHz
-30
-35
Vcc=5V
F=10MHz
-40
input DC component = 0.65V
-45
Load=150
-50
-55
-60
-65
-70
-75
-80
HD2 & HD3 (dBc)
-85
-90
-95
-100
0,00,51,01,52,02,53,03,54,0
Ω
HD2
HD3
Output Amplitud e (Vp-p)
-30
-35
Vcc=5V
F=10MHz
-40
input DC component = 0.65V
-45
Load=100
-50
-55
-60
-65
-70
-75
-80
HD2 & HD3 (dBc)
-85
-90
-95
-100
0,00,51,01,52,02,53,03,54,0
Ω
HD2
HD3
Output Amplitud e (Vp-p)
Figure 9.Distortion on 150Ω load - 30MHzFigure 10. Distortion on 100Ω load - 30MHz
-10
-15
Vcc=5V
-20
F=30MHz
input DC component = 0.65V
-25
Load=150
-30
-35
-40
-45
-50
-55
-60
HD2 & HD3 (dBc)
-65
-70
-75
-80
0,00,51,01,52,02,53,03,54,0
Ω
HD2
HD3
Output Amplitude (Vp-p)
-10
-15
Vcc=5V
F=30MHz
-20
input DC component = 0.65V
-25
Load=100
-30
-35
-40
-45
-50
-55
-60
HD2 & HD3 (dBc)
-65
-70
-75
-80
0,00,51,01,52,02,53,03,54,0
Ω
HD2
HD3
Output Amplitude (Vp-p)
Figure 11. Output DC shift vs. frequencyFigure 12. Slew rate
1,4
3,5
1,2
1,0
Gain (dB)
0,8
Vcc=5V
Load=150
0,6
1M10M100M
Ω
Frequency (Hz)
3,0
SR+
2,5
2,0
1,5
1,0
Output Response (V)
0,5
Vcc=5V
Load=150
0,0
-5-4-3-2-1012345
Ω
SR-
Time (ns)
7/17
Electrical characteristicsTSH343
Figure 13. Reverse isolation vs. frequencyFigure 14. Bandwidth vs. temperature
0
Vcc=5V
-10
Load=100
-20
-30
-40
-50
-60
Gain (dB)
-70
-80
-90
-100
1M10M100M
Ω
Frequency (Hz)
500
450
400
350
300
Bw (MHz)
250
200
150
Vcc=5V
Load=150
100
-40-20 0 20406080
Ω
Temperature (°C)
Figure 15. Quiescent current vs. supplyFigure 16. Input DC shift vs. temperature
50
Vcc=5V
45
Input to ground, no load
40
35
30
25
20
Total Icc (mA)
15
10
5
0
0,00,51,01,52,02,53,03,54,04,55,0
Vcc (V)
0,8
0,7
0,6
0,5
DCshift (V)
0,4
0,3
Vcc=5V
Load=150
0,2
-40-200 20406080
Ω
Temperature (°C)
Figure 17. I
0
-10
-20
-30
-40
-50
-60
-70
Isource (mA)
-80
-90
-100
-110
-120
vs. output volta geFigure 18. Voltage gain vs. temperature
source
+5V
VOH
without load
Isource
0V
0,00,51,01,52,02,53,03,54,04,55,0
V
V (V)
8/17
2,05
2,04
2,03
2,02
2,01
2,00
1,99
Gain (dB)
1,98
1,97
Vcc=5V
1,96
Load=150
1,95
-40-20 0 20406080
Ω
Temperature (°C)
TSH343Electrical characteristics
Figure 19. I
24
vs. temperatureFigure 20. Gain deviation vs. temperature
bias
1,0
Gain deviation between
22
20
18
0.3V and 1V input voltages
0,8
Vcc=5V
Load=150
0,6
Ω
(μA)
BIAS
16
I
14
12
Vcc=5V
Load=150
10
-40-20 0 20406080
Ω
Temperature (°C)
GD (%)
0,4
0,2
0,0
-40-20020406080
Temperature (°C)
Figure 21. Supply current vs. temperatureFigure 22. Output current vs. temperature
17
16
15
14
(mA)
13
CC
I
12
110
100
90
80
70
Isource (mA)
11
Vcc=5V
no Load
10
-40-200 20406080
Temperature (°C)
60
Vcc=5V
Load=150
50
-40-200 20406080
Ω
Temperature (°C)
Figure 23. Output higher rail vs. temperatureFigure 24. Gain matching vs. temperature
4,2
4,1
4,0
3,9
(V)
OH
V
3,8
3,7
3,6
Vcc=5V
Load=150
3,5
-40-200 20406080
Ω
Temperature (°C)
1,0
Gain matching between 3 channels
Vcc=5V
0,8
Load=150
Ω
Vin=0.3V and 1V
0,6
GM (%)
0,4
0,2
0,0
-40-20020406080
Temperature (°C)
9/17
Application informationTSH343
3 Application information
3.1 Using the TSH343 to drive Y-Pb-Pr video components
Figure 25. Shapes of video signals coming from DACs
27ns
54ns
(2t)
(4t)
27ns
(2t)
GND
300mV
10mV
590ns
(44t)
590ns
(44t)
Synchronization tip
Amplitude
1Vp-p
300mV
700mV
14.8µs (1100t): 1920*1080i
24.3µs (1800t): 1280*720i
30MHz
•Fclock=74.25MHz
•t=1/Fclock=13.5ns
Frequency
Figure 26. TSH343 in single supply for any DAC output
video
outputs
DAC
DAC
DAC
Y,G(+synchro)
Pb,B
Pr,R
+5V
TSH343
SO8
75Ω
75Ω
75Ω
LPF
LPF
LPF
Cable
Cable
Cable
White (100 IRE)
Black (30 IRE)
(0 IRE)
1.030V
0.330V
0.030V
time
video
outputs
DAC
DAC
DAC
R
G
B
+5V
TSH344
SO8
75Ω
75Ω
75Ω
Digital synchro
1. See the TSH344 datasheet on st.com for more information. It is possible to drive RGB signals with the
TSH344.
10/17
LPF
LPF
LPF
HDTV
Cable
Cable
Cable
TSH343Application information
Figure 27. Detailed view of one TSH343 channel
DAC
140Ω
1,01V
10mV
5Volt
0Volt
600mV
DC
-5V
+5V
+
1/3 TSH343
(gain=2)
75Ω
0V
5Volt
3,22V
1,22V (10mV+600mV)*gain
0Volt
68pF
470nH
STB
video line
68pF
TV
75Ω
5Volt
1,61V
610mV
0Volt
Because of the shape of the signal shown in Figure 25, we use a very low output rail triple
high-speed buff er . The TSH343 supplied in 5V single power sup ply, features a low output rail
of 40mV on 150-ohm load. The TSH343 is used to drive high definition video signals up to
30MHz on 75-ohm video lines. It is dedicated to driving YPbPr signals where the
synchronization tip—close to zero volt—is included in the Y signal.
Figure 27 shows a solution used on the STMicroelectronics reference design of STi7100 or
STi7200 where the DAC output is loaded by 140 Ω and the bottom of the synchronization tip
is set at 10mV. Using the TSH343, an internal input DC value of 600mV is added to the
video signal in order to shift the bottom from 10mV to 610mV. The shift is not based on the
average of the signal, but is an analog summation of a DC component to the video signal.
Therefore, no input capacitor s are required which prov ides a real adv a ntage in terms of cost
and board space.
The internal gain of 2 obtained makes it possible to remove two resistors on the BOM. To
avoid an y pe rturbation on matching fr om the DACs output impe dance alo ng a la rge ba nd of
30MHz in HD, a discrete reconstruction filtering is implemented after the driver. This filter is
matched on 75-ohms. Note that the T SH343 cannot be A C out put coupled (it cannot sink an
output current, therefore it is not possible to implement an output series capacitor).
11/17
Application informationTSH343
3.2 PSRR and improvement of power supply noise rejection
Figure 28. Circuit for power supply bypassing
S
S
R
R
+5V
+5V
T-bias
T-bias
75Ω
75Ω
CHF
CHF
L
L
TSH343
TSH343
C
C
LF
LF
50Ω
50Ω
AGILENT
AGILENT
4395A
4395A
A
A
Figure 29 shows how the power supply noise rejection evolv es v ersus freq uency depen ding
on how carefully the power supply decoupling is achi eved.
Figure 29. Power supply noise rejection
0
-10
-20
L= Ferrite FBMJ4516HM900
CHF=100nF
-30
CLF=10uF
-40
-50
PSRR (dB)
-60
L=2uH
CHF=100nF
-70
CLF=10uF
-80
100k1M10M100M
Frequency (Hz)
PSRR
Criteria for choosing the ferrite:
●In DC, the resistance (R) of the ferrite must be as low as possible to keep +5V power
supply on the chip.
●In AC, along a 30MHz bandwidth (HD spectrum), the equivalent impedance (Z=R+jX)
must be as high as possible to optimize rejection of the noise generated by the power
supply.
12/17
TSH343Application information
3.3 Delay between channels
Figure 30. Measurement of the delay betwee n each channel
5V
600mV
++
+6dB
75Ω
75Ω Cable
V1
75Ω
Vin
75Ω
600mV
++
600mV
++
+6dB
+6dB
75Ω
75Ω
75Ω Cable
75Ω Cable
V2
75Ω
V3
75Ω
The delay between each video component is an important aspect in high definition video
systems. To properly drive the three video components without any relative delay, the
TSH343 dice layout has a very symmetrical geometry. The effect is direct on the
synchronization of each channel, as shown in Figure 31. There is no delay between
channels when the same V
signal is applied on the three inputs. Note that the de lay
In order to meet environmental requirements, STMicroelectronics offers th ese devices in
ECOPACK
category of second level interconnect is marke d on the pa ckage and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related t o soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com
®
packages. These packages have a lead-free second level interconnect. The
1-Dec-20051First release of datasheet.
2-Jan-20062Capa-load option paragraph deleted on page 11.
10-Jul-20063Application information.
7-Mar-20074
TubeTSH343I
Max limit for input DC shift reduced from 800mV to 670mV.
Updated
rejection on page 12
Section 3.2: PSRR and improvement of power supply noise
.
16/17
TSH343Revision history
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