ST TS922 User Manual

TS922
Rail-to-Rail High Output Current Dual Operational Amplifier
Rail-to-rail input and output
Low noise: 9nV/
Hz
Low distortion
High output current: 80mA
(able to drive 32Ω loads)
High-speed: 4MHz, 1V/µs
Low input offset voltage: 900µV max
(TS922A)
ESD Internal protection: 2kV
Latch-up immunity
Macromodel included in this specification
Dual version available in flip-chip package
Description
The TS922 is a rail-to-rail dual BiCMOS operational amplifier optimized and fully specified for 3V and 5V operation.
The device’s high output current allows low-load impedances to be driven.
Very low noise, low distortion, low offset and a high output current capability make this device an excellent choice for high quality, low voltage or battery operated audio systems.
The device is stable for capacitive loads up to 500pF.
J
TS922IJ
(Flip-chip)
N
DIP-8
(Plastic Package)
D
SO-8
(Plastic Micropackage)
P
TSSOP8
(Thin Shrink Small Outline Package)
Applications
Headphone amplifier
Piezoelectric speaker driver
Sound cards, multimedia systems
Line driver, actuator driver
Servo amplifier
Mobile phone and portable equipment
Instrumentation with low noise as key
factor
Order Codes
Part Number Temperature Range Package Packaging
TS922IN/AIN TS922ID/IDT/AID/AIDT SO Tube or Tape & Reel
TS922IPT/TS922AIPT
TS922IJT Flip-Chip Tape & Reel
May 2005 Revision 3 1/16
-40°C, +125°C (Thin Shrink Outline Package)
DIP Tube
TSSOP
Tape & Reel
TS922 Pin Diagrams

1 Pin Diagrams

Figure 1: Pin connections (top view)
Output 1
Inverting Input 1
Non-inverting Input 1
1
2
-
+
3
V
45
CC
Figure 2: Pin-out for flip-chip package (top view)
OUT2 -IN2 +IN2
OUT2 -IN2 +IN2
-
-
+
+
VCC+
VCC+
+
+
-
-
V
8
Output 2
7
-
Inverting Input 2
6
+
Non-inverting Input 2
CC
+
GND
GND
+IN1-IN1OUT1
+IN1-IN1OUT1
2/16
Absolute Maximum Ratings TS922

2 Absolute Maximum Ratings

Table 1: Key parameters and their absolute maximum ratings
Symbol Parameter Value Unit
V
T
Supply voltage
CC
V
Differential Input Voltage
id
V
Input Voltage
in
Storage Temperature
stg
Thermal Resistance Junction to Ambient SO8
R
TSSOP8 120
thja
DIP8 85 Flip Chip 90
T
Maximum Junction Temperature
j
HBM: Human Body Model
ESD
MM: Machine Model CDM: Charged Device Model 1.5 kV Output Short Circuit Duration
Latch-up Immunity 200 mA Soldering Temperature (10sec), leaded version 250 °C Soldering Temperature (10sec), unleaded version 260 °C
1) All voltages values, except differential voltage are with respect to network ground terminal.
2) Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If Vid > ±1V, the maximum input cur­rent must not exceed ±1mA. In this case (Vid > ±1V) an input serie resistor must be added to limit input current.
3) Do not exceed 14V.
4) Human body model, 100pF discharged through a 1.5kresistor into pin of device.
5) Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (internal resistor < 5
6) There is no short-circuit protection inside the device: short-circuits from the output to V
output current is approximately 80mA, independent of the magnitude of V circuits on all amplifiers.
1
2
3
4
5
), into pin to pin of device.
14 V
±1 V
VDD-0.3 to VCC+0.3
-65 to +150 °C
125
150 °C
2kV
100 V
see note
can cause excessive heating. The maximum
. Destructive dissipation can result from simultaneous short-
cc
cc
6
V
°C/W
Table 2: Operating conditions
Symbol Parameter Value Unit
V
V
T
Supply voltage
CC
Common Mode Input Voltage Range
icm
Operating Free Air Temperature Range
oper
2.7 to 12 V
-0.2 to VCC +0.2
V
DD
-40 to +125 °C
V
3/16
TS922 Electrical Characteristics

3 Electrical Characteristics

Table 3: VCC = +3V, VDD = 0V, V
= VCC/2, T
icm
= 25°C, RL connected to Vcc/2 (unless otherwise
amb
specified)
Symbol Parameter Min. Typ. Max. Unit
Input Offset Voltage TS922 Input Offset voltage TS922A Input Offset Voltage TS922IJ (Flip Chip)
V
io
T
T
T
TS922
max.
T
TS922A
max.
T
TS922IJ (Flip Chip)
max.
2
130nA
15 100 nA
DV
min.
min.
min.
T T
amb
amb
amb
T T
Input Offset Voltage Drift
io
Input Offset Current
I
io
Vout = Vcc/2
Input Bias Current
I
ib
Vout = Vcc/2
High Level Output Voltage R
= 10k
V
OH
L
R
= 600
L
RL = 32
2.90
2.87
2.63
Low Level Output Voltage R
= 10k
V
OL
A
I
cc
GBP
L
R
= 600
L
RL = 32
Large Signal Voltage Gain (V R
= 10k
L
vd
R
= 600
L
RL = 32
Total Supply Current no load, V
out
= V
Gain Bandwidth Product (R
= 600Ω)
L
cc/2
= 2Vpk-pk)
out
180
200
35 16
23mA
4MHz
CMR Common Mode Rejection Ratio 60 80 dB
SVR
Supply Voltage Rejection Ratio
= 2.7 to 3.3V
V
cc
I
Output Short Circuit Current
o
60 85
50 80 mA
SR Slew Rate 0.7 1.3 V/
Phase Margin at Unit Gain
φm
G
m
e
n
THD
C
s
= 600Ω, CL =100pF
R
L
Gain Margin R
= 600Ω, CL =100pF
L
Equivalent Input Noise Voltage f = 1kHz
Total Harmonic Distortion
= 2Vpk-pk, F = 1kHz, Av = 1, RL =600
V
out
Channel Separation
68 Degrees
12 dB
9
0.005 %
120 dB
3
0.9
1.5 5
1.8
2.5
µV/°C
50
100
mV
V
mV
V/mV
dB
µs
nV
-----------­Hz
4/16
Electrical Characteristics TS922
Table 4: Electrical characteristics VCC = 5V, V
to V
/2 (unless otherwise specified)
cc
= 0V, V
DD
= Vcc/2, T
icm
= 25°C, RL connected
amb
Symbol Parameter Min. Typ. Max. Unit
V
V
DV
V
Input Offset Voltage TS922 Input Offset voltage TS922A Input Offset Voltage TS922IJ (Flip Chip)
io
T
T
T
min.
amb
max.
TS922 TS922A TS922IJ (Flip Chip)
Input Offset Voltage TS922IJ (flip chip)
io
T
T
T
min.
amb
Input Offset Voltage Drift
io
Input Offset Current
I
io
Vout = Vcc/2
Input Bias Current
I
ib
Vout = Vcc/2
TS922IJ
max.
High Level Output Voltage R
= 10k
OH
L
R
= 600
L
RL = 32
2
130nA
15 100 nA
4.90
4.85
4.4
3
0.9
1.5 5
1.8
2.5
1.5
2.5
µV/°C
Low Level Output Voltage
V
OL
A
vd
I
cc
GBP
= 10k
L
R
= 600
L
RL = 32
Large Signal Voltage Gain (V RL= 10k R
= 600
L
RL = 32
Total Supply Current no load, V
out
= V
cc/2
Gain Bandwidth Product (R
= 600Ω)
L
= 2Vpk-pk)
out
300
200
35 16
23mA
4MHz
50
120
R
CMR Common Mode Rejection Ratio 60 80 dB
SVR
Supply Voltage Rejection Ratio
= 4.5 to 5.5V
V
cc
I
Output Short Circuit Current
o
60 85 dB
50 80 mA
SR Slew Rate 0.7 1.3 V/
φm
G
THD
Phase Margin at Unit Gain
= 600Ω, CL =100pF
R
L
Gain Margin
m
R
= 600Ω, CL =100pF
L
Equivalent Input Noise Voltage
e
n
f = 1kHz
Total Harmonic Distortion V
= 2Vpk-pk, F = 1kHz, Av = 1, RL =600
out
C
Channel Separation
s
68 Degrees
12 dB
9
0.005 %
120 dB
mV
mV
V
mV
V/mV
µs
nV
-----------­Hz
5/16
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