TS912, TS912A, TS912B
Rail-to-rail CMOS dual operational amplifier
Features
■Rail-to-rail input and output voltage ranges
■Single (or dual) supply operation from 2.7 to 16 V
■Extremely low input bias current: 1 pA typ.
■Low input offset voltage: 2 mV max.
■Specified for 600 Ω and 100 Ω loads
■Low supply current: 200 μA/amplifier (VCC = 3 V)
■Latch-up immunity
■ESD tolerance: 3 kV
■Spice macromodel included in this specification
Description
The TS912 is a rail-to-rail CMOS dual operational amplifier designed to operate with a single or dual supply voltage.
The input voltage range Vicm includes the two supply rails VCC+ and VCC-.
The output reaches VCC- +30 mV, VCC+ -40 mV,
with RL = 10 kΩ and VCC- +300 mV, VCC+ - 400 mV, with RL = 600 Ω.
This product offers a broad supply voltage operating range from 2.7 to 16 V and a supply current of only 200 μA/amp (VCC = 3 V).
Source and sink output current capability is typically 40 mA (at VCC = 3 V), fixed by an internal limitation circuit.
N
DIP-8
(Plastic package)
D
SO-8
(Plastic micropackage)
Pin connections (top view)
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February 2010 |
Doc ID 2325 Rev 6 |
1/20 |
www.st.com
Absolute maximum ratings and operating conditions |
TS912, TS912A, TS912B |
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Table 1. |
Absolute maximum ratings |
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Symbol |
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Parameter |
Value |
Unit |
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VCC |
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Supply voltage (1) |
18 |
V |
Vid |
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Differential input voltage (2) |
±18 |
V |
V |
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Input voltage (3) |
-0.3 to 18 |
V |
i |
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Iin |
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Current on inputs |
±50 |
mA |
Io |
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Current on outputs |
±130 |
mA |
Tstg |
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Storage temperature |
-65 to +150 |
°C |
Tj |
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Maximum junction temperature |
150 |
°C |
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Thermal resistance junction to ambient (4) |
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Rthja |
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DIP8 |
85 |
°C/W |
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SO-8 |
125 |
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Thermal resistance junction to case (4) |
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Rthjc |
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DIP8 |
41 |
°C/W |
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SO-8 |
40 |
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HBM: human body model(5) |
3 |
kV |
ESD |
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MM: machine model(6) |
200 |
V |
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CDM: charged device model(7) |
1500 |
V |
1.All voltage values, except differential voltage are with respect to network ground terminal.
2.Differential voltages are non-inverting input terminal with respect to the inverting input terminal.
3.The magnitude of input and output voltages must never exceed VCC+ +0.3 V.
4.Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. These values are typical.
5.Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
6.Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating.
7.Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins.
Table 2. |
Operating conditions |
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Symbol |
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Parameter |
Value |
Unit |
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VCC |
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Supply voltage |
2.7 to 16 |
V |
Vicm |
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Common mode input voltage range |
VCC--0.2 to VCC++0.2 |
V |
Toper |
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Operating free air temperature range |
-40 to + 125 |
°C |
2/20 |
Doc ID 2325 Rev 6 |
TS912, TS912A, TS912B |
Schematic diagram |
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Doc ID 2325 Rev 6 |
3/20 |
Electrical characteristics |
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TS912, TS912A, TS912B |
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3 |
Electrical characteristics |
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Table 3. |
VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise |
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specified) |
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Symbol |
Parameter |
Min. |
Typ. |
Max. |
Unit |
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Input offset voltage (Vic = Vo = VCC/2) |
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TS912 |
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10 |
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TS912A |
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5 |
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Vio |
TS912B |
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2 |
mV |
Tmin ≤ Tamb ≤ Tmax |
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TS912 |
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12 |
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TS912A |
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7 |
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TS912B |
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3 |
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Vio |
Input offset voltage drift |
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5 |
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μV/°C |
Iio |
Input offset current (1) |
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1 |
100 |
pA |
Tmin ≤ Tamb ≤ Tmax |
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200 |
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Iib |
Input bias current (1) |
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1 |
150 |
pA |
Tmin ≤ Tamb ≤ Tmax |
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300 |
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ICC |
Supply current (per amplifier, AVCL = 1, no load) |
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200 |
300 |
μA |
Tmin ≤ Tamb ≤ Tmax |
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400 |
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CMR |
Common mode rejection ratio |
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70 |
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dB |
Vic = 0 to 3 V, Vo = 1.5 V |
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SVR |
Supply voltage rejection ratio (VCC+ = 2.7 to 3.3 V, Vo = VCC/2) |
50 |
80 |
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dB |
Avd |
Large signal voltage gain (RL = 10 kΩ, Vo = 1.2 V to 1.8 V) |
3 |
10 |
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V/mV |
Tmin ≤ Tamb ≤ Tmax |
2 |
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High level output voltage (Vid = 1 V) |
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RL = 100 kΩ |
2.95 |
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RL = 10 kΩ |
2.9 |
2.96 |
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VOH |
RL = 600 Ω |
2.3 |
2.6 |
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V |
RL = 100 Ω |
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2 |
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Tmin ≤ Tamb ≤ Tmax |
2.8 |
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RL = 10 kΩ |
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RL = 600 Ω |
2.1 |
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Low level output voltage (Vid = -1 V) |
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RL = 100 kΩ |
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50 |
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RL = 10 kΩ |
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30 |
70 |
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VOL |
RL = 600 Ω |
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300 |
400 |
mV |
RL = 100 Ω |
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900 |
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Tmin ≤ Tamb ≤ Tmax |
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RL = 10 kΩ |
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100 |
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RL = 600 Ω |
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600 |
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Io |
Output short-circuit current (Vid = ±1 V) |
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mA |
Source (Vo = VCC-) |
20 |
40 |
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Sink (Vo = VCC+) |
20 |
40 |
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GBP |
Gain bandwidth product |
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0.8 |
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MHz |
(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz) |
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4/20 |
Doc ID 2325 Rev 6 |
TS912, TS912A, TS912B |
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Electrical characteristics |
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Table 3. |
VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise |
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specified) (continued) |
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Symbol |
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Parameter |
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Min. |
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Typ. |
Max. |
Unit |
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SR+ |
Slew rate (A |
= 1, R |
L |
= 10 kΩ, C |
= 100 pF, V |
= 1.3 V to 1.7 V) |
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0.4 |
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V/μs |
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VCL |
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L |
i |
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SR- |
Slew rate (A |
= 1, R |
L |
= 10 kΩ, C |
= 100 pF, V |
= 1.3 V to 1.7 V) |
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0.3 |
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V/μs |
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VCL |
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L |
i |
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φm |
Phase margin |
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30 |
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Degrees |
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en |
Equivalent input noise voltage (Rs = 100 Ω, f = 1 kHz) |
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30 |
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nV/√Hz |
1. Maximum values include unavoidable inaccuracies of the industrial tests.
Doc ID 2325 Rev 6 |
5/20 |
Electrical characteristics |
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TS912, TS912A, TS912B |
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Table 4. |
VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise |
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specified) |
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Symbol |
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Parameter |
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Min. |
Typ. |
Max. |
Unit |
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Input offset voltage (Vic = Vo = VCC/2) |
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TS912 |
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10 |
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TS912A |
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5 |
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Vio |
TS912B |
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2 |
mV |
Tmin ≤ Tamb |
≤ Tmax |
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TS912 |
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12 |
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TS912A |
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7 |
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TS912B |
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3 |
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Vio |
Input offset voltage drift |
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5 |
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μV/°C |
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Iio |
Input offset current (1) |
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1 |
100 |
pA |
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Tmin ≤ Tamb |
≤ Tmax |
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200 |
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Iib |
Input bias current (1) |
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1 |
150 |
pA |
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Tmin ≤ Tamb |
≤ Tmax |
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300 |
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ICC |
Supply current (per amplifier, AVCL = 1, no load) |
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230 |
350 |
μA |
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Tmin ≤ Tamb |
≤ Tmax |
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450 |
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CMR |
Common mode rejection ratio |
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60 |
85 |
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dB |
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Vic = 1.5 to 3.5 V, Vo = 2.5 V |
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SVR |
Supply voltage rejection ratio (VCC+ = 3 to 5 V, Vo = VCC/2) |
55 |
80 |
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dB |
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Avd |
Large signal voltage gain (RL = 10 kΩ, Vo = 1.5 V to 3.5 V) |
10 |
40 |
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V/mV |
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Tmin ≤ Tamb |
≤ Tmax |
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7 |
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High level output voltage (Vid = 1V) |
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RL = 100 kΩ |
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4.95 |
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RL = 10 kΩ |
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4.9 |
4.95 |
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VOH |
RL = 600 Ω |
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4.25 |
4.55 |
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V |
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RL = 100 |
Ω |
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3.7 |
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Tmin ≤ Tamb ≤ Tmax |
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RL = 10 kΩ |
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4.8 |
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RL = 600 Ω |
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4.1 |
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Low level output voltage (Vid = -1 V) |
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RL = 100 kΩ |
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50 |
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RL = 10 kΩ |
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40 |
100 |
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VOL |
RL = 600 Ω |
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350 |
500 |
mV |
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RL = 100 |
Ω |
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1400 |
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Tmin ≤ Tamb ≤ Tmax |
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RL = 10 kΩ |
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150 |
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RL = 600 Ω |
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750 |
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Io |
Output short-circuit current (Vid = ±1 V) |
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mA |
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Source (Vo = VCC-) |
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45 |
65 |
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Sink (Vo = VCC+) |
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45 |
65 |
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GBP |
Gain bandwidth product |
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1 |
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MHz |
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(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz) |
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SR+ |
Slew rate (A |
VCL |
= 1, R |
L |
= 10 kΩ, C |
= 100 pF, V |
= 1 V to 4 V) |
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0.8 |
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V/μs |
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L |
i |
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SR- |
Slew rate (A |
VCL |
= 1, R |
L |
= 10 kΩ, C |
= 100 pF, V |
= 1 V to 4 V) |
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0.6 |
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V/μs |
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L |
i |
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6/20 |
Doc ID 2325 Rev 6 |