ST TS912, TS912A, TS912B User Manual

TS912, TS912A, TS912B

Rail-to-rail CMOS dual operational amplifier

Features

■Rail-to-rail input and output voltage ranges

■Single (or dual) supply operation from 2.7 to 16 V

■Extremely low input bias current: 1 pA typ.

■Low input offset voltage: 2 mV max.

■Specified for 600 Ω and 100 Ω loads

■Low supply current: 200 μA/amplifier (VCC = 3 V)

■Latch-up immunity

■ESD tolerance: 3 kV

■Spice macromodel included in this specification

Description

The TS912 is a rail-to-rail CMOS dual operational amplifier designed to operate with a single or dual supply voltage.

The input voltage range Vicm includes the two supply rails VCC+ and VCC-.

The output reaches VCC- +30 mV, VCC+ -40 mV,

with RL = 10 kΩ and VCC- +300 mV, VCC+ - 400 mV, with RL = 600 Ω.

This product offers a broad supply voltage operating range from 2.7 to 16 V and a supply current of only 200 μA/amp (VCC = 3 V).

Source and sink output current capability is typically 40 mA (at VCC = 3 V), fixed by an internal limitation circuit.

N

DIP-8

(Plastic package)

D

SO-8

(Plastic micropackage)

Pin connections (top view)

February 2010

Doc ID 2325 Rev 6

1/20

www.st.com

Absolute maximum ratings and operating conditions	TS912, TS912A, TS912B

1 Absolute maximum ratings and operating conditions

Table 1.	Absolute maximum ratings
Symbol		Parameter	Value	Unit
VCC		Supply voltage (1)	18	V
Vid		Differential input voltage (2)	±18	V
V		Input voltage (3)	-0.3 to 18	V
i
Iin		Current on inputs	±50	mA
Io		Current on outputs	±130	mA
Tstg		Storage temperature	-65 to +150	°C
Tj		Maximum junction temperature	150	°C
		Thermal resistance junction to ambient (4)
Rthja		DIP8	85	°C/W
		SO-8	125
		Thermal resistance junction to case (4)
Rthjc		DIP8	41	°C/W
		SO-8	40
		HBM: human body model(5)	3	kV
ESD		MM: machine model(6)	200	V
		CDM: charged device model(7)	1500	V

1.All voltage values, except differential voltage are with respect to network ground terminal.

2.Differential voltages are non-inverting input terminal with respect to the inverting input terminal.

3.The magnitude of input and output voltages must never exceed VCC+ +0.3 V.

4.Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all amplifiers. These values are typical.

5.Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.

6.Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating.

7.Charged device model: all pins and the package are charged together to the specified voltage and then discharged directly to the ground through only one pin. This is done for all pins.

Table 2.	Operating conditions
Symbol		Parameter	Value	Unit
VCC		Supply voltage	2.7 to 16	V
Vicm		Common mode input voltage range	VCC--0.2 to VCC++0.2	V
Toper		Operating free air temperature range	-40 to + 125	°C

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TS912, TS912A, TS912B	Schematic diagram

2 Schematic diagram

Figure 1. Schematic diagram (1/2 TS912)

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Electrical characteristics			TS912, TS912A, TS912B
3	Electrical characteristics
Table 3.	VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
	specified)
Symbol	Parameter	Min.	Typ.	Max.	Unit
	Input offset voltage (Vic = Vo = VCC/2)
	TS912			10
	TS912A			5
Vio	TS912B			2	mV
	Tmin ≤ Tamb ≤ Tmax
	TS912			12
	TS912A			7
	TS912B			3
Vio	Input offset voltage drift		5		μV/°C
Iio	Input offset current (1)		1	100	pA
	Tmin ≤ Tamb ≤ Tmax			200
Iib	Input bias current (1)		1	150	pA
	Tmin ≤ Tamb ≤ Tmax			300
ICC	Supply current (per amplifier, AVCL = 1, no load)		200	300	μA
	Tmin ≤ Tamb ≤ Tmax			400
CMR	Common mode rejection ratio		70		dB
	Vic = 0 to 3 V, Vo = 1.5 V
SVR	Supply voltage rejection ratio (VCC+ = 2.7 to 3.3 V, Vo = VCC/2)	50	80		dB
Avd	Large signal voltage gain (RL = 10 kΩ, Vo = 1.2 V to 1.8 V)	3	10		V/mV
	Tmin ≤ Tamb ≤ Tmax	2
	High level output voltage (Vid = 1 V)
	RL = 100 kΩ	2.95
	RL = 10 kΩ	2.9	2.96
VOH	RL = 600 Ω	2.3	2.6		V
	RL = 100 Ω		2
	Tmin ≤ Tamb ≤ Tmax	2.8
	RL = 10 kΩ
	RL = 600 Ω	2.1
	Low level output voltage (Vid = -1 V)
	RL = 100 kΩ			50
	RL = 10 kΩ		30	70
VOL	RL = 600 Ω		300	400	mV
	RL = 100 Ω		900
	Tmin ≤ Tamb ≤ Tmax
	RL = 10 kΩ			100
	RL = 600 Ω			600
Io	Output short-circuit current (Vid = ±1 V)				mA
	Source (Vo = VCC-)	20	40
	Sink (Vo = VCC+)	20	40
GBP	Gain bandwidth product		0.8		MHz
	(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz)

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TS912, TS912A, TS912B								Electrical characteristics
Table 3.	VCC+ = 3 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise
	specified) (continued)
Symbol				Parameter			Min.		Typ.	Max.	Unit
SR+	Slew rate (A	= 1, R	L	= 10 kΩ, C	= 100 pF, V	= 1.3 V to 1.7 V)			0.4		V/μs
	VCL			L	i
SR-	Slew rate (A	= 1, R	L	= 10 kΩ, C	= 100 pF, V	= 1.3 V to 1.7 V)			0.3		V/μs
	VCL			L	i
φm	Phase margin								30		Degrees
en	Equivalent input noise voltage (Rs = 100 Ω, f = 1 kHz)								30		nV/√Hz

1. Maximum values include unavoidable inaccuracies of the industrial tests.

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Electrical characteristics

TS912, TS912A, TS912B

Table 4.

VCC+ = 5 V, VCC- = 0 V, RL, CL connected to VCC/2, Tamb = 25°C (unless otherwise

specified)

Symbol

Parameter

Min.

Typ.

Max.

Unit

Input offset voltage (Vic = Vo = VCC/2)

TS912

10

TS912A

5

Vio

TS912B

2

mV

Tmin ≤ Tamb

≤ Tmax

TS912

12

TS912A

7

TS912B

3

Vio

Input offset voltage drift

5

μV/°C

Iio

Input offset current (1)

1

100

pA

Tmin ≤ Tamb

≤ Tmax

200

Iib

Input bias current (1)

1

150

pA

Tmin ≤ Tamb

≤ Tmax

300

ICC

Supply current (per amplifier, AVCL = 1, no load)

230

350

μA

Tmin ≤ Tamb

≤ Tmax

450

CMR

Common mode rejection ratio

60

85

dB

Vic = 1.5 to 3.5 V, Vo = 2.5 V

SVR

Supply voltage rejection ratio (VCC+ = 3 to 5 V, Vo = VCC/2)

55

80

dB

Avd

Large signal voltage gain (RL = 10 kΩ, Vo = 1.5 V to 3.5 V)

10

40

V/mV

Tmin ≤ Tamb

≤ Tmax

7

High level output voltage (Vid = 1V)

RL = 100 kΩ

4.95

RL = 10 kΩ

4.9

4.95

VOH

RL = 600 Ω

4.25

4.55

V

RL = 100

Ω

3.7

Tmin ≤ Tamb ≤ Tmax

RL = 10 kΩ

4.8

RL = 600 Ω

4.1

Low level output voltage (Vid = -1 V)

RL = 100 kΩ

50

RL = 10 kΩ

40

100

VOL

RL = 600 Ω

350

500

mV

RL = 100

Ω

1400

Tmin ≤ Tamb ≤ Tmax

RL = 10 kΩ

150

RL = 600 Ω

750

Io

Output short-circuit current (Vid = ±1 V)

mA

Source (Vo = VCC-)

45

65

Sink (Vo = VCC+)

45

65

GBP

Gain bandwidth product

1

MHz

(AVCL = 100, RL = 10 kΩ, CL = 100 pF, f = 100 kHz)

SR+

Slew rate (A

VCL

= 1, R

L

= 10 kΩ, C

= 100 pF, V

= 1 V to 4 V)

0.8

V/μs

L

i

SR-

Slew rate (A

VCL

= 1, R

L

= 10 kΩ, C

= 100 pF, V

= 1 V to 4 V)

0.6

V/μs

L

i

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