TS4990
1.2 W audio power amplifier with active-low standby mode
Features
■ Operating range from V
■ 1.2 W output power at V
F = 1 kHz, with 8 Ω load
■ Ultra-low consumption in standby mode (10 nA)
■ 62 dB PSRR at 217 Hz in grounded mode
■ Near-zero pop and click
■ Ultra-low distortion (0.1%)
■ Unity gain stable
■ Available in 9-bump flip-chip, miniSO-8 and
DFN8 packages
= 2.2 V to 5.5 V
CC
= 5 V, THD = 1%,
CC
Applications
■ Mobile phones (cellular / cordless)
■ Laptop / notebook computers
■ PDAs
■ Portable audio devices
Description
The TS4990 is designed for demanding audio
applications such as mobile phones to reduce the
number of external components.
This audio power amplifier is capable of delivering
1.2 W of continuous RMS output power into an
8 Ω load at 5 V.
TS4990IJT/TS4990EIJT - Flip-chip 9 bumps
Vin+
Vin+
VOUT1 GND
VOUT1 GND
Vin- GND BYPASS
Vin- GND BYPASS
VCC
VCC
STBY
STBY
VOUT2
VOUT2
TS4990IST - MiniSO-8
TS4990IQT - DFN8
STANDBY
BYPASS
V
IN+
V
IN–
1
2
3
4
V
8
OUT2
7
GND
V
6
CC
V
5
OUT1
An externally controlled standby mode reduces
TS4990ID/TS4990IDT - SO-8
the supply current to less than 10 nA. It also
includes an internal thermal shutdown protection.
STBY
STBY
1
1
8
8
VOUT2
VOUT2
The unity-gain stable amplifier can be configured
2
VIN+
VIN+
VIN-
VIN-
2
3
3
4
4
by external gain setting resistors.
BYPASS
BYPASS
August 2011 Doc ID 9309 Rev 13 1/33
7
7
6
6
5
5
GND
GND
V
V
CC
CC
VOUT1
VOUT1
www.st.com
33
Contents TS4990
Contents
1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 3
2 Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1 BTL configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2 Gain in a typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.3 Low and high frequency response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.4 Power dissipation and efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.5 Decoupling of the circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.6 Wake-up time (t
4.7 Standby time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.8 Pop performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.9 Application example: differential input, BTL power amplifier . . . . . . . . . . 23
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
WU
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1 Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.2 MiniSO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
5.3 DFN8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.4 SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
2/33 Doc ID 9309 Rev 13
TS4990 Absolute maximum ratings and operating conditions
1 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
Symbol Parameter Value Unit
(2)
(1)
6V
GND to V
CC
V
T
T
CC
V
oper
stg
T
Supply voltage
in
Input voltage
Operating free-air temperature range -40 to + 85 °C
Storage temperature -65 to +150 °C
j
Maximum junction temperature 150 °C
Thermal resistance junction to ambient
R
thja
P
diss
ESD
Flip-chip
(3)
MiniSO-8
DFN8
Power dissipation Internally limited
HBM: Human body model
MM: Machine model
(4)
(5)
250
215
120
2
200
°C/W
kV
Latch-up immunity 200 mA
Lead temperature (soldering, 10sec)
Lead temperature (soldering, 10sec) for lead-free version
1. All voltage values are measured with respect to the ground pin.
2. The magnitude of the input signal must never exceed V
3. The device is protected in case of over temperature by a thermal shutdown active at 150° C.
4. Human body model: A 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor
between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.
5. Machine model: A 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the
device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations
while the other pins are floating.
Table 2. Operating conditions
+ 0.3 V / GND - 0.3 V.
CC
250
260
°C
V
V
Symbol Parameter Value Unit
V
CC
V
icm
Supply voltage 2.2 to 5.5 V
Common mode input voltage range 1.2V to V
CC
Standby voltage input:
V
STBY
R
T
SD
Device ON
Device OFF
L
Load resistor ≥ 4 Ω
1.35 ≤ V
GND ≤ V
Thermal shutdown temperature 150 °C
STBY
STBY
≤ V
≤ 0.4
CC
Thermal resistance junction to ambient
R
thja
Flip-chip
MiniSO-8
DFN8
1. This thermal resistance is reached with a 100 mm2 copper heatsink surface.
2. When mounted on a 4-layer PCB.
(1)
(2)
100
190
40
Doc ID 9309 Rev 13 3/33
V
V
°C/W
Typical application schematics TS4990
2 Typical application schematics
Figure 1. Typical application schematics
Rfeed
Cfeed Vcc
+
Cs
Audio In
Table 3. Component descriptions
Cin
Standby
Control
Rin
Cb
Vin-
-
Vin+
+
Bypass
Standby
+
Bias
VCC
-
AV = -1
+
GND
Component Functional description
R
in
Inverting input resistor that sets the closed loop gain in conjunction with R
resistor also forms a high pass filter with Cin (Fc = 1 / (2 x Pi x Rin x Cin)).
Vout 1
Vout 2
TS4990
Speaker
8Ohms
feed
. This
C
in
R
feed
C
s
C
b
C
feed
A
V
Exposed pad
Input coupling capacitor that blocks the DC voltage at the amplifier input terminal.
Feed back resistor that sets the closed loop gain in conjunction with Rin.
Supply bypass capacitor that provides power supply filtering.
Bypass pin capacitor that provides half supply filtering.
Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off
frequency 1/ (2 x Pi x R
feed
x C
feed
Closed loop gain in BTL configuration = 2 x (R
DFN8 exposed pad is electrically connected to pin 7. See DFN8 package
information on page 29 for more information.
4/33 Doc ID 9309 Rev 13
)).
feed
/ Rin).
TS4990 Electrical characteristics
3 Electrical characteristics
Table 4. Electrical characteristics when VCC= +5 V, GND = 0 V, T
(unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
amb
=25°C
I
I
STBY
V
P
THD + N
PSRR
Supply current
CC
No input signal, no load
Standby current
No input signal, V
Output offset voltage
oo
No input signal, RL = 8 Ω
Output power
out
THD = 1% max, F = 1kHz, R
Total harmonic distortion + noise
= 1W
P
out
, AV = 2, 20Hz ≤ F ≤ 20kHz, RL = 8 Ω
rms
Power supply rejection ratio
RL = 8 Ω, AV = 2, V
F = 217Hz
(1)
= GND, RL = 8Ω
STBY
= 8 Ω
L
(2)
= 200mVpp, input grounded
ripple
F = 1kHz
t
WU
t
STBY
V
STBYH
V
STBYL
Φ
GM
GBP
R
OUT-GND
1. Standby mode is active when V
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(V
V
Wake-up time (Cb = 1 µF) 90 130 ms
Standby time (Cb = 1 µF) 10 µs
Standby voltage level high 1.3 V
Standby voltage level low 0.4 V
Phase margin at unity gain
M
RL = 8 Ω, CL = 500 pF
Gain margin
R
= 8 Ω, CL = 500 pF
L
Gain bandwidth product
= 8 Ω
R
L
Resistor output to GND (V
V
out1
V
out2
.
CC
STBY
≤ V
STBY
is tied to GND.
out
)/rms(V
STBYL
ripple
)
)). V
is the sinusoidal signal superimposed upon
ripple
3.7 6 mA
10 1000 nA
110mV
0.9 1.2 W
0.2 %
55
55
62
64
dB
65 Degrees
15 dB
1.5 MHz
3
kΩ
43
Doc ID 9309 Rev 13 5/33
Electrical characteristics TS4990
Table 5. Electrical characteristics when VCC= +3.3 V, GND = 0 V, T
amb
= 25°C
(unless otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
I
CC
I
STBY
V
P
Supply current
No input signal, no load
Standby current
No input signal, V
Output offset voltage
oo
No input signal, RL = 8 Ω
Output power
out
THD = 1% max, F = 1 kHz, RL = 8 Ω
(1)
STBY
= GND, RL = 8 Ω
Total harmonic distortion + noise
THD + N
= 400 mW
P
out
, AV = 2, 20 Hz ≤ F ≤ 20 kHz,
rms
RL=8 Ω
(2)
= 200mVpp, input grounded
PSRR
Power supply rejection ratio
RL = 8 Ω, AV = 2, V
ripple
F = 217 Hz
F = 1 kHz
t
WU
t
STBY
V
STBYH
V
STBYL
Φ
GM
GBP
R
OUT-GND
1. Standby mode is active when V
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(V
V
Wake-up time (Cb = 1 µF) 110 140 ms
Standby time (Cb = 1 µF) 10 µs
Standby voltage level high 1.2 V
Standby voltage level low 0.4 V
Phase margin at unity gain
M
RL = 8 Ω, CL = 500 pF
Gain margin
= 8 Ω, CL = 500 pF
R
L
Gain bandwidth product
= 8 Ω
R
L
Resistor output to GND (V
V
out1
V
out2
.
CC
STBY
≤ V
STBY
is tied to GND.
out
)/rms(V
STBYL
ripple
)). V
)
is the sinusoidal signal superimposed upon
ripple
3.3 6 mA
10 1000 nA
110mV
375 500 mW
0.1 %
55
55
61
63
dB
65 Degrees
15 dB
1.5 MHz
4
kΩ
44
6/33 Doc ID 9309 Rev 13
TS4990 Electrical characteristics
Table 6. Electrical characteristics when V
= 2.6V, GND = 0V, T
CC
= 25°C (unless
amb
otherwise specified)
Symbol Parameter Min. Typ. Max. Unit
I
CC
I
STBY
V
P
Supply current
No input signal, no load
Standby current
No input signal, V
Output offset voltage
oo
No input signal, RL = 8 Ω
Output power
out
THD = 1% max, F = 1 kHz, RL = 8 Ω
(1)
STBY
= GND, RL = 8 Ω
Total harmonic distortion + noise
THD + N
= 200 mW
P
out
, AV = 2, 20 Hz ≤ F ≤ 20 kHz,
rms
RL=8 Ω
(2)
= 200 mVpp, input grounded
PSRR
Power supply rejection ratio
RL = 8 Ω, AV = 2, V
ripple
F = 217 Hz
F = 1 kHz
t
WU
t
STBY
V
STBYH
V
STBYL
Φ
GM
GBP
R
OUT-GND
1. Standby mode is active when V
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(V
V
Wake-up time (Cb = 1 µF) 125 150 ms
Standby time (Cb = 1 µF) 10 µs
Standby voltage level high 1.2 V
Standby voltage level low 0.4 V
Phase margin at unity gain
M
RL = 8 Ω, CL = 500 pF
Gain margin
= 8 Ω, CL = 500 pF
R
L
Gain bandwidth product
= 8 Ω
R
L
Resistor output to GND (V
V
out1
V
out2
.
CC
STBY
≤ V
STBY
is tied to GND.
out
)/rms(V
STBYL
ripple
)
)). V
is the sinusoidal signal superimposed upon
ripple
3.1 6 mA
10 1000 nA
110mV
220 300 mW
0.1 %
55
55
60
62
dB
65 Degrees
15 dB
1.5 MHz
6
kΩ
46
Doc ID 9309 Rev 13 7/33
Electrical characteristics TS4990
0.1 1 10 100 1000 10000
-60
-40
-20
0
20
40
60
-200
-160
-120
-80
-40
0
Gain
Phase
Gain (dB)
Frequency (kHz)
Vcc = 3.3V
RL = 8
Ω
Tamb = 25°C
Phase (°)
Figure 2. Open loop frequency response Figure 3. Open loop frequency response
60
40
20
0
Gain (dB)
-20
-40
-60
0.1 1 10 100 1000 10000
Phase
Vcc = 5V
RL = 8
Ω
Tamb = 25°C
Frequency (kHz)
Gain
0
-40
-80
-120
-160
-200
Phase (°)
Figure 4. Open loop frequency response Figure 5. Open loop frequency response
60
40
20
0
Gain (dB)
-20
-40
-60
0.1 1 10 100 1000 10000
Vcc = 2.6V
RL = 8
Ω
Tamb = 25°C
Phase
Gain
Frequency (kHz)
0
-40
-80
-120
-160
-200
100
80
60
40
Phase (°)
20
Gain (dB)
0
-20
-40
0.1 1 10 100 1000 10000
Vcc = 5V
CL = 560pF
Tamb = 25°C
Gain
Phase
Frequency (kHz)
0
-40
-80
-120
-160
-200
Phase (°)
Figure 6. Open loop frequency response Figure 7. Open loop frequency response
100
80
60
40
20
Gain (dB)
0
Vcc = 3.3V
-20
CL = 560pF
Tamb = 25°C
-40
0.1 1 10 100 1000 10000
8/33 Doc ID 9309 Rev 13
Gain
Phase
Frequency (kHz)
0
-40
-80
Phase (°)
-120
-160
-200
100
80
60
40
20
Gain (dB)
0
-20
-40
0.1 1 10 100 1000 10000
Vcc = 2.6V
CL = 560pF
Tamb = 25°C
Gain
Phase
Frequency (kHz)
0
-40
-80
-120
-160
-200
Phase (°)
TS4990 Electrical characteristics
100 1000 10000 100000
-50
-40
-30
-20
-10
0
Vcc :
2.2V
2.6V
3.3V
5V
Vripple = 200mVpp
Av = 10
Input = Grounded
Cb = Cin = 1μF
RL >= 4
Ω
Tamb = 25°C
PSRR (dB)
Frequency (Hz)
100 1000 10000 100000
-60
-50
-40
-30
-20
-10
0
Vcc :
2.2V
2.6V
3.3V
5V
Vripple = 200mVpp
Av = 5
Input = Grounded
Cb = Cin = 1μF
RL >= 4
Ω
Tamb = 25°C
PSRR (dB)
Frequency (Hz)
100 1000 10000 100000
-80
-70
-60
-50
-40
-30
-20
-10
0
Vcc = 2.2, 2.6, 3.3, 5V
Vripple = 200mVpp
Rfeed = 22kΩ
Input = Floating
Cb = 0.1μF
RL >= 4
Ω
Tamb = 25°C
PSRR (dB)
Frequency (Hz)
Figure 8. PSRR vs. power supply Figure 9. PSRR vs. power supply
0
Vripple = 200mVpp
-10
Av = 2
Input = Grounded
-20
Cb = Cin = 1μF
RL >= 4
-30
-40
PSRR (dB)
-50
-60
-70
Ω
Tamb = 25°C
100 1000 10000 100000
Vcc :
2.2V
2.6V
3.3V
5V
Frequency (Hz)
Figure 10. PSRR vs. power supply Figure 11. PSRR vs. power supply
0
Vripple = 200mVpp
-10
Rfeed = 22kΩ
Input = Floating
-20
Cb = 1μF
RL >= 4
-30
-40
PSRR (dB)
-50
-60
-70
-80
Ω
Tamb = 25°C
100 1000 10000 100000
Vcc = 2.2, 2.6, 3.3, 5V
Frequency (Hz)
Figure 12. PSRR vs. power supply Figure 13. PSRR vs. power supply
0
Vripple = 200mVpp
-10
Av = 2
Input = Grounded
Cb = 0.1μF, Cin = 1μF
-20
RL >= 4
Tamb = 25°C
-30
PSRR (dB)
-40
-50
-60
Vcc = 5, 3.3, 2.5 & 2.2V
100 1000 10000 100000
Ω
Frequency (Hz)
Doc ID 9309 Rev 13 9/33
Electrical characteristics TS4990
-5-4-3-2-1012345
-50
-40
-30
-20
-10
0
Vcc = 5V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 10
Tamb = 25°C
PSRR (dB)
Differential DC Output Voltage (V)
-5-4-3-2-1012345
-60
-50
-40
-30
-20
-10
0
Vcc = 5V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 5
Tamb = 25°C
PSRR (dB)
Differential DC Output Voltage (V)
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
-50
-40
-30
-20
-10
0
Vcc = 3.3V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 10
Tamb = 25°C
PSRR (dB)
Differential DC Output Voltage (V)
Figure 14. PSRR vs. DC output voltage Figure 15. PSRR vs. DC output voltage
0
-10
-20
-30
-40
PSRR (dB)
-50
-60
-70
-5-4-3-2-1012345
Vcc = 5V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 2
Tamb = 25°C
Differential DC Output Voltage (V)
Figure 16. PSRR vs. DC output voltage Figure 17. PSRR vs. DC output voltage
0
-10
-20
-30
PSRR (dB)
-40
Vcc = 3.3V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 5
Tamb = 25°C
-50
-60
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
Differential DC Output Voltage (V)
Figure 18. PSRR vs. DC output voltage Figure 19. PSRR vs. DC output voltage
0
-10
-20
-30
-40
PSRR (dB)
-50
-60
-70
-3.0 -2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0
10/33 Doc ID 9309 Rev 13
Vcc = 3.3V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 2
Tamb = 25°C
Differential DC Output Voltage (V)
TS4990 Electrical characteristics
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
-50
-40
-30
-20
-10
0
Vcc = 2.6V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 10
Tamb = 25°C
PSRR (dB)
Differential DC Output Voltage (V)
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
-60
-50
-40
-30
-20
-10
0
Vcc = 2.6V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 5
Tamb = 25°C
PSRR (dB)
Differential DC Output Voltage (V)
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
THD+N=10%
RL = 8
Ω
F = 1kHz
BW < 125kHz
Tamb = 25°C
THD+N=1%
Output power (W)
Vcc (V)
Figure 20. PSRR vs. DC output voltage Figure 21. PSRR vs. DC output voltage
0
-10
-20
-30
-40
PSRR (dB)
-50
-60
-70
-2.5 -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5
Figure 22. Output power vs. power supply
Vcc = 2.6V
Vripple = 200mVpp
RL = 8
Ω
Cb = 1μF
AV = 2
Tamb = 25°C
Differential DC Output Voltage (V)
Figure 23. PSRR vs. DC output voltage
voltage
2.4
RL = 4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
Output power (W)
0.6
0.4
0.2
0.0
Ω
F = 1kHz
BW < 125kHz
Tamb = 25°C
2.5 3.0 3.5 4.0 4.5 5.0 5.5
THD+N=10%
THD+N=1%
Vcc (V)
Figure 24. PSRR at F = 217 Hz vs.
bypass capacitor
-30
-40
-50
Av=2
Vcc:
-60
2.6V
PSRR at 217Hz (dB)
3.3V
5V
-70
-80
0.1 1
Av=5
Vcc:
2.6V
3.3V
5V
Bypass Capacitor Cb ( F)
Figure 25. Output power vs. power supply
voltage
Av=10
Vcc:
2.6V
3.3V
5V
Tamb=25°C
Doc ID 9309 Rev 13 11/33
Electrical characteristics TS4990
4 8 12 16 20 24 28 32
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
THD+N=10%
Vcc = 5V
F = 1kHz
BW < 125kHz
Tamb = 25°C
THD+N=1%
Output power (W)
Load Resistance ( )
2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.0
0.1
0.2
0.3
0.4
0.5
0.6
THD+N=10%
RL = 32
Ω
F = 1kHz
BW < 125kHz
Tamb = 25°C
THD+N=1%
Output power (W)
Vcc (V)
Figure 26. Output power vs. power supply
Figure 27. Output power vs. load resistor
voltage
1.2
RL = 16
Ω
F = 1kHz
1.0
BW < 125kHz
Tamb = 25°C
0.8
0.6
0.4
Output power (W)
0.2
0.0
2.5 3.0 3.5 4.0 4.5 5.0 5.5
THD+N=10%
THD+N=1%
Vcc (V)
Figure 28. Output power vs. load resistor Figure 29. Output power vs. power supply
voltage
0.6
0.5
0.4
THD+N=10%
0.3
Vcc = 2.6V
F = 1kHz
BW < 125kHz
Tamb = 25°C
0.2
Output power (W)
0.1
0.0
4 8 12 16 20 24 28 32
THD+N=1%
Load Resistance ( )
Figure 30. Output power vs. load resistor Figure 31. Power dissipation vs. P
1.0
0.8
0.6
0.4
Output power (W)
0.2
0.0
12/33 Doc ID 9309 Rev 13
THD+N=1%
8 162432
THD+N=10%
Load Resistance ( )
Vcc = 3.3V
F = 1kHz
BW < 125kHz
Tamb = 25°C
out
1.4
Vcc=5V
F=1kHz
1.2
THD+N<1%
1.0
0.8
0.6
0.4
Power Dissipation (W)
0.2
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
RL=16
Ω
Output Power (W)
RL=4
RL=8
Ω
Ω
TS4990 Electrical characteristics
0 25 50 75 100 125 150
0.0
0.2
0.4
0.6
0.8
1.0
1.2
No Heat sink
Heat sink surface ≈ 100mm
2
(See demoboard)
Flip-Chip Package Power Dissipation (W)
Ambiant Temperature ( C)
0.0 0.1 0.2 0.3 0.4
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
RL=4
Ω
RL=8
Ω
Vcc=2.6V
F=1kHz
THD+N<1%
RL=16
Ω
Power Dissipation (W)
Output Power (W)
012345
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
No load
Tamb=25°C
Current Consumption (mA)
Power Supply Voltage (V)
Figure 32. Power dissipation vs. P
Power Dissipation (W)
out
0.6
Vcc=3.3V
F=1kHz
0.5
THD+N<1%
0.4
0.3
0.2
0.1
0.0
0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
RL=16
Ω
Output Power (W)
RL=8
RL=4
Ω
Ω
Figure 34. Clipping voltage vs. power supply
voltage and load resistor
0.7
Tamb = 25°C
0.6
0.5
0.4
0.3
Vout1 & Vout2
0.2
0.1
Clipping Voltage Low side (V)
0.0
2.5 3.0 3.5 4.0 4.5 5.0
Power supply Voltage (V)
RL = 4
RL = 8
Ω
Ω
RL = 16
Ω
Figure 33. Power derating curves
Figure 35. Power dissipation vs. P
out
Figure 36. Clipping voltage vs. power supply
voltage and load resistor
0.6
Tamb = 25°C
0.5
0.4
0.3
Vout1 & Vout2
0.2
0.1
Clipping Voltage High side (V)
0.0
2.5 3.0 3.5 4.0 4.5 5.0
Power supply Voltage (V)
RL = 4
Ω
RL = 8
Ω
RL = 16
Figure 37. Current consumption vs. power
supply voltage
Ω
Doc ID 9309 Rev 13 13/33
Electrical characteristics TS4990
0.0 0.5 1.0 1.5 2.0 2.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Vcc = 2.6V
No load
Tamb=25°C
Current Consumption (mA)
Standby Voltage (V)
0.0 0.5 1.0 1.5 2.0 2.5 3.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
Vcc = 3.3V
No load
Tamb=25°C
Current Consumption (mA)
Standby Voltage (V)
Figure 38. Current consumption vs. standby
voltage @ V
4.0
3.5
3.0
2.5
2.0
1.5
1.0
Current Consumption (mA)
0.5
0.0
012345
Standby Voltage (V)
CC
= 5V
Vcc = 5V
No load
Tamb=25°C
Figure 39. Current consumption vs. standby
voltage @ VCC = 2.6V
Figure 40. THD + N vs. output power Figure 41. Current consumption vs. standby
10
RL = 4Ω
F = 20Hz
Av = 2
Cb = 1μF
BW < 125kHz
1
Tamb = 25°C
voltage @ V
Vcc=2.2V
Vcc=2.6V
= 3.3V
CC
THD + N (%)
0.1
1E-3 0.01 0.1 1
Figure 42. Current consumption vs. standby
voltage @ V
4.0
Vcc = 2.2V
No load
3.5
Tamb=25°C
3.0
2.5
2.0
1.5
1.0
Current Consumption (mA)
0.5
0.0
14/33 Doc ID 9309 Rev 13
0.0 0.5 1.0 1.5 2.0
Vcc=3.3V
Output Power (W)
= 2.2V
CC
Standby Voltage (V)
Vcc=5V
Figure 43. THD + N vs. output power
10
RL = 8
Ω
F = 20Hz
Av = 2
Cb = 1μF
1
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.1
0.01
1E-3 0.01 0.1 1
Vcc=2.2V
Vcc=2.6V
Vcc=3.3V
Output Power (W)
Vcc=5V
TS4990 Electrical characteristics
1E-3 0.01 0.1 1
0.01
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Vcc=2.2V
RL = 8
Ω
F = 1kHz
Av = 2
Cb = 1μF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
1E-3 0.01 0.1 1
0.1
1
10
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Vcc=2.2V
RL = 4Ω
F = 1kHz
Av = 2
Cb = 1μF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
1E-3 0.01 0.1 1
0.1
1
10
Vcc=5VVcc=3.3V
Vcc=2.6V
Vcc=2.2V
RL = 8Ω
F = 20kHz
Av = 2
Cb = 1μF
BW < 125kHz
Tamb = 25°C
THD + N (%)
Output Power (W)
Figure 44. THD + N vs. output power Figure 45. THD + N vs. output power
10
RL = 16
Ω
F = 20kHz
Av = 2
Cb = 1μF
1
BW < 125kHz
Tamb = 25°C
Vcc=2.2V
Vcc=2.6V
THD + N (%)
0.1
0.01
1E-3 0.01 0.1 1
Output Power (W)
Vcc=3.3V
Vcc=5V
Figure 46. THD + N vs. output power Figure 47. THD + N vs. output power
10
RL = 4Ω
F = 20kHz
Av = 2
Cb = 1μF
BW < 125kHz
Tamb = 25°C
1
THD + N (%)
Vcc=2.2V
Vcc=2.6V
0.1
1E-3 0.01 0.1 1
Figure 48. THD + N vs. output power Figure 49. THD + N vs. output power
10
RL = 16
Ω
F = 1kHz
Av = 2
Cb = 1μF
1
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.1
0.01
1E-3 0.01 0.1 1
Output Power (W)
Vcc=2.2V
Vcc=2.6V
Vcc=3.3V
Output Power (W)
Vcc=3.3V
Vcc=5V
Vcc=5V
Doc ID 9309 Rev 13 15/33
Electrical characteristics TS4990
100 1000 10000
0.01
0.1
Vcc=2.2V, Po=130mW
Vcc=5V, Po=1W
RL=8
Ω
Av=2
Cb = 1μF
Bw < 125kHz
Tamb = 25°C
20k20
THD + N (%)
Frequency (Hz)
100 1000 10000
0.1
1
Vcc=2.2V, Po=150mW
Vcc=5V, Po=1.3W
RL=4
Ω
Av=2
Cb = 1μF
Bw < 125kHz
Tamb = 25°C
20k20
THD + N (%)
Frequency (Hz)
2.5 3.0 3.5 4.0 4.5 5.0
70
75
80
85
90
95
Av = 10
Cb = 1μF
THD+N < 0.7%
Tamb = 25°C
RL=16
Ω
RL=4
Ω
RL=8
Ω
Signal to Noise Ratio (dB)
Power Supply Voltage (V)
Figure 50. THD + N vs. output power Figure 51. THD + N vs. frequency
10
RL = 16
Ω
F = 20kHz
Av = 2
Cb = 1μF
1
BW < 125kHz
Tamb = 25°C
THD + N (%)
0.1
0.01
1E-3 0.01 0.1 1
Figure 52. SNR vs. power supply with
Vcc=2.2V
Vcc=2.6V
Vcc=3.3V
Output Power (W)
Vcc=5V
Figure 53. THD + N vs. frequency
unweighted filter (20Hz to 20kHz)
110
RL=16
105
100
Ω
95
90
Av = 2
Signal to Noise Ratio (dB)
Cb = 1μF
85
THD+N < 0.7%
Tamb = 25°C
80
2.5 3.0 3.5 4.0 4.5 5.0
Figure 54. THD + N vs. frequency Figure 55. SNR vs. power supply with
RL=16Ω
Av=2
Cb = 1μF
Bw < 125kHz
Tamb = 25°C
0.1
THD + N (%)
0.01
16/33 Doc ID 9309 Rev 13
RL=8
Ω
RL=4
Ω
Power Supply Voltage (V)
Vcc=5V, Po=0.55W
Vcc=2.2V, Po=100mW
100 1000 10000
Frequency (Hz)
unweighted filter (20Hz to 20kHz)
20k20
TS4990 Electrical characteristics
246810
10
15
20
25
30
35
40
45
Vcc=2.2V to 5.5V
Cb=1μF
RL=8
Ω
Tamb=25°C
A Weighted Filter
Unweighted Filter
Output Noise Voltage ( Vrms)
Closed Loop Gain
246810
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
Vcc=2.2V to 5.5V
Cb=1μF
RL=8
Ω
Tamb=25°C
A Weighted Filter
Unweighted Filter
Output Noise Voltage ( Vrms)
Closed Loop Gain
Figure 56. Signal to noise ratio vs. power
supply with a weighted filter
110
105
100
95
90
Signal to Noise Ratio (dB)
85
80
RL=16
Ω
RL=8
RL=4
Ω
Av = 2
Cb = 1μF
THD+N < 0.7%
Tamb = 25°C
2.5 3.0 3.5 4.0 4.5 5.0
Power Supply Voltage (V)
Ω
Figure 58. Signal to noise ratio vs. power
supply with a weighted filter
100
RL=16
95
Ω
Figure 57. Output noise voltage
device ON
Figure 59. Output noise voltage device in
Standby
90
85
80
Signal to Noise Ratio (dB)
75
70
RL=8
Ω
RL=4
Ω
Av = 10
Cb = 1μF
THD+N < 0.7%
Tamb = 25°C
2.5 3.0 3.5 4.0 4.5 5.0
Power Supply Voltage (V)
Doc ID 9309 Rev 13 17/33
Application information TS4990
4 Application information
4.1 BTL configuration principle
The TS4990 is a monolithic power amplifier with a BTL output type. BTL (bridge tied load)
means that each end of the load is connected to two single-ended output amplifiers. Thus,
we have:
Single-ended output 1 = V
Single-ended output 2 = V
and V
out1
- V
out2
= 2V
out
The output power is:
For the same power supply voltage, the output power in BTL configuration is four times
higher than the output power in single-ended configuration.
4.2 Gain in a typical application
(V)
out1
out2
= V
= -V
P
(V)
out
(V)
out
2V
()
out
------------------------------=
out
R
2
RMS
L
The typical application schematics are shown in Figure 1 on page 4.
In the flat region (no C
For the second stage: V
effect), the output voltage of the first stage is (in Volts):
in
R
--------------
V–in()
R
out2
= -V
out1
V
(V)
out1
=
The differential output voltage is (in Volts):
V
The differential gain named gain (G
G
is in phase with Vin and V
V
out2
out1
– 2V
out2Vout1
) for more convenience is:
v
V
out2Vout1
---------------------------------- 2
==
v
is phased 180° with Vin. This means that the positive
=
–
V
in
terminal of the loudspeaker should be connected to V
4.3 Low and high frequency response
In the low frequency region, Cin starts to have an effect. Cin forms with Rin a high-pass filter
with a -3 dB cut-off frequency. F
is in Hz.
CL
1
------------------------=
F
CL
2π R
inCin
feed
in
in
R
feed
--------------
R
in
R
feed
--------------
R
in
and the negative to V
out2
out1
.
In the high frequency region, you can limit the bandwidth by adding a capacitor (C
parallel with R
18/33 Doc ID 9309 Rev 13
. It forms a low-pass filter with a -3 dB cut-off frequency. FCH is in Hz.
feed
CH
------------------------------------ -=
2πR
feedCfeed
F
) in
feed
1
TS4990 Application information
10 100 1000 10000
-25
-20
-15
-10
-5
0
5
10
Rin = Rfeed = 22k
Ω
Tamb = 25°C
Cfeed = 2.2nF
Cfeed = 680pF
Cfeed = 330pF
Cin = 470nF
Cin = 82nF
Cin = 22nF
Gain (dB)
Frequency (Hz)
The graph in Figure 60 shows an example of Cin and C
Figure 60. Frequency response gain vs. C
in
4.4 Power dissipation and efficiency
Hypotheses:
and C
influence.
feed
feed
● Load voltage and current are sinusoidal (V
● Supply voltage is a pure DC source (V
CC
).
out
and I
out
).
The load can be expressed as:
V
out
= V
PEAK
sinω t (V)
and
V
out
------------ -
I
out
=
R
L
(A)
and
2
V
PEAK
=
------------------------- (W)
P
out
2R
L
Therefore, the average current delivered by the supply voltage is:
V
PEAK
= 2
AVG
---------------------- (A)
πR
L
I
CC
The power delivered by the supply voltage is:
P
supplyVCCICC
AVG
(W)⋅=
Doc ID 9309 Rev 13 19/33
Application information TS4990
Therefore, the power dissipated by each amplifier is:
P
diss
= P
supply
- P
out
(W)
22V
CC
diss
----------------------
π R
P
L
P
–=
outPout
and the maximum value is obtained when:
δP
diss
------------------
δP
= 0
out
and its value is:
2
2V
CC
max
-------------- -
π2R
(W)=
L
P
diss
Note: This maximum value is only dependent on power supply voltage and load values.
The efficiency is the ratio between the output power and the power supply:
η =
P
-------------------
P
supply
out
πV
---------------------- -
=
4V
PEAK
CC
The maximum theoretical value is reached when V
4.5 Decoupling of the circuit
Two capacitors are needed to correctly bypass the TS4990: a power supply bypass
capacitor C
C
has particular influence on the THD+N in the high frequency region (above 7 kHz) and
s
an indirect influence on power supply disturbances. With a value for C
expect THD+N levels similar to those shown in the datasheet.
In the high frequency region, if C
on the power supply rail are less filtered.
On the other hand, if C
more filtered.
C
has an influence on THD+N at lower frequencies, but its function is critical to the final
b
result of PSRR (with input grounded and in the lower frequency region).
If C
is lower than 1 µF, THD+N increases at lower frequencies and PSRR worsens.
b
If C
is higher than 1 µF, the benefit on THD+N at lower frequencies is small, but the benefit
b
to PSRR is substantial.
and a bias voltage bypass capacitor Cb.
s
is lower than 1 µF, it increases THD+N and disturbances
s
is higher than 1 µF, those disturbances on the power supply rail are
s
π
---- -
= 78.5%
4
= VCC, so:
PEAK
of 1 µF, you can
s
Note that C
of C
, the higher the PSRR.
in
has a non-negligible effect on PSRR at lower frequencies. The lower the value
in
20/33 Doc ID 9309 Rev 13
TS4990 Application information
1234
0
100
200
300
400
500
600
4.7
0.1
Tamb=25°C
Vcc=2.6V
Vcc=3.3V
Vcc=5V
Startup Time (ms)
Bypass Capacitor Cb ( F)
1234
0
100
200
300
400
500
600
Tamb=25°C
4.70.1
Vcc=5V
Vcc=3.3V
Vcc=2.6V
Max. Startup Time (ms)
Bypass Capacitor Cb ( F)
4.6 Wake-up time (tWU)
When the standby is released to put the device ON, the bypass capacitor Cb is not charged
immediately. Because C
properly until the C
or t
and specified in the electrical characteristics tables with Cb=1µF.
WU
If C
has a value other than 1 µF, refer to the graph in Figure 61 to establish the wake-up
b
time.
is directly linked to the bias of the amplifier, the bias will not work
b
voltage is correct. The time to reach this voltage is called wake-up time
b
Figure 61. Typical wake-up time vs. C
b
Due to process tolerances, the maximum value of wake-up time is shown in Figure 62.
Figure 62. Maximum wake-up time vs. C
b
Note: The bypass capacitor Cb also has a typical tolerance of +/-20%. To calculate the wake-up
time with this tolerance, refer to the graph above (considering for example for C
range of 0.8 µF
≤
C
≤
1.2 µF).
b
=1 µF in the
b
4.7 Standby time
When the standby command is set, the time required to put the two output stages in high
impedance and the internal circuitry in standby mode is a few microseconds. In standby
Doc ID 9309 Rev 13 21/33
Application information TS4990
mode, the bypass pin and V
allows a quick discharge of C
4.8 Pop performance
Pop performance is intimately linked with the size of the input capacitor Cin and the bias
voltage bypass capacitor C
The size of C
The size of C
Moreover, C
near zero pop and click, the equivalent input constant time,
τ
= (Rin + 2kΩ)xCin (s) with Rin ≥ 5kΩ
in
must not reach the τ
Figure 63. τ
is dependent on the lower cut-off frequency and PSRR values requested.
in
is dependent on THD+N and PSRR values requested at lower frequencies.
b
determines the speed with which the amplifier turns ON. In order to reach
b
maximum value as indicated in Figure 63 below.
in
max. versus bypass capacitor
in
in max. (ms)
pin are short-circuited to ground by internal switches. This
in
and Cin capacitors.
b
.
b
Tamb=25°C
160
Vcc=3.3V
120
80
40
Vcc=2.6V
Vcc=5V
0
1234
Bypass Capacitor Cb ( F)
By following the previous rules, the TS4990 can reach near zero pop and click even with
high gains such as 20 dB.
Example:
With Rin=22kΩ and a 20 Hz, -3 dB low cut-off frequency, Cin=361nF. So, Cin=390nF
with standard value which gives a lower cut-off frequency equal to 18.5 Hz. In this case,
(R
+2kΩ)xCin= 9.36ms. By referring to the previous graph, if Cb= 1 µF and VCC=5V,
in
we read 20 ms max. This value is twice as high as our current value, thus we can state that
pop and click will be reduced to its lowest value.
Minimizing both C
of the application.
and the gain benefits both the pop phenomenon, and the cost and size
in
22/33 Doc ID 9309 Rev 13
TS4990 Application information
4.9 Application example: differential input, BTL power amplifier
The schematics in Figure 64 show how to configure the TS4990 to work in differential input
mode. The gain of the amplifier is:
R
2
G
VDIFF
------ -
2
=
R
1
In order to reach the best performance of the differential function, R
matched at 1% max.
Figure 64. Differential input amplifier configuration
R2
Vcc
VCC
-
AV = -1
+
GND
Neg. Input
Pos. Input
Cin
Cin
Standby
Control
R1
R1
R2
Cb
Vin-
Vin+
Bypass
Standby
+
-
+
Bias
and R2 should be
1
Vout 1
Vout 2
TS4990
+
Cs
Speaker
8Ohms
The input capacitor C
frequency required. (F
can be calculated by the following formula using the -3 dB lower
in
is the lower frequency required).
L
Note: This formula is true only if:
F
is 5 times lower than F
----------------------------------------
CB
2π R
1R2
.
L
1
-------------------- -
1
+()C
C
in
2πR
(Hz)=
B
(F)≈
1FL
Doc ID 9309 Rev 13 23/33
Application information TS4990
Example bill of materials
The bill of materials in Ta b le 7 is for the example of a differential amplifier with a gain of 2
and a -3 dB lower cut-off frequency of about 80 Hz.
Table 7. Bill of materials for differential input amplifier application
Pin name Functional description
C
R
1
R
2
C
in
b=Cs
20k / 1%
20k / 1%
100 nF
1 µF
U1 TS4990
24/33 Doc ID 9309 Rev 13
TS4990 Package information
5 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
5.1 Flip-chip package information
Figure 65. Flip-chip pinout (top view)
Vin+
Vin+
3
3
2
2
1
1
Vin+
VOUT1 GND
VOUT1 GND
VOUT1 GND
Vin- GND BYPASS
Vin- GND BYPASS
Vin- GND BYPASS
A
A
■ Balls are underneath
VCC
VCC
VCC
B
B
STBY
STBY
STBY
VOUT2
VOUT2
VOUT2
C
C
Figure 66. Marking (top view)
E
E
Symbol for
lead-free package
XXX
XXX
YWW
YWW
■ ST logo
■ Product and assembly code: XXX
A90 from Tours
90S from Shenzhen
■ Three-digit datecode: YWW
■ E symbol for lead-free only
■ The dot indicates pin A1
Doc ID 9309 Rev 13 25/33
Package information TS4990
Figure 67. Package mechanical data for 9-bump flip-chip package
1.60 mm
1.60 mm
1.60 mm
1.60 mm
0.5mm
0.5mm
0.5mm
0.5mm
∅ 0.25mm
∅ 0.25mm
600µm
600µm
100µm
100µm
Figure 68. Daisy chain mechanical data
1.6mm
1.6mm
3
3
2
2
1
1
■ Die size: 1.60 x 1.60 mm ±30µm
■ Die height (including bumps): 600µm
■ Bump diameter: 315µm ±50µm
■ Bump diameter before reflow: 300µm ±10µm
■ Bump height: 250µm ±40µm
■ Die height: 350µm ±20µm
■ Pitch: 500µm ±50µm
■ Coplanarity: 50µm max
■ * Back coating height: 100µm ±10µm
* Optional
1.6mm
1.6mm
C
A
A
B
B
C
The daisy chain sample features two-by-two pin connections. The schematics in Figure 68
illustrate the way pins connect to each other. This sample is used to test continuity on your
board. Your PCB needs to be designed the opposite way, so that pins that are unconnected
in the daisy chain sample, are connected on your PCB. If you do this, by simply connecting
an Ohmmeter between pin A1 and pin A3, the soldering process continuity can be tested.
26/33 Doc ID 9309 Rev 13
TS4990 Package information
Figure 69. TS4990 footprint recommendations
75µm min.
75µm min.
100μm max.
100μm max.
150μm min.
150μm min.
Track
Track
Φ=250μm
Φ=250μm
Φ=400μm typ.
Φ=400μm typ.
Φ=340μm min.
Φ=340μm min.
500μm
500μm
500μm
500μm
Non Solder mask opening
Non Solder mask opening
500μm
500μm
500μm
Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.)
Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.)
500μm
Figure 70. Tape and reel specification (top view)
1.5
4
4
1
1
A
A1A
8
8
Die size X + 70µm
Die size X + 70µm
4
4
All dimensions are in mm
All dimensions are in mm
User direction of feed
User direction of feed
A
A1A
Die size Y + 70µm
Die size Y + 70µm
1.5
1
1
Device orientation
The devices are oriented in the carrier pocket with pin number A1 adjacent to the sprocket
holes.
Doc ID 9309 Rev 13 27/33
Package information TS4990
5.2 MiniSO-8 package information
Figure 71. MiniSO-8 package mechanical drawing
Table 8. MiniSO-8 package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A 1.1 0.043
A1 0 0.15 0 0.006
A2 0.75 0.85 0.95 0.030 0.033 0.037
b 0.22 0.40 0.009 0.016
c 0.08 0.23 0.003 0.009
D 2.80 3.00 3.20 0.11 0.118 0.126
E 4.65 4.90 5.15 0.183 0.193 0.203
E1 2.80 3.00 3.10 0.11 0.118 0.122
e 0.65 0.026
L 0.40 0.60 0.80 0.016 0.024 0.031
L1 0.95 0.037
L2 0.25 0.010
k0° 8°0° 8°
ccc 0.10 0.004
Millimeters Inches
28/33 Doc ID 9309 Rev 13
TS4990 Package information
5.3 DFN8 package information
Note: DFN8 exposed pad (E2 x D2) is connected to pin number 7. For enhanced thermal
performance, the exposed pad must be soldered to a copper area on the PCB, acting as a
heatsink. This copper area can be electrically connected to pin7 or left floating.
Figure 72. DFN8 3x3x0.90mm package mechanical drawing (pitch 0.5mm)
SEATING
PLANE
C
A2
A3
E2
Table 9. DFN8 3x3x0.90mm package mechanical data (pitch 0.5mm)
D
0.15x45°
e
234
1
D2
67
b
BOTTOM VIEW
A1
L
58
C
ddd
A
E
Dimensions
7426334_F
Ref.
Millimeters Mils
Min. Typ. Max. Min. Typ. Max.
A 0.80 0.90 1.00 31.5 35.4 39.4
A1 0.02 0.05 0.8 2.0
A2 0.55 0.65 0.80 217 25.6 31.5
A3 0.20 7.9
b 0.18 0.25 0.30 7.1 9.8 11.8
D 2.85 3.00 3.15 112.2 118.1 124
D2 2.20 2.70 86.6 106.3
E 2.85 3.00 3.15 112.2 118.1 124
E2 1.40 1.75 55.1 68.9
e 0.50 19.7
L 0.30 0.40 0.50 11.8 15.7 19.7
ddd 0.08 3.1
Doc ID 9309 Rev 13 29/33
Package information TS4990
5.4 SO-8 package information
Figure 73. SO-8 package mechanical drawing
Table 10. SO-8 package mechanical data
Dimensions
Ref.
Min. Typ. Max. Min. Typ. Max.
A1.750.069
A1 0.10 0.25 0.004 0.010
A2 1.25 0.049
b 0.28 0.48 0.011 0.019
c 0.17 0.23 0.007 0.010
D 4.80 4.90 5.00 0.189 0.193 0.197
H 5.80 6.00 6.20 0.228 0.236 0.244
E1 3.80 3.90 4.00 0.150 0.154 0.157
e 1.27 0.050
h 0.25 0.50 0.010 0.020
L 0.40 1.27 0.016 0.050
k1° 8°1° 8°
ccc 0.10 0.004
Millimeters Inches
30/33 Doc ID 9309 Rev 13
TS4990 Ordering information
6 Ordering information
Table 11. Order codes
(1)
(2)
Temperature
range
-40°C, +85°C
Package Packing Marking
Flip-chip, 9 bumps Tape & reel 90
Flip-chip, 9 bumps Tape & reel DC3
Order code
TS4990IJT
TS4990EIJT
TSDC05IJT
TSDC05EIJT
TS4990IST MiniSO-8 Tape & reel K990
TS4990IQT DFN8 Tape & reel K990
TS4990EKIJT FC + back coating Tape & reel 90
TS4990ID
TS4990IDT
1. Lead-free Flip-chip part number
2. Lead-free daisy chain part number
SO-8
Tu b e o r
Tape & reel
TS4990I
Doc ID 9309 Rev 13 31/33
Revision history TS4990
7 Revision history
Table 12. Document revision history
Date Revision Changes
1-Jul-2002 1 First release.
4-Sep-2003 2 Update mechanical data.
1-Oct-2004 3 Order code for back coating on flip-chip.
2-Apr-2005 4 Typography error on page 1: Mini-SO-8 pin connection.
May-2005 5 New marking for assembly code plant.
1-Jul-2005 6 Error on Table 4 on page 5. Parameters in wrong column.
28-Sep-2005 7
14-Mar-2006 8 SO-8 package inserted in the datasheet.
21-Jul-2006 9 Update of Figure 66 on page 25. Disclaimer update.
11-May-2007 10
Updated mechanical coplanarity data to 50µm (instead of 60µm) (see
Figure 67 on page 25).
Corrected value of PSRR in Table 5 on page 6 from 1 to 61 (typical
value).
Moved Table 3: Component descriptions to Section 2: Typical application
schematics on page 4.
Merged daisy chain flip-chip order code table into Table 11: Order codes
on page 31.
17-Jan-2008 11
21-May-2008 12
30-Aug-2011 13
Corrected pitch error in DFN8 package information. Actual pitch is
0.5mm. Updated DFN8 package dimensions to correspond to JEDEC
databook definition (in previous versions of datasheet, package
dimensions were as in manufacturer’s drawing).
Corrected error in MiniSO-8 package information (L and L1 values were
inverted).
Reformatted package information.
Corrected value of output resistance vs. ground in standby mode:
removed from Ta bl e 2 , and added in Ta b l e 4 , Ta b l e 5 , and Ta b l e 6 .
Updated DFN8 package (Figure 72)
Updated ECOPACK
®
text in Section 5: Package information
32/33 Doc ID 9309 Rev 13
TS4990
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Doc ID 9309 Rev 13 33/33
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