The TS4621ML is a class-G stereo headphone
driver dedicated to high-performance audio, highpower efficiency and space-constrained
applications.
It is based on the core technology of a low power
dissipation amplifier combined with a highefficiency step-down DC/DC converter for
supplying this amplifier.
When powered by a battery, the internal stepdown DC/DC converter generates the appropriate
voltage to the amplifier depending on the
TS4621MLEIJT - flip-chip
Pinout (top view)
TOP VIEW
EN
GAIN
VOUTR
INR-
INR+
CMS
PVSS
C1
HPVDD
INL+
VOUTL
INL-
4321
AVDD
AGND
SW
D
C2
C
B
A
Balls are underneath
amplitude of the audio signal to supply the
headsets. It achieves a total 2.1 mA current
consumption at 100 µW output power (10 dB
crest factor).
THD+N is 0.02 % maximum at 1 kHz and PSRR
is 100 dB at 217 Hz, which ensures a high audio
quality of the device in a wide range of
environments.
The traditionally bulky output coupling capacitors
can be removed.
A dedicated common-mode sense pin removes
parasitic ground noise.
The TS4621ML is designed to be used with an
output serial resistor. It ensures unconditional
stability over a wide range of capacitive loads.
The TS4621ML is packaged in a tiny 16-bump
flip-chip package with a pitch of 400 µm.
May 2012Doc ID 023181 Rev 11/40
This is information on a product in full production.
www.st.com
40
ContentsTS4621ML
Contents
1Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 5
Figure 4.Maximum output power vs. power supply voltage, R
Figure 5.Maximum output power vs. power supply voltage, R
Figure 6.Maximum output power vs. power supply voltage, R
Figure 7.Current consumption vs. total output power, R
Figure 8.Current consumption vs. total output power, R
Figure 9.Current consumption vs. total output power, R
Figure 11.THD+N vs. output power - R
Figure 12.THD+N vs. output power - R
Figure 13.THD+N vs. output power - R
Figure 14.THD+N vs. output power - R
Figure 15.THD+N vs. output power - R
Figure 16.THD+N vs. output power - R
Figure 17.THD+N vs. output power - R
Figure 18.THD+N vs. output power - R
Figure 19.THD+N vs. output power - R
Figure 20.THD+N vs. output power - R
Figure 21.THD+N vs. output power - R
Figure 22.THD+N vs. output power - R
Figure 23.THD+N vs. output power - R
Figure 24.THD+N vs. output power - R
Figure 25.THD+N vs. output power - R
Figure 26.THD+N vs. output power - R
Figure 27.THD+N vs. output power - R
Figure 28.THD+N vs. output power - R
Figure 29.THD+N vs. output power - R
Figure 30.THD+N vs. output power - R
Figure 31.THD+N vs. output power - R
Figure 32.THD+N vs. output power - R
Figure 33.THD+N vs. output power - R
Figure 34.THD+N vs. output power -R
Figure 35.THD+N vs. frequency, R
Figure 36.THD+N vs. frequency, R
Figure 37.THD+N vs. frequency, R
Figure 38.THD+N vs. frequency, R
Figure 39.THD+N vs. frequency, R
Figure 40.THD+N vs. frequency, R
Figure 41.THD+N vs. frequency, R
Figure 42.THD+N vs. frequency, R
Figure 43.THD+N vs. frequency, R
Figure 44.THD+N vs. frequency, R
Figure 45.THD+N vs. frequency, R
Figure 46.THD+N vs. frequency, R
Figure 47.THD+N vs. frequency, R
Figure 48.THD+N vs. frequency, R
Figure 49.THD+N vs. frequency, RL = 47 Ω, in-phase, V
Figure 50.THD+N vs. frequency, R
Figure 51.THD+N vs. frequency, R
Figure 52.THD+N vs. frequency, R
Figure 53.PSRR vs. frequency - V
Figure 54.PSRR vs. frequency - V
Figure 55.Output signal spectrum (V
Figure 56.Crosstalk vs. frequency - R
Figure 57.Crosstalk vs. frequency - R
Figure 58.Crosstalk vs. frequency - R
Figure 59.Crosstalk vs. frequency - R
Figure 60.CMRR vs. frequency, 32 Ω, V
Figure 61.CMRR vs. frequency, 32 Ω, V
TS4621MLAbsolute maximum ratings and operating conditions
1 Absolute maximum ratings and operating conditions
Table 1.Absolute maximum ratings
SymbolParameterValueUnit
V
CC
V
in+,Vin-
Control
input
voltage
T
stg
T
j
R
thja
P
d
ESD
Supply voltage
Input voltage referred to ground+/- 1.2V
EN, Gain-0.3 to VDDV
Storage temperature-65 to +150°C
Maximum junction temperature
Thermal resistance junction to ambient
Power dissipationInternally limited
Human body model (HBM)
All pins
VOUTR, VOUTL vs. AGND
Machine model (MM), min. value
Charge device model (CDM)
All pins
VOUTR, VOUTL
IEC61000-4-2 level 4, contact
IEC61000-4-2 level 4, air discharge
(1)
during 1 ms.
(5)
(7)
(2)
(6)
(7)
(3)
5.5V
150°C
200°C/W
(4)
2
4
100V
500
750
+/- 8
+/- 15
kV
V
kV
Lead temperature (soldering, 10 sec)260°C
1. All voltage values are measured with respect to the ground pin.
2. Thermal shutdown is activated when maximum junction temperature is reached.
3. The device is protected from overtemperature by a thermal shutdown mechanism, active at 150° C.
4. Exceeding the power derating curves for long periods may provoke abnormal operation.
5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
7. The measurement is performed on an evaluation board, with ESD protection EMIF02-AV01F3.
Doc ID 023181 Rev 15/40
Absolute maximum ratings and operating conditionsTS4621ML
Table 2.Operating conditions
SymbolParameterValueUnit
V
CC
Supply voltage 2.3 to 4.8V
internal step-down DC output voltages
HPVDD
High rail voltage
Low rail voltage
1.9
1.2
EN,GAINInput voltage low level0.6 V maxV
EN,GAINInput voltage high level 1.3 V min
Load resistor≥ 16Ω
Load capacitor
Serial resistor of 12 Ω minimum, R
≥ 16 Ω0.8 to 100
L
nF
Operating free air temperature range-40 to +85 °C
Flip-chip thermal resistance junction to ambient90°C/W
T
R
R
C
oper
thja
L
L
V
6/40Doc ID 023181 Rev 1
TS4621MLTypical application schematic
2 Typical application schematic
Figure 1.Typical application schematic for the TS4621ML
Negative left input
Positive left input
Negative right input
Positive right input
Cin
1 uF
Cin
1 uF
Cin
1 uF
Cin
1 uF
EN
InL-
InL+
InR+
InR-
GAIN
Interface
Cs
2.2 uF
PVss
Css
2.2 uF
-
+
+
-
Negative
supply
AVdd
Vbat
Positive
detector
detector
C12
2.2 uF
supply
Level
Level
Sw
3.3 uH
HpVdd
VoutL
CMS
VoutR
AGndC1C2
L1
Ct
10 uF
Rout
12 ohms min.
Rout
12 ohms min.
Cout
0.8 nF min.
3
J1
2
1
Cout
0.8 nF min.
AM06119
Table 3.TS4621ML pin description
Pin numberPin namePin definition
A1SWSwitching node of the buck converter
A2AVDDAnalog supply voltage, connect to battery
A3VOUTLOutput signal for left audio channel
A4INL-Negative input signal for left audio channel
B1AGNDDevice ground
B2C1Flying capacitor terminal for internal negative supply generator
B3HPVDDBuck converter output, power supply for amplifier
B4INL+Positive input signal for left audio channel
C1C2Flying capacitor terminal for internal negative supply generator
C2PVSSNegative supply generator output
C3CMS
Common-mode sense, to be connected as close as possible to the
ground of headphone/line out plug
C4INR+Positive input signal for right audio channel
D1ENAmplifier enable
D2GAINAmplifier gain select
D3VOUTROutput signal for right audio channel
D4INR-Negative input signal for right audio channel
Doc ID 023181 Rev 17/40
Typical application schematicTS4621ML
Table 4.TS4621ML component description
Component
(1)
ValueDescription
Cs2.2 µF
C122.2 µF
C
SS
C
in
C
out
R
out
2.2 µF
Cin
----------------------------------------- -=
2 π Rin Fc×××
0.8 to 100 nF
12 Ω min.
L13.3 µH
C
t
10 µF
Decoupling capacitors for V
. A 2.2 µF capacitor is sufficient for proper
CC
decoupling of the TS4621ML. An X5R dielectric and 10 V rating voltage is
recommended to minimize ΔC/ΔV when V
=4.8V.
CC
Must be placed as close as possible to the TS4621ML to minimize parasitic
inductance and resistance.
Capacitor for internal negative power supply operation. An X5R dielectric
and 6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V.
Must be placed as close as possible to the TS4621ML to minimize parasitic
inductance and resistance.
Filtering capacitor for internal negative power supply. An X5R dielectric and
6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V.
1
Input coupling capacitor that forms with Rin ≈ R
/2a first-order high-pass
indiff
filter with a -3 dB cut-off frequency Fc.
Output capacitor of 0.8 nF minimum to 100 nF maximum. This capacitor is
mandatory for operation of the TS4621ML.
Output resistor in-series with the TS4621ML output. This 12 Ω minimum
resistor is mandatory for operation of the TS4621ML.
Inductor for internal DC/DC step-down converter.
References of inductors: refer to Section 4.3.1 for more information.
Tank capacitor for internal DC/DC step-down converter. An X5R dielectric
and 6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V. Refer to Section 4.3.2 for more information.
1. Refer to Section 4.3 for a complete description of each component.
8/40Doc ID 023181 Rev 1
TS4621MLElectrical characteristics
3 Electrical characteristics
The values given in the following table are for the conditions VCC = +3.6 V, AGND = 0 V,
GAIN = 0 dB, R
Table 5.Electrical characteristics of the amplifier
SymbolParameterMin.Typ.Max.Unit
= 32 Ω + 15 Ω, T
L
= 25° C, unless otherwise specified.
amb
I
CC
I
s
I
STBY
V
in
V
oo
V
out
THD+N
PSRR
Quiescent supply current, no input signal, both channels
enabled
Supply current, with input modulation, both channels enabled,
HPVDD = 1.2 V, output power per channel, F= 1 kHz
Pout = 100 µW at 3 dB crest factor
Pout = 500 µW at 3 dB crest factor
Pout = 1mW at 3dB crest factor
Pout = 100 µW at 10 dB crest factor
Pout = 500 µW at 10 dB crest factor
Pout = 1 mW at 10 dB crest factor