TS4621ML
High-performance class-G stereo headphone amplifier
Datasheet − production data
Features
■ Power supply range: 2.3 V to 4.8 V
■ 0.6 mA/channel quiescent current
■ 2.1 mA current consumption with
100 µW/channel (10 dB crest factor)
■ 0.006% typical THD+N at 1 kHz
■ 100 dB typical PSRR at 217 Hz
■ 100 dB of SNR A-weighted at G = 0 dB
■ Zero "pop and click"
■ Gain settings : 0 dB and 6 dB
■ Integrated high efficiency step-down converter
■ Low standby current: 5 µA max
■ Output-coupling capacitors removed
■ Thermal shutdown
■ Flip-chip package: 1.65 mm x 1.65 mm,
400 µm pitch, 16 bumps
Applications
■ Cellular phones, smartphones
■ Mobile internet devices
■ PMP/MP3 players
■ Portable CD/DVD players
Description
The TS4621ML is a class-G stereo headphone
driver dedicated to high-performance audio, highpower efficiency and space-constrained
applications.
It is based on the core technology of a low power
dissipation amplifier combined with a highefficiency step-down DC/DC converter for
supplying this amplifier.
When powered by a battery, the internal stepdown DC/DC converter generates the appropriate
voltage to the amplifier depending on the
TS4621MLEIJT - flip-chip
Pinout (top view)
TOP VIEW
EN
GAIN
VOUTR
INR-
INR+
CMS
PVSS
C1
HPVDD
INL+
VOUTL
INL-
4321
AVDD
AGND
SW
D
C2
C
B
A
Balls are underneath
amplitude of the audio signal to supply the
headsets. It achieves a total 2.1 mA current
consumption at 100 µW output power (10 dB
crest factor).
THD+N is 0.02 % maximum at 1 kHz and PSRR
is 100 dB at 217 Hz, which ensures a high audio
quality of the device in a wide range of
environments.
The traditionally bulky output coupling capacitors
can be removed.
A dedicated common-mode sense pin removes
parasitic ground noise.
The TS4621ML is designed to be used with an
output serial resistor. It ensures unconditional
stability over a wide range of capacitive loads.
The TS4621ML is packaged in a tiny 16-bump
flip-chip package with a pitch of 400 µm.
May 2012 Doc ID 023181 Rev 1 1/40
This is information on a product in full production.
www.st.com
40
Contents TS4621ML
Contents
1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 5
2 Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1 Gain control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.2 Overview of the class-G, 2-level headphone amplifier . . . . . . . . . . . . . . . 25
4.3 External component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.3.1 Step-down inductor selection (L1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.3.2 Step-down output capacitor selection (C
4.3.3 Full capacitive inverter capacitors selection (C12 and C
4.3.4 Power supply decoupling capacitor selection (Cs) . . . . . . . . . . . . . . . . . 28
4.3.5 Input coupling capacitor selection (C
4.3.6 Low-pass output filter (R
IEC 61000-4-2 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
out
and C
) . . . . . . . . . . . . . . . . . . . . . . . 27
t
) . . . . . . . . . 28
SS
) . . . . . . . . . . . . . . . . . . . . . . . . . 28
in
) and
out
4.3.7 Integrated input low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.4 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.4.1 Layout recommendations for single-ended operation . . . . . . . . . . . . . . 32
4.5 Startup phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.5.1 Auto zero technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.5.2 Input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.6 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
4.6.1 Common-mode sense layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2/40 Doc ID 023181 Rev 1
TS4621ML List of figures
List of figures
Figure 1. Typical application schematic for the TS4621ML . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Current consumption vs. power supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 3. Standby current consumption vs. power supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 4. Maximum output power vs. power supply voltage, R
Figure 5. Maximum output power vs. power supply voltage, R
Figure 6. Maximum output power vs. power supply voltage, R
Figure 7. Current consumption vs. total output power, R
Figure 8. Current consumption vs. total output power, R
Figure 9. Current consumption vs. total output power, R
Figure 10. Differential input impedance vs. gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. THD+N vs. output power - R
Figure 12. THD+N vs. output power - R
Figure 13. THD+N vs. output power - R
Figure 14. THD+N vs. output power - R
Figure 15. THD+N vs. output power - R
Figure 16. THD+N vs. output power - R
Figure 17. THD+N vs. output power - R
Figure 18. THD+N vs. output power - R
Figure 19. THD+N vs. output power - R
Figure 20. THD+N vs. output power - R
Figure 21. THD+N vs. output power - R
Figure 22. THD+N vs. output power - R
Figure 23. THD+N vs. output power - R
Figure 24. THD+N vs. output power - R
Figure 25. THD+N vs. output power - R
Figure 26. THD+N vs. output power - R
Figure 27. THD+N vs. output power - R
Figure 28. THD+N vs. output power - R
Figure 29. THD+N vs. output power - R
Figure 30. THD+N vs. output power - R
Figure 31. THD+N vs. output power - R
Figure 32. THD+N vs. output power - R
Figure 33. THD+N vs. output power - R
Figure 34. THD+N vs. output power -R
Figure 35. THD+N vs. frequency, R
Figure 36. THD+N vs. frequency, R
Figure 37. THD+N vs. frequency, R
Figure 38. THD+N vs. frequency, R
Figure 39. THD+N vs. frequency, R
Figure 40. THD+N vs. frequency, R
Figure 41. THD+N vs. frequency, R
Figure 42. THD+N vs. frequency, R
Figure 43. THD+N vs. frequency, R
Figure 44. THD+N vs. frequency, R
Figure 45. THD+N vs. frequency, R
Figure 46. THD+N vs. frequency, R
Figure 47. THD+N vs. frequency, R
Figure 48. THD+N vs. frequency, R
= 16 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . 12
L
= 16 Ω, out-of-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . 12
L
= 16 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . 12
L
= 16 Ω, out-of-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . 13
L
= 16 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . 13
L
= 16 Ω, out-of-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . 13
L
= 32 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . 13
L
= 32 Ω, out-of-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . 14
L
= 32 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . 14
L
= 32 Ω, out-of-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . 14
L
= 32 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . 14
L
= 32 Ω, out-of-phase, V
L
= 32 Ω+IPad, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . 15
L
= 32 Ω+IPad, out-of-phase, VCC = 2.5 V. . . . . . . . . . . . . . . 15
L
= 32 Ω+IPad, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . 15
L
= 32 Ω+IPad, out-of-phase, VCC = 3.6 V. . . . . . . . . . . . . . . 16
L
= 32 Ω+IPad, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . 16
L
= 32 Ω+IPad, out-of-phase, VCC = 4.8 V. . . . . . . . . . . . . . . 16
L
= 47 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . 16
L
= 47 Ω, out-of-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . 17
L
= 47 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . 17
L
= 47 Ω, out-of-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . 17
L
= 47 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . 17
L
= 47 Ω, out-of-phase, V
L
= 16 Ω, in-phase, V
L
= 16 Ω, out-of-phase, V
L
= 16 Ω, in-phase, V
L
= 16 Ω, out-of-phase, V
L
= 16 Ω, in-phase, V
L
= 16 Ω, out-of-phase, V
L
= 32 Ω, in-phase, V
L
= 32 Ω, out-of-phase, V
L
= 32 Ω, in-phase, V
L
= 32 Ω, out-of-phase, V
L
= 32 Ω, in-phase, V
L
= 32 Ω, out-of-phase, V
L
= 47 Ω, in-phase, V
L
= 47 Ω, out-of-phase, V
L
CC
CC
CC
CC
CC
CC
CC
= 16 Ω . . . . . . . . . . . . . . . . . . . . . . . . .11
L
= 32 Ω . . . . . . . . . . . . . . . . . . . . . . . . .11
L
= 47 Ω . . . . . . . . . . . . . . . . . . . . . . . . .11
L
= 16 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
L
= 32 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
L
= 47 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
L
= 4.8 V . . . . . . . . . . . . . . . . . . . 15
CC
= 4.8 V . . . . . . . . . . . . . . . . . . . . 17
CC
= 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . 17
= 2.5 V . . . . . . . . . . . . . . . . . . . . . . 18
CC
= 3.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . 18
= 3.6 V . . . . . . . . . . . . . . . . . . . . . . 18
CC
= 4.8 V. . . . . . . . . . . . . . . . . . . . . . . . . . 18
= 4.8 V . . . . . . . . . . . . . . . . . . . . . . 19
CC
= 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . 19
= 2.5 V . . . . . . . . . . . . . . . . . . . . . . 19
CC
= 3.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . 19
= 3.6 V . . . . . . . . . . . . . . . . . . . . . . 20
CC
= 4.8 V. . . . . . . . . . . . . . . . . . . . . . . . . . 20
= 4.8 V . . . . . . . . . . . . . . . . . . . . . . 20
CC
= 2.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . 20
= 2.5 V . . . . . . . . . . . . . . . . . . . . . . 21
CC
Doc ID 023181 Rev 1 3/40
List of figures TS4621ML
Figure 49. THD+N vs. frequency, RL = 47 Ω, in-phase, V
Figure 50. THD+N vs. frequency, R
Figure 51. THD+N vs. frequency, R
Figure 52. THD+N vs. frequency, R
Figure 53. PSRR vs. frequency - V
Figure 54. PSRR vs. frequency - V
Figure 55. Output signal spectrum (V
Figure 56. Crosstalk vs. frequency - R
Figure 57. Crosstalk vs. frequency - R
Figure 58. Crosstalk vs. frequency - R
Figure 59. Crosstalk vs. frequency - R
Figure 60. CMRR vs. frequency, 32 Ω, V
Figure 61. CMRR vs. frequency, 32 Ω, V
= 47 Ω, out-of-phase, V
L
= 47 Ω, in-phase, V
L
= 47 Ω, out-of-phase, V
L
= 3.6 V, gain = 0 dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CC
= 3.6 V, gain = +6 dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CC
= 3.6 V, load = 32 Ω) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CC
= 32 Ω, V
L
= 32 Ω, V
L
= 47 Ω, V
L
= 47 Ω, V
L
= 36 V, 0 dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
CC
= 36 V, 6 dB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
CC
= 3.6 V, gain = 0 dB . . . . . . . . . . . . . . . . . . . . . 23
CC
= 3.6 V, gain = +6 dB . . . . . . . . . . . . . . . . . . . . 23
CC
= 3.6 V, gain = 0 dB . . . . . . . . . . . . . . . . . . . . . 23
CC
= 3.6 V, gain = +6 dB . . . . . . . . . . . . . . . . . . . . 23
CC
= 3.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . 21
CC
CC
= 3.6 V . . . . . . . . . . . . . . . . . . . . . . 21
CC
= 4.8 V. . . . . . . . . . . . . . . . . . . . . . . . . . 21
= 4.8 V . . . . . . . . . . . . . . . . . . . . . . 22
CC
Figure 62. Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 63. Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 64. TS4621ML architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 65. Efficiency comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 66. Class-G operating with a music sample . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 67. Typical application schematic with IEC 61000-4-2 ESD protection . . . . . . . . . . . . . . . . . . 30
Figure 68. Single-ended input configuration1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 69. Single-ended input configuration 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 70. Incorrect ground connection for single-ended option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 71. Correct ground connection for single-ended option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Figure 72. Common-mode sense layout example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 73. TS4621ML footprint recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 74. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 75. Marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 76. Flip-chip - 16 bumps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 77. Device orientation in tape pocket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
4/40 Doc ID 023181 Rev 1
TS4621ML Absolute maximum ratings and operating conditions
1 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
V
in+,Vin-
Control
input
voltage
T
stg
T
j
R
thja
P
d
ESD
Supply voltage
Input voltage referred to ground +/- 1.2 V
EN, Gain -0.3 to VDD V
Storage temperature -65 to +150 °C
Maximum junction temperature
Thermal resistance junction to ambient
Power dissipation Internally limited
Human body model (HBM)
All pins
VOUTR, VOUTL vs. AGND
Machine model (MM), min. value
Charge device model (CDM)
All pins
VOUTR, VOUTL
IEC61000-4-2 level 4, contact
IEC61000-4-2 level 4, air discharge
(1)
during 1 ms.
(5)
(7)
(2)
(6)
(7)
(3)
5.5 V
150 °C
200 °C/W
(4)
2
4
100 V
500
750
+/- 8
+/- 15
kV
V
kV
Lead temperature (soldering, 10 sec) 260 °C
1. All voltage values are measured with respect to the ground pin.
2. Thermal shutdown is activated when maximum junction temperature is reached.
3. The device is protected from overtemperature by a thermal shutdown mechanism, active at 150° C.
4. Exceeding the power derating curves for long periods may provoke abnormal operation.
5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
7. The measurement is performed on an evaluation board, with ESD protection EMIF02-AV01F3.
Doc ID 023181 Rev 1 5/40
Absolute maximum ratings and operating conditions TS4621ML
Table 2. Operating conditions
Symbol Parameter Value Unit
V
CC
Supply voltage 2.3 to 4.8 V
internal step-down DC output voltages
HPVDD
High rail voltage
Low rail voltage
1.9
1.2
EN,GAIN Input voltage low level 0.6 V max V
EN,GAIN Input voltage high level 1.3 V min
Load resistor ≥ 16 Ω
Load capacitor
Serial resistor of 12 Ω minimum, R
≥ 16 Ω 0.8 to 100
L
nF
Operating free air temperature range -40 to +85 °C
Flip-chip thermal resistance junction to ambient 90 °C/W
T
R
R
C
oper
thja
L
L
V
6/40 Doc ID 023181 Rev 1
TS4621ML Typical application schematic
2 Typical application schematic
Figure 1. Typical application schematic for the TS4621ML
Negative left input
Positive left input
Negative right input
Positive right input
Cin
1 uF
Cin
1 uF
Cin
1 uF
Cin
1 uF
EN
InL-
InL+
InR+
InR-
GAIN
Interface
Cs
2.2 uF
PVss
Css
2.2 uF
-
+
+
-
Negative
supply
AVdd
Vbat
Positive
detector
detector
C12
2.2 uF
supply
Level
Level
Sw
3.3 uH
HpVdd
VoutL
CMS
VoutR
AGndC1 C2
L1
Ct
10 uF
Rout
12 ohms min.
Rout
12 ohms min.
Cout
0.8 nF min.
3
J1
2
1
Cout
0.8 nF min.
AM06119
Table 3. TS4621ML pin description
Pin number Pin name Pin definition
A1 SW Switching node of the buck converter
A2 AVDD Analog supply voltage, connect to battery
A3 VOUTL Output signal for left audio channel
A4 INL- Negative input signal for left audio channel
B1 AGND Device ground
B2 C1 Flying capacitor terminal for internal negative supply generator
B3 HPVDD Buck converter output, power supply for amplifier
B4 INL+ Positive input signal for left audio channel
C1 C2 Flying capacitor terminal for internal negative supply generator
C2 PVSS Negative supply generator output
C3 CMS
Common-mode sense, to be connected as close as possible to the
ground of headphone/line out plug
C4 INR+ Positive input signal for right audio channel
D1 EN Amplifier enable
D2 GAIN Amplifier gain select
D3 VOUTR Output signal for right audio channel
D4 INR- Negative input signal for right audio channel
Doc ID 023181 Rev 1 7/40
Typical application schematic TS4621ML
Table 4. TS4621ML component description
Component
(1)
Value Description
Cs 2.2 µF
C12 2.2 µF
C
SS
C
in
C
out
R
out
2.2 µF
Cin
----------------------------------------- -=
2 π Rin Fc×××
0.8 to 100 nF
12 Ω min.
L1 3.3 µH
C
t
10 µF
Decoupling capacitors for V
. A 2.2 µF capacitor is sufficient for proper
CC
decoupling of the TS4621ML. An X5R dielectric and 10 V rating voltage is
recommended to minimize ΔC/ΔV when V
=4.8V.
CC
Must be placed as close as possible to the TS4621ML to minimize parasitic
inductance and resistance.
Capacitor for internal negative power supply operation. An X5R dielectric
and 6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V.
Must be placed as close as possible to the TS4621ML to minimize parasitic
inductance and resistance.
Filtering capacitor for internal negative power supply. An X5R dielectric and
6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V.
1
Input coupling capacitor that forms with Rin ≈ R
/2 a first-order high-pass
indiff
filter with a -3 dB cut-off frequency Fc.
Output capacitor of 0.8 nF minimum to 100 nF maximum. This capacitor is
mandatory for operation of the TS4621ML.
Output resistor in-series with the TS4621ML output. This 12 Ω minimum
resistor is mandatory for operation of the TS4621ML.
Inductor for internal DC/DC step-down converter.
References of inductors: refer to Section 4.3.1 for more information.
Tank capacitor for internal DC/DC step-down converter. An X5R dielectric
and 6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V. Refer to Section 4.3.2 for more information.
1. Refer to Section 4.3 for a complete description of each component.
8/40 Doc ID 023181 Rev 1
TS4621ML Electrical characteristics
3 Electrical characteristics
The values given in the following table are for the conditions VCC = +3.6 V, AGND = 0 V,
GAIN = 0 dB, R
Table 5. Electrical characteristics of the amplifier
Symbol Parameter Min. Typ. Max. Unit
= 32 Ω + 15 Ω, T
L
= 25° C, unless otherwise specified.
amb
I
CC
I
s
I
STBY
V
in
V
oo
V
out
THD+N
PSRR
Quiescent supply current, no input signal, both channels
enabled
Supply current, with input modulation, both channels enabled,
HPVDD = 1.2 V, output power per channel, F= 1 kHz
Pout = 100 µW at 3 dB crest factor
Pout = 500 µW at 3 dB crest factor
Pout = 1mW at 3dB crest factor
Pout = 100 µW at 10 dB crest factor
Pout = 500 µW at 10 dB crest factor
Pout = 1 mW at 10 dB crest factor
Standby current, no input signal, V
Input differential voltage range
(1)
EN
= 0 V, V
=0V 0.6 5 µA
GAIN
Output offset voltage
No input signal
Maximum output voltage, in-phase signals
RL = 16 Ω, THD+N = 1% max, f = 1 kHz
= 47 Ω, THD+N = 1% max, f = 1 kHz
R
L
RL = 10 kΩ, Rs = 15 Ω, CL = 1 nF, THD+N = 1% max,
f = 1 kHz
Total harmonic distortion + noise, G = 0 dB
= 700 mVrms, F = 1 kHz
V
out
= 700 mVrms, 20 Hz < F < 20 kHz
V
out
(1)
, V
Power supply rejection ratio
= 200 mVpp, grounded
ripple
inputs
F = 217 Hz, G = 0 dB, R
F = 10 kHz, G = 0 dB, R
≥16 Ω
L
≥16 Ω
L
1.2 1.5 mA
2.3
3.7
4.7
3.5
5
6.5
mA
2.1
3.1
3.9
1V
-500 +500 µV
0.6
1.0
1.0
0.8
1.1
1.3
0.006
V
0.02 %
0.05
90 100
dB
70
rms
rms
CMRR
Crosstalk
SNR
ONoise
Common mode rejection ratio
F = 1 kHz, G = 0 dB, V
F = 20 Hz to 20 kHz, G = 0 dB, Vic = 200 mV
= 200 mV
ic
pp
pp
Channel separation
= 32 Ω + 15 Ω , G = 0 dB, F = 1 kHz, Po = 10 mW 60 100
R
L
Signal-to-noise ratio, A-weighted, V
F = 1 kHz
(1)
G = +0 dB
Output noise voltage, A-weighted
(1)
out
= 1 V
, THD+N < 1%,
rms
100
G = +0 dB
Doc ID 023181 Rev 1 9/40
65
45
dB
dB
dB
9µVrms
Electrical characteristics TS4621ML
Table 5. Electrical characteristics of the amplifier (continued)
Symbol Parameter Min. Typ. Max. Unit
AV
Closed loop voltage gain, GAIN=L 0 dB
Closed loop voltage gain, GAIN=H 6 dB
ΔAV Gain matching between left and right channels -0.5 +0.5 dB
R
V
V
1. Guaranteed by design and parameter correlation.
Differential input impedance at 6 dB 24 33.2 kΩ
indiff
Low level input voltage on EN, GAIN pins 0.6 V
IL
High level input voltage on EN, GAIN pins 1.3 V
IH
Input current on EN,GAIN 10 µA
I
in
10/40 Doc ID 023181 Rev 1
TS4621ML Electrical characteristics
Figure 2. Current consumption vs. power
supply voltage
Figure 4. Maximum output power vs. power
supply voltage, R
= 16 Ω
L
Figure 3. Standby current consumption vs.
power supply voltage
Figure 5. Maximum output power vs. power
supply voltage, RL = 32 Ω
Figure 6. Maximum output power vs. power
supply voltage, R
= 47 Ω
L
Doc ID 023181 Rev 1 11/40
Figure 7. Current consumption vs. total
output power, RL = 16 Ω
Electrical characteristics TS4621ML
Figure 8. Current consumption vs. total
output power, R
= 32 Ω
L
Figure 10. Differential input impedance vs.
gain
Figure 9. Current consumption vs. total
output power, RL = 47 Ω
Figure 11. THD+N vs. output power -
R
= 16 Ω, in-phase, VCC = 2.5 V
L
Figure 12. THD+N vs. output power -
R
= 16 Ω, out-of-phase, VCC = 2.5 V
L
Figure 13. THD+N vs. output power -
12/40 Doc ID 023181 Rev 1
RL = 16 Ω, in-phase, VCC = 3.6 V
TS4621ML Electrical characteristics
Figure 14. THD+N vs. output power -
R
= 16 Ω, out-of-phase, VCC = 3.6 V
L
Figure 16. THD+N vs. output power -
R
= 16 Ω, out-of-phase, VCC = 4.8 V
L
Figure 15. THD+N vs. output power -
RL = 16 Ω, in-phase, VCC = 4.8 V
Figure 17. THD+N vs. output power -
RL = 32 Ω, in-phase, VCC = 2.5 V
Doc ID 023181 Rev 1 13/40
Electrical characteristics TS4621ML
Figure 18. THD+N vs. output power -
R
= 32 Ω, out-of-phase, VCC = 2.5 V
L
Figure 20. THD+N vs. output power -
R
= 32 Ω, out-of-phase, VCC = 3.6 V
L
Figure 19. THD+N vs. output power -
RL = 32 Ω, in-phase, VCC = 3.6 V
Figure 21. THD+N vs. output power -
RL = 32 Ω, in-phase, VCC = 4.8 V
14/40 Doc ID 023181 Rev 1
TS4621ML Electrical characteristics
Figure 22. THD+N vs. output power -
R
= 32 Ω, out-of-phase,
L
V
= 4.8 V
CC
Figure 24. THD+N vs. output power -
R
= 32 Ω+IPad, out-of-phase,
L
V
= 2.5 V
CC
Figure 23. THD+N vs. output power -
= 32 Ω+IPad, in-phase,
R
L
V
= 2.5 V
CC
Figure 25. THD+N vs. output power -
= 32 Ω+IPad, in-phase,
R
L
V
= 3.6 V
CC
Doc ID 023181 Rev 1 15/40
Electrical characteristics TS4621ML
Figure 26. THD+N vs. output power -
R
= 32 Ω+IPad, out-of-phase,
L
V
= 3.6 V
CC
Figure 28. THD+N vs. output power -
R
= 32 Ω+IPad, out-of-phase,
L
V
= 4.8 V
CC
Figure 27. THD+N vs. output power -
= 32 Ω+IPad, in-phase,
R
L
V
= 4.8 V
CC
Figure 29. THD+N vs. output power -
= 47 Ω, in-phase, VCC = 2.5 V
R
L
16/40 Doc ID 023181 Rev 1
TS4621ML Electrical characteristics
Figure 30. THD+N vs. output power -
R
= 47 Ω, out-of-phase, VCC = 2.5 V
L
Figure 32. THD+N vs. output power -
R
= 47 Ω, out-of-phase, VCC = 3.6 V
L
Figure 31. THD+N vs. output power -
RL = 47 Ω, in-phase, VCC = 3.6 V
Figure 33. THD+N vs. output power -
RL = 47 Ω, in-phase, VCC = 4.8 V
Figure 34. THD+N vs. output power -
R
= 47 Ω, out-of-phase, V
L
= 16 Ω,
L
CC
= 4.8 V
Figure 35. THD+N vs. frequency, R
in-phase, V
CC
= 2.5 V
Doc ID 023181 Rev 1 17/40
Electrical characteristics TS4621ML
Figure 36. THD+N vs. frequency, RL = 16 Ω,
out-of-phase, V
CC
= 2.5 V
Figure 38. THD+N vs. frequency, RL = 16 Ω,
out-of-phase, V
CC
= 3.6 V
Figure 37. THD+N vs. frequency, R
in-phase, V
CC
= 3.6 V
Figure 39. THD+N vs. frequency, R
in-phase, V
CC
= 4.8 V
= 16 Ω,
L
= 16 Ω,
L
18/40 Doc ID 023181 Rev 1
TS4621ML Electrical characteristics
Figure 40. THD+N vs. frequency, RL = 16 Ω,
out-of-phase, V
CC
= 4.8 V
Figure 42. THD+N vs. frequency, RL = 32 Ω,
out-of-phase, V
CC
= 2.5 V
Figure 41. THD+N vs. frequency, R
in-phase, V
CC
= 2.5 V
Figure 43. THD+N vs. frequency, R
in-phase, V
CC
= 3.6 V
= 32 Ω,
L
= 32 Ω,
L
Doc ID 023181 Rev 1 19/40
Electrical characteristics TS4621ML
Figure 44. THD+N vs. frequency, RL = 32 Ω,
out-of-phase, V
CC
= 3.6 V
Figure 46. THD+N vs. frequency, RL = 32 Ω,
out-of-phase, V
CC
= 4.8 V
Figure 45. THD+N vs. frequency, R
in-phase, V
CC
= 4.8 V
Figure 47. THD+N vs. frequency, R
in-phase, V
CC
= 2.5 V
= 32 Ω,
L
= 47 Ω,
L
20/40 Doc ID 023181 Rev 1
TS4621ML Electrical characteristics
Figure 48. THD+N vs. frequency, RL = 47 Ω,
out-of-phase, V
CC
= 2.5 V
Figure 50. THD+N vs. frequency, RL = 47 Ω,
out-of-phase, V
CC
= 3.6 V
Figure 49. THD+N vs. frequency, R
in-phase, V
CC
= 3.6 V
Figure 51. THD+N vs. frequency, R
in-phase, V
CC
= 4.8 V
= 47 Ω,
L
= 47 Ω,
L
Doc ID 023181 Rev 1 21/40
Electrical characteristics TS4621ML
Figure 52. THD+N vs. frequency, RL = 47 Ω,
out-of-phase, V
CC
= 4.8 V
Figure 54. PSRR vs. frequency - VCC = 3.6 V,
gain = +6 dB
Figure 53. PSRR vs. frequency - V
gain = 0 dB
Figure 55. Output signal spectrum
(V
= 3.6 V, load = 32 Ω)
CC
= 3.6 V,
CC
22/40 Doc ID 023181 Rev 1
TS4621ML Electrical characteristics
Figure 56. Crosstalk vs. frequency - RL = 32 Ω,
V
= 3.6 V, gain = 0 dB
CC
Figure 58. Crosstalk vs. frequency - RL = 47 Ω,
V
= 3.6 V, gain = 0 dB
CC
Figure 57. Crosstalk vs. frequency - R
V
= 3.6 V, gain = +6 dB
CC
Figure 59. Crosstalk vs. frequency - R
V
= 3.6 V, gain = +6 dB
CC
= 32 Ω,
L
= 47 Ω,
L
Doc ID 023181 Rev 1 23/40
Electrical characteristics TS4621ML
Figure 60. CMRR vs. frequency,
Figure 62. Wake-up time Figure 63. Shutdown
32 Ω, V
= 36 V, 0 dB
CC
Figure 61. CMRR vs. frequency,
32 Ω, VCC = 36 V, 6 dB
24/40 Doc ID 023181 Rev 1
TS4621ML Application information
4 Application information
4.1 Gain control
The TS4621ML has two gain settings which are controlled via the GAIN pin:
GAIN voltage Amplifier gain
≤ 0.6 V 0 dB
≥ 1.3 V6 dB
Note: See Table 5: Electrical characteristics of the amplifier for V
and VIL levels.
IH
4.2 Overview of the class-G, 2-level headphone amplifier
The TS4621ML uses what is referred to as class-G operating mode. This mode is a
combination of the class AB biasing technique and an adaptive power supply. For this
device, the power supply uses two levels: ±1.2 V and ±1.9 V.
To create the ±1.2 V and ±1.9 V levels, the device uses an internal high-efficiency stepdown converter linked with a fully capacitive inverter from AVdd. Thanks to these internallygenerated symmetrical power supply voltages, the output of the amplifier can be biased at
0 V, thus eliminating the classical bulky DC blocking output capacitors (typically more than
100 μF).
Figure 64. TS4621ML architecture
Vbat
Cs
2.2 uF
DC/DC
control
L1
3.3 uH
Ct
10 uF
1.2 V to 1.9 V
HPVdd
+Vout
0 V
-Vout
AM06150
C12
2.2 uF
Full capacitive
inverter
Css
2.2 uF
In+
In-
-1.2 V to -1.9 V
PVss
Vout
Level
detector
When an audio signal is playing with the TS4621ML, the class G feature adjusts in real time
the internal power supply voltage in order to achieve the best efficiency possible. In addition,
thanks to the fast transient response of the internal DC/DC converters, the switching
between ±1.2 V and ±1.9 V can be achieved without audio clipping. Moreover, the out-of-
Doc ID 023181 Rev 1 25/40
Application information TS4621ML
audio band DC/DC switching frequency keeps the audio quality at a high level (distortion,
noise, etc…).
Figure 65. Efficiency comparison
100
Both channels enabled
RL = 32Ω, F = 1KHz
Vcc = 3.6V, Ta = 25 C
Crest Factor = 3dB
10
Efficiency (%)
1
0.1
0.1 1 10
Total Output Power (mW)
TS4621ML
Class G
TS4601
Class AB
Most audio signals have a crest factor higher than 6 dB (10 dB on average), which means
that most of the time the music level is low. In this case, the setting of the internal DC/DC
converters is low (1.2 V) and in this way, helps to minimize the power dissipation.
When the audio signal amplitude increases due to a peak or louder music, the setting of the
internal DC/DC converters increases to 1.9 V, automatically increasing the output dynamic
range. This 1.9 V value remains until the end of the decay time.
Figure 66 shows a music sample played at high levels.
Figure 66. Class-G operating with a music sample
HPVDD
High 1.9V
HPVDD
Low 1.2V
Music
Sample
PVSS
Low -1.2V
PVSS
High -1.9V
Note: HPVDD/PVSS voltages are created internally by DC/DC converters. To avoid destruction of
the TS4621ML power amplifier, do not connect any external power supply on these pins.
26/40 Doc ID 023181 Rev 1
TS4621ML Application information
4.3 External component selection
The TS4621ML requires few external passive components to operate correctly. Each
component is described in the following sections.
4.3.1 Step-down inductor selection (L1)
The TS4621ML needs one inductor for the internal step-down DC/DC converter. This
inductor must fit the following constraints:
● Typical value: 2.2 µH to 3.3 µH (3.3 µH is recommended)
● Maximum current in operating mode: 400 mA
● Minimum inductor value at maximum current: 1.5 µH
● Maximum inductor value at zero current: 4.3 µH
● DC resistance: from 50 mΩ up to 450 mΩ
Ta bl e 6 shows the part number that should be used according to the inductor value.
Table 6. Recommended inductor
Manufacturer Part number Value
LQM21PN3R3NGRD 3.3 µH
Murata
FDK
LQM2MPN3R3G0L 3.3 µH
LQM2MPN2R2G0L 2.2 µH
MIPSZ2012D3R3 3.3 µH
MIPSZ2012D2R2 2.2 µH
4.3.2 Step-down output capacitor selection (Ct)
For the internal DC/DC step-down converter, the TS4621ML needs one output capacitor.
The three criteria for selecting the output capacitor are the range value of the capacitor
including self tolerance, DC variation and the minimum ESR value, which is mandatory to
avoid oscillation of the converter. Therefore the following constraints must be observed.
● Typical capacitor value: 10 µF at DC = 0 V
● Maximum capacitor value: 12 µF at DC = 0 V
● Minimum capacitor value: 4.8 µF at DC = 2 V
● Voltage range across this capacitor: from 1.1 V to 2 V
● Minimum DC ESR value: 5 mΩ
A ceramic capacitor in a 0603-type package is also recommended because of its close
placement to the TS4621ML, which makes it easier to minimize parasitic inductance and
resistance that have a negative impact on the audio performance.
Doc ID 023181 Rev 1 27/40
Application information TS4621ML
Table 7. Recommended capacitors
Manufacturer Part number Value
GRM188R60J106ME47 10 µF, 6.3 V, X5R
Murata
GRM188R60J106ME84 10 µF, 6.3 V, X5R
GRM188R61E106ME73 10 µF, 25 V, X5R
4.3.3 Full capacitive inverter capacitors selection (C12 and CSS)
Two capacitors (C12 and Css) are needed for this internal DC/DC inverter.
The three criteria for selecting these capacitors are the range value of the capacitor
including self tolerance, DC variation and the minimum ESR to minimize power losses.
● Typical capacitor value: 2.2 µF +/-20 %
● Voltage across these capacitors: from 1.1 V to 2 V
● Minimum capacitor value: 1 µF
Again, a ceramic capacitor in a 0603 or 0402-type package is also recommended because
of their close placement to the TS4621ML, which makes it easier to minimize parasitic
inductance and resistance that have a negative impact on the audio performance.
4.3.4 Power supply decoupling capacitor selection (Cs)
A 2.2 µF decoupling capacitor with low ESR is recommended for positive power supply
decoupling. Packages such as the 0402 or 0603 are also recommended because of their
close placement to the TS4621ML, which makes it easier to minimize parasitic inductance.
It is advised to choose a X5R dielectric for capacitor tolerance, and a 10 V DC rating voltage
for 4.8 V operations (or a 6.3 V DC rating voltage for 3.6 V operations), to take into
consideration the ΔC/ΔV variation of this type of ceramic capacitor.
An important parameter is the rated voltage of the capacitor. A 2.2
at 4.8 V DC typically loses about 40 % of its value. In fact, with a 4.8 V power supply voltage,
the decoupling value is about 1.3
µF instead of 2.2 µF. Because the decoupling capacitor
influences the THD+N in the medium-to-high frequency region, this capacitor variation
becomes decisive. In addition, less decoupling means higher overshoots, which can be
problematic if they reach the power supply’s AMR value (5.5 V). This is why, for a 2.2
value, we recommend a 2.2
µF/10 V, a 4.7 µF/6.3 V or a ceramic capacitor with a low DC
bias variation rated at 6.3 V.
4.3.5 Input coupling capacitor selection (Cin)
Cin input coupling capacitors are mandatory for the TS4621ML’s operation. They block any
DC component coming from the audio signal source.
C
with Rin form a first-order high-pass filter and the -3 dB cut-off frequency is:
in
FC 3dB–()
--------------------------------------------=
2 π Rin Cin×××
1
µF/6.3 V capacitor used
µF
is the single-ended input impedance that can be approximated at about R
R
in
R
also depends on the gain setting. Figure 10 provides the differential input impedance vs.
in
gain. One can also see that R
28/40 Doc ID 023181 Rev 1
is minimum for the maximum gain setting (that is, 6 dB).
indiff
indiff
/2.
TS4621ML Application information
Therefore, in most cases, Rin should be set to 6 dB to calculate the minimum input capacitor
C
.
in
Example:
In this case and for a -3 dB cut-off frequency of 20 Hz, C
value is 0.68
µF but a 1 µF capacitor is more suitable to take into consideration the capacitor
tolerance +/-20 %.
If the aim is to have the 20 Hz at -1 dB, the capacitor has to be multiplied by 1.96. As such,
C
= 0.64 x 1.96 = 1.25 µF. The closest normalized value would be 1.5 µF or 2.2 µF.
in
4.3.6 Low-pass output filter (R
protection
The TS4621ML is designed to operate with a passive first-order low-pass filter (as shown in
Figure 1). This low-pass filter is mandatory to ensure correct operation of the TS4621ML
over the volume range and output capacitance range vs. load.
R
must have a value of 12 Ω minimum and C
out
maximum. Values of 12 Ω and 1 nF are a good starting point for a design to be able to drive
a classic headphone (16 Ω, 32 Ω, 60 Ω) and the line-in of any hi-fi system or sound card.
The cutoff frequency of this filter (12 Ω and 1 nF) is approximately 13 MHz and clearly
above the audio band.
However, this output RC filter is also a part of the IEC 61000-4-2 ESD protection. In most
cases, this RC filter is designed with transient absorbers and the final solution can be a
discrete solution or an integrated solution. ST Microelectronics’ portfolio has many
integrated solutions for ESD, but one dedicated to headphone amplifiers in particular:
(a)
IPAD
reference EMIF02-AV01F3.
out
and C
=0.64µF. The closest normalized
in
) and IEC 61000-4-2 ESD
out
a value of 0.8 nF minimum up to 100 nF
out
To fit the IEC 61000-4-2 standard, this audio line IPAD can be added to the output of the
TS4621ML as shown in Figure 67.
a. Copyright STMicroelectronics.
Doc ID 023181 Rev 1 29/40
Application information TS4621ML
Figure 67. Typical application schematic with IEC 61000-4-2 ESD protection
Negative left input
Positive left input
Positive right input
Negative right input
By adding this ESD protection, the TS4621ML complies with the IEC 61000-4-2 level 4
standard on jack pins. Our demonstration board has been tested using the same conditions
as those outlined in the IEC 61000-4-2 standard. Results may differ depending on the layout
of the PCB.
● 15 kV (air discharge)
● 8 kV (contact discharge)
Cin
1 µF
Cin
1 µF
Cin
1 µF
Cin
1 µF
InL-
InL+
InR+
InR-
Cs
2.2 µF
PVss
Css
2.2 µF
-
+
+
-
Negative
supply
Vbat
AVdd
Positive
Supply
detector
detector
C1 C2
C12
2.2 µF
Level
Level
Sw
L1
3.3 µH
HpVdd
VoutL
CMS
VoutR
AGnd
A1
Ct
10 µF
IPad
A2
B2
Gnd
2C1C
J1
3
2
1
AM06151
This IPAD has an internal series resistor R
C
=3.2nF +/-25%.
out
=15Ω +/-20 % and an output capacitor
out
4.3.7 Integrated input low-pass filter
The TS4621ML has an integrated internal first-order low-pass filter with a -3 dB cutoff . This
integrated filter is present on each input and filters any out-of-band audio noise coming from
the audio source.
4.4 Single-ended input configuration
The TS4621ML can be used in a single-ended input configuration. InR- and InL- or InR+
and InL+ can be shorted to ground through input capacitors. All C
the same value to keep the same PSRR performance as in a differential input configuration.
Figure 68 and Figure 69 show how to connect the TS4621ML. Note the ground connection
of each input. To avoid PSRR issues resulting from any ground noise, this connection must
be done on the ground of the audio source and not on the ground of the TS4621ML itself.
30/40 Doc ID 023181 Rev 1
capacitors must have
in
TS4621ML Application information
Figure 68. Single-ended input configuration1
Audio driver
Cin
InL-
1 µF
Left output
Right output
Audio driver ground
Cin
1 µF
Cin
1 µF
Cin
1 µF
InL+
InR+
InR-
Figure 69. Single-ended input configuration 2
Cs
2.2 µF
PVss
Css
2.2 µF
AVdd
-
+
+
-
Negative
supply
C1 C2
Vbat
Positive
supply
Level
detector
Level
detector
C12
2.2 µF
Sw
L1
3.3 µH
HpVdd
VoutL
CMS
VoutR
AGnd
Ct
10 µF
Rout
12 ohms min.
Rout
12 ohms min.
Cout
0.8 nF min.
3
J1
2
1
Cout
0.8 nF min.
AM06152
Audio driver
Left output
Right output
Audio driver ground
Cin
1 µF
Cin
1 µF
Cin
1 µF
Cin
1 µF
InL-
InL+
InR+
InR-
Cs
2.2 µF
PVss
Css
2.2 µF
AVdd
-
+
+
-
Negative
supply
C1 C2
Vbat
Positive
supply
Level
detector
Level
detector
C12
2.2 µF
Sw
L1
3.3 µH
HpVdd
VoutL
CMS
VoutR
AGnd
Ct
10 µF
Rout
12 ohms min.
Rout
12 ohms min.
Cout
0.8 nF min.
J1
3
2
1
Cout
0.8 nF min.
AM06153
Doc ID 023181 Rev 1 31/40
Application information TS4621ML
The gain range in these configurations remains unchanged and is given by:
VoutLR VinLR Gain×=
With reference to Figure 69, note that the absolute phase in the audio band is 180°.
4.4.1 Layout recommendations for single-ended operation
The connection location of each input that has to be set to ground is extremely important.
Incorrect connection location
Figure 70. Incorrect ground connection for single-ended option
Audio driver
Left output
VaudioL
Right output
VaudioR
Vmc
If these inputs are connected to AGnd (the ground of the TS4621ML class-G), the output
voltage can be expressed by the following simplified equation from an AC point of view.
Cin
1 µF
Cin
1 µF
Cin
1 µF
Cin
1 µF
Vgndnoise
InL-
InL+
InR+
InR-
Cs
2.2 µF
PVss
Css
2.2 µF
AVdd
-
+
+
-
Negative
supply
Vbat
Positive
supply
Level
detector
Level
detector
C12
2.2 µF
Sw
L1
3.3 µH
HpVdd
VoutL
CMS
VoutR
AGndC1 C2
Ct
10 µF
Rout
12 ohms min.
Rout
12 ohms min.
Cout
0.8 nF min.
3
J1
2
1
Cout
0.8 nF min.
AM06154
Equation 1
Vout = Av x (Vaudio + Vmc + Vgndnoise) + Vbatnoise x PSRR
As shown in Equation 1, any ground noise and any parasitic AC voltage on Vmc is directly
multiplied by the gain of the amplifier. If Vmc can be totally controlled by the design of the
audio source device (no parasitic AC voltage), it is not necessarily the case for Vgndnoise.
This noise can be significantly reduced by an adequate low impedance ground plane, but
not totally eliminated. In practice, only ten millivolts in the right frequency range are enough
to produce an audible parasitic sound in the headphone with a volume level as low as
-20 dB.
32/40 Doc ID 023181 Rev 1
TS4621ML Application information
Correct connection location
As shown in Figure 71, the best option is to route the single-ended signal in parallel with the
AC ground line of the other input. The AC grounded terminal must be routed in parallel to
the audio signal and grounded with the ground of the audio source.
Figure 71. Correct ground connection for single-ended option
Audio driver
Left output
VaudioL
Right output
VaudioR
Vmc
In this configuration, the AC output voltage is:
Cin
1 µF
Cin
1 µF
Cin
1 µF
Cin
1 µF
Vgndnoise
InL-
InL+
InR+
InR-
Cs
2.2 µF
PVss
Css
2.2 µF
AVdd
-
+
+
-
Negative
supply
Vbat
Positive
supply
Level
detector
Level
detector
C12
2.2 µF
Sw
L1
3.3 µH
HpVdd
VoutL
CMS
VoutR
AGndC1 C2
Ct
10 µF
Rout
12 ohms min.
Rout
12 ohms min.
Cout
0.8 nF min.
J1
3
2
1
Cout
0.8 nF min.
AM06155
Equation 2
Vout = Av x (Vaudio + Vmc) + Vgndnoise x CMRR + Vbatnoise x PSRR
In Equation 2 the ground noise is attenuated by the performance of the CMRR. In practice,
50 dB of CMRR and ten millivolts for ground noise gives an output of approximately 30 µV,
which is normally too low to be perceptible in the headphone. If Vmc is also totally controlled
by the design of the audio source, Equation 2 becomes:
Equation 3
Vout = Av x Vaudio + Vbatnoise x PSRR
Like in differential mode, the main contributor for audio signal degradation is the AC noise
voltage on Vbat. Thanks to the TS4621ML’s very high PSRR that can attenuate GSM burst
noise, Equation 3 becomes:
Equation 4
Vout = Av x Vaudio
Doc ID 023181 Rev 1 33/40
Application information TS4621ML
4.5 Startup phase
The TS4621ML uses different techniques to reduce the DC current consumption and offer a
pop-and-click performance close to none.
4.5.1 Auto zero technology
During the startup phase, the differential output voltage is sensed and adjusted to 0 V
(+/-500 μV) to avoid any pop noise when the amplifier becomes operational. This also helps
to minimize extra current consumption due to the load (Icc-extra = VoutDC / Rload).
4.5.2 Input impedance
The TS4621ML requires input coupling capacitors. The usual lowest frequency used for the
headphone is close to 20 Hz. This frequency means a constant time for a first-order highpass filter of approximately 1 / (2 x Pi x 20) = 8 ms.
To achieve 95 % of the capacitor’s charge, it is necessary to wait 3 x 8 ms = 24 ms, which is
out of range for a device with a fast startup time.
Because of the mismatching of all input capacitors and input resistors, if it is decided to start
the TS4621ML at a time of 8 ms, a voltage difference at the inputs (multiplied by the gain)
can create a voltage step on the output and consequently a pop noise.
To avoid this issue during the starting phase, the TS4621ML accelerates the charging of the
input capacitors by reducing the input impedance to 2 kΩ.
In such a case, for a 1 μF capacitor the 95 % charge is reached in 6 ms. As the startup time
of TS4621ML is 12 ms, there remains sufficient time to fully charge the input capacitors and
as such eliminate any pop noise.
4.6 Layout recommendations
Particular attention must be given to the correct layout of the PCB traces and wires between
the amplifier, load and power supply (in most cases, the battery of the cellular phone).
The power and ground traces are critical since they must provide adequate energy and
grounding for all circuits. Good practice is to use short and wide PCB traces to minimize
voltage drops and parasitic inductance.
A track with a width of at least 200 μm for a copper thickness of 18 μm is recommended for
bringing energy to the amplifier from the battery.
Proper grounding guidelines help improve audio performances, minimize crosstalk between
channels, and prevent switching noise from coupling into the audio signal. It is also
recommended to use a large-area and multi-via ground plane to minimize parasitic
impedance.
A multi-layer PCB board allows double or multiple ground planes to be implemented. Most of
the time, the top and bottom layers are used as ground planes and provide shielding for
tracks routed on the intermediate layers. In addition, to minimize parasitic impedance over
the entire surface, a multi-via technique that connects the bottom and top layer ground
planes together in many locations is often used.
The copper traces that connect the output pins to the load and supply pins should be as
wide as possible to minimize the trace resistances.
34/40 Doc ID 023181 Rev 1
TS4621ML Application information
4.6.1 Common-mode sense layout
The TS4621ML implements a common-mode sense pin to correct any voltage differences
that might occur between the return of the headphone jack and the AGND of the device that
can create parasitic noise in the headphone and/or line out.
The solution to strongly reduce and practically eliminate this noise consists in connecting
the headphone jack ground to the CMS pin. This pin senses the difference of potential
(voltage noise) between the TS4621ML ground and the headphone ground. Thanks to the
frequency response and the attenuation of the common-mode sense pin, this noise is
removed from the TS4621ML outputs.
Figure 72. Common-mode sense layout example
Common mode
sense pin
Output jack
connector
Ground plane
Doc ID 023181 Rev 1 35/40
Package information TS4621ML
k
5 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK®
®
is an ST trademark.
Figure 73. TS4621ML footprint recommendation
PCB pad size: Φ = 260 µm maximum
Solder mask opening: Φ = 300 μm min
(for 260 µm diameter pad)
Φ = 220 µm recommended
Not soldered
mask opening
400 μm
400 μm
400 μm
400 μm
75 µm min.
100 μm max.
Trac
150 μm min.
Figure 74. Pinout
TOP VIEW BOTTOM VI EW
INR-
INR+
INL+
INL-
VOUTR
CMS
HPVDD
VOUTL
4321
GAIN
PVSS
C1
AVD D
Pad in Cu 18 μm with Flash NiAu (2-6 μm, 0.2 μm max.)
EN
C2
AGND
SW
D
C
B
A
EN
D
C2
C
AGND
B
SW
A
GAIN
PVSS
C1
AVDD
VOUTR
HPVDD
VOUTL
1234
CMS
INR-
INR+
INL+
INL-
36/40 Doc ID 023181 Rev 1
TS4621ML Package information
Figure 75. Marking (top view)
■ Logo: ST
■ Symbol for lead-free: E
■ Part number: 21
■ X digit: Assembly code
■ Date code: YWW
■ The dot marks pin A1
21X
21X
YWW
YWW
E
E
Figure 76. Flip-chip - 16 bumps
1650 μm
■ Die size: 1.65 mm x 1.65 mm ± 30 µm
■ Die height (including bumps): 600 µm
1650 μm
400 μm
400 μm
±55 µm
■ Bump diameter: 250 µm ±40 µm
■ Bump height: 205 µm ±35 µm
■ Die height: 395 µm ±20 µm
■ Pitch: 400 µm ±40 µm
■ Coplanarity: 50 µm max
600 μm
Figure 77. Device orientation in tape pocket
4
1
A
8
Die size X + 70 µm
4
All dimensions are in mm
User direction of feed
1.5
1
A
Die size Y + 70 µm
Doc ID 023181 Rev 1 37/40
Ordering information TS4621ML
6 Ordering information
Table 8. Order codes
Order code Temperature range Package Packing Marking
TS4621MLEIJT -40°C to +85°C Flip-chip Tape & reel 21
38/40 Doc ID 023181 Rev 1
TS4621ML Revision history
7 Revision history
Table 9. Document revision history
Date Revision Changes
07-May-2011 1 Initial release.
Doc ID 023181 Rev 1 39/40
TS4621ML
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40/40 Doc ID 023181 Rev 1
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