ST TS4621B User Manual

TS4621B

High-performance class-G stereo headphone amplifier with I2C volume control

Features

■Power supply range: 2.3 V to 4.8 V

■0.6 mA/channel quiescent current

■2.1 mA current consumption with

100 µW/channel (10 dB crest factor)

■0.006% typical THD+N at 1 kHz

■100 dB typical PSRR at 217 Hz

■100 dB of SNR A-weighted at G = 0 dB

■Zero pop and click

■I2C interface for volume control

■Digital volume control range from -60 dB to +4 dB

■Independent right and left channel shutdown control

■Integrated high-efficiency step-down converter

■Low software standby current: 5 µA max

■Output-coupling capacitors removed

■Thermal shutdown

■Flip-chip package: 1.65 mm x 1.65 mm, 400 µm pitch, 16 bumps

Applications

■Cellular phones, smart phones

■Mobile internet devices

■PMP/MP3 players

Description

The TS4621B is a class-G stereo headphone driver dedicated to high audio performance, high power efficiency and space-constrained applications.

It is based on the core technology of a low power dissipation amplifier combined with a highefficiency step-down DC/DC converter for supplying this amplifier.

TS4621BEIJT - flip-chip

Pinout (top view)

INR-	VOUTR	SCL	SDA	D
INR+	CMS	PVSS	C2	C
INL+	HPVDD	C1	AGND	B
INL-	VOUTL	AVDD	SW	A
4	3	2	1

Balls are underneath

When powered by a battery, the internal stepdown DC/DC converter generates the appropriate voltage to the amplifier depending on the amplitude of the audio signal to supply the headsets. It achieves a total 2.1 mA current consumption at 100 µW output power (10 dB crest factor).

THD+N is 0.02 % maximum at 1 kHz and PSRR is 100 dB at 217 Hz, which ensures a high audio quality of the device in a wide range of environments.

The traditionally bulky output coupling capacitors can be removed.

A dedicated common-mode sense pin removes parasitic ground noise.

The TS4621B is designed to be used with an output serial resistor. It ensures unconditional stability over a wide range of capacitive loads.

The TS4621B is packaged in a tiny 16-bump flip-chip package with a pitch of 400 µm.

September 2011

Doc ID 022194 Rev 2

1/48

www.st.com

Contents	TS4621B

Contents

1	Absolute maximum ratings and operating conditions . . . . . . . . . . . .		. 6
2	Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		8
3	Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		10
4	Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .		25
	4.1	I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	25

4.1.1 I²C bus operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1.2 Control register CR1 - address 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 4.1.3 Control register CR2 - address 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.1.4 Control register CR3 - address 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.1.5 Summary of output impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.2 Wake-up and standby time definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 4.3 Overview of the class-G, 2-level headphone amplifier . . . . . . . . . . . . . . . 31 4.4 External component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.4.1 Step-down inductor selection (L1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 4.4.2 Step-down output capacitor selection (Ct) . . . . . . . . . . . . . . . . . . . . . . . 33 4.4.3 Full capacitive inverter capacitors selection (C12 and Css) . . . . . . . . . 34 4.4.4 Power supply decoupling capacitor selection (Cs) . . . . . . . . . . . . . . . . . 34 4.4.5 Input coupling capacitor selection (Cin) . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.4.6Low-pass output filter (Rout and Cout) and

IEC 61000-4-2 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 4.4.7 Integrated input low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.5 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.5.1 Layout recommendations for single-ended operation . . . . . . . . . . . . . . 38

4.6 Startup phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.6.1 Auto zero technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 4.6.2 Input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.7 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.7.1 Common mode sense layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4.8 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

5

Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

44

2/48	Doc ID 022194 Rev 2

TS4621B		Contents
6	Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 46
7	Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .	. . . . 47

Doc ID 022194 Rev 2

3/48

List of figures	TS4621B

List of figures

Figure 1. Typical application schematics for the TS4621B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 2. SCL and SDA timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 3. Start and stop condition timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Figure 4. Current consumption vs. power supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 5. Standby current consumption vs. power supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 6. Maximum output power vs. loadin-phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 7. Maximum output power vs. loadout-of-phase. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Figure 8. Maximum output power vs. power supply voltage, RL = 16 Ω . . . . . . . . . . . . . . . . . . . . . . 13 Figure 9. Maximum output power vs. power supply voltage, RL = 32 Ω . . . . . . . . . . . . . . . . . . . . . . 13 Figure 10. Maximum output power vs. power supply voltage, RL = 47 Ω . . . . . . . . . . . . . . . . . . . . . . 14 Figure 11. Maximum output voltage vs. power supply voltage, in-phase. . . . . . . . . . . . . . . . . . . . . . . 14 Figure 12. Maximum output voltage vs. power supply voltage, out-of-phase . . . . . . . . . . . . . . . . . . . 14 Figure 13. Current consumption vs. total output power, RL = 16 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 14. Current consumption vs. total output power, RL = 32 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 15. Current consumption vs. total output power, RL = 47 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 16. Current consumption vs. total output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 17. Power dissipation vs. total output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 18. Output impedance vs. frequency in HiZ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 19. Differential input impedance vs. gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 20. THD+N vs. output power RL = 16 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 15 Figure 21. THD+N vs. output power RL = 16 Ω, out-of-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . 15 Figure 22. THD+N vs. output power RL = 16 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 23. THD+N vs. output power RL = 16 Ω, out-of-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . 16 Figure 24. THD+N vs. output power RL = 16 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 25. THD+N vs. output power RL = 16 Ω, out-of-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . 16 Figure 26. THD+N vs. output power RL = 32 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 16 Figure 27. THD+N vs. output power RL = 32 Ω, out-of-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . 16 Figure 28. THD+N vs. output power RL = 32 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 29. THD+N vs. output power RL = 32 Ω, out-of-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . 17 Figure 30. THD+N vs. output power RL = 32 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 31. THD+N vs. output power RL = 32 Ω, out-of-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . 17 Figure 32. THD+N vs. output power RL = 47 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 33. THD+N vs. output power RL = 47 Ω, out-of-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . 17 Figure 34. THD+N vs. output power RL = 47 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 35. THD+N vs. output power RL = 47 Ω, out-of-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . 18 Figure 36. THD+N vs. output power RL = 47 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 37. THD+N vs. output power RL = 47 Ω, out-of-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . 18 Figure 38. THD+N vs. frequency RL = 16 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 39. THD+N vs. frequency RL = 16 Ω, out-of-phase, VCC = 2.5 V. . . . . . . . . . . . . . . . . . . . . . . 18 Figure 40. THD+N vs. frequency RL = 16 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 41. THD+N vs. frequency RL = 16 Ω, out-of-phase, VCC = 3.6 V. . . . . . . . . . . . . . . . . . . . . . . 19 Figure 42. THD+N vs. frequency RL = 16 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 43. THD+N vs. frequency RL = 16 Ω, out-of-phase, VCC = 4.8 V. . . . . . . . . . . . . . . . . . . . . . . 19 Figure 44. THD+N vs. frequency RL = 32 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Figure 45. THD+N vs. frequency RL = 32 Ω, out-of-phase, VCC = 2.5 V. . . . . . . . . . . . . . . . . . . . . . . 19 Figure 46. THD+N vs. frequencyRL = 32 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 47. THD+N vs. frequency RL = 32 Ω, out-of-phase, VCC = 3.6 V. . . . . . . . . . . . . . . . . . . . . . . 20 Figure 48. THD+N vs. frequency RL = 32 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . 20

4/48	Doc ID 022194 Rev 2

TS4621B	List of figures

Figure 49. THD+N vs. frequency RL = 32 Ω, out-of-phase, VCC = 4.8 V. . . . . . . . . . . . . . . . . . . . . . . 20 Figure 50. THD+N vs. frequency RL = 47 Ω, in-phase, VCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Figure 51. THD+N vs. frequency RL = 47 Ω, out-of-phase, VCC = 2.5 V. . . . . . . . . . . . . . . . . . . . . . . 20 Figure 52. THD+N vs. frequency RL = 47 Ω, in-phase, VCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 53. THD+N vs. frequency RL = 47 Ω, out-of-phase, VCC = 3.6 V. . . . . . . . . . . . . . . . . . . . . . . 21 Figure 54. THD+N vs. frequency RL = 47 Ω, in-phase, VCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 55. THD+N vs. frequency RL = 47 Ω, out-of-phase, VCC = 4.8 V. . . . . . . . . . . . . . . . . . . . . . . 21 Figure 56. THD+N vs. frequency RL = 10 kΩ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 57. THD+N vs. frequency RL = 600 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Figure 58. THD+N vs. output voltage RL = 10 kΩ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 59. THD+N vs. output voltage RL = 600 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 60. THD+N vs. input voltage, HiZ left and right . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 61. CMRR vs. frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 62. PSRR vs. frequencyVCC = 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 63. PSRR vs. frequencyVCC = 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 64. PSRR vs. frequencyVCC = 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 65. Output signal spectrum. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 66. Crosstalk vs. frequencyRL = 16 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 67. Crosstalk vs. frequencyRL = 32 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 68. Crosstalk vs. frequencyRL = 47 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 69. Crosstalk vs. frequencyRL = 10 kΩ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Figure 70. Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 71. Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 72. I²C write operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Figure 73. I²C read operations1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 74. Flowchart for short-circuit detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Figure 75. TS4621B architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Figure 76. Efficiency comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 77. Class-G operating with a music sample . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Figure 78. Typical application schematic with IEC 61000-4-2 ESD protection . . . . . . . . . . . . . . . . . . 36 Figure 79. Single-ended input configuration1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 80. Single-ended input configuration 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Figure 81. Incorrect ground connection for single-ended option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Figure 82. Correct ground connection for single-ended option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 Figure 83. Common mode sense layout example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 Figure 84. Demonstration board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Figure 85. Copper layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 86. Copper layer and overlay layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Figure 87. TS4621B footprint recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 88. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Figure 89. Marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 90. Flip-chip - 16 bumps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Figure 91. Device orientation in tape pocket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Doc ID 022194 Rev 2

5/48

Absolute maximum ratings and operating conditions	TS4621B

1 Absolute maximum ratings and operating conditions

Table 1.	Absolute maximum ratings
Symbol	Parameter	Value	Unit
VCC	Supply voltage (1) during 1ms.	5.5	V
Vin+,Vin-	Input voltage referred to ground	+/- 1.2	V
Tstg	Storage temperature	-65 to +150	°C
Tj	Maximum junction temperature(2)	150	°C
R	Thermal resistance junction to ambient (3)	200	°C/W
thja
Pd	Power dissipation	Internally limited(4)
	Human body model (HBM)(5)
	All pins	2	kV
	VOUTR, VOUTL vs. AGND	4
	Machine model (MM), min. value(6)	100	V
ESD
	Charge device model (CDM)
	All pins	500	V
	VOUTR, VOUTL	750
	IEC61000-4-2 level 4, contact(7)	+/- 8	kV
	IEC61000-4-2 level 4, air discharge(7)	+/- 15
	Lead temperature (soldering, 10 sec)	260	°C

1.All voltage values are measured with respect to the ground pin.

2.Thermal shutdown is activated when maximum junction temperature is reached.

3.The device is protected from over-temperature by a thermal shutdown mechanism, active at 150° C.

4.Exceeding the power derating curves for long periods may provoke abnormal operation.

5.Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations while the other pins are floating.

6.Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of connected pin combinations while the other pins are floating.

7.The measurement is performed on an evaluation board, with ESD protection EMIF02-AV01F3.

6/48	Doc ID 022194 Rev 2

TS4621B			Absolute maximum ratings and operating conditions
	Table 2.	Operating conditions
	Symbol		Parameter	Value	Unit
	VCC		Supply voltage	2.3 to 4.8	V
			internal step-down DC output voltages
	HPVDD		High rail voltage	1.9	V
			Low rail voltage	1.2
	SDA, SCL		Input voltage range	GND to Vcc	V
	RL		Load resistor	≥ 16	Ω
	CL		Load capacitor		nF
			Serial resistor of 12 Ω minimum, RL ≥ 16 Ω	0.8 to 100
	Toper		Operating free air temperature range	-40 to +85	°C
	Rthja		Flip-chip thermal resistance junction to ambient	90	°C/W

Doc ID 022194 Rev 2

7/48

Typical application schematics	TS4621B

2 Typical application schematics

Figure 1. Typical application schematics for the TS4621B

						Vbat	L1
				Cs			3.3 uH
				2.2 uF
					AVdd		Sw
						Positive	HpVdd
						supply		Ct
	Cin
		InL-						10 uF
Negative left input	1 uF								Cout
					-			Rout	0.8 nF min.
						Level	VoutL
		InL+
Positive left input					+	detector
								12 ohms min.
	Cin
								3	J1
	1 uF						CMS
								2
	Cin
		InR+
Negative right input	1 uF							1
							VoutR	Rout
		InR-			+	Level
Positive right input						detector
					-			12 ohms min.
	Cin								Cout
	1 uF	SDA							0.8 nF min.
		SCL	I2C		Negative
					supply
				PVss	C1	C2	AGnd
	I²C bus			Css		C12
				2.2 uF
						2.2 uF

AM06119

Table 3.	TS4621B pin description
Pin number		Pin name	Pin definition
A1		SW	Switching node of the buck converter
A2		AVDD	Analog supply voltage, connect to battery
A3		VOUTL	Output signal for left audio channel
A4		INL-	Negative input signal for left audio channel
B1		AGND	Device ground
B2		C1	Flying capacitor terminal for internal negative supply generator
B3		HPVDD	Buck converter output, power supply for amplifier
B4		INL+	Positive input signal for left audio channel
C1		C2	Flying capacitor terminal for internal negative supply generator
C2		PVSS	Negative supply generator output
C3		CMS	Common mode sense, to be connected as close as possible to the
			ground of headphone/line out plug
C4		INR+	Positive input signal for right audio channel
D1		SDA	I²C data signal, up to VCC tolerant input
D2		SCL	I²C clock signal, up to VCC tolerant input
D3		VOUTR	Output signal for right audio channel
D4		INR-	Negative input signal for right audio channel

8/48	Doc ID 022194 Rev 2

TS4621B			Typical application schematics
Table 4.	TS4621B component description(1)
Component		Value	Description
			Decoupling capacitors for VCC. A 2.2 µF capacitor is sufficient for proper
			decoupling of the TS4621B. An X5R dielectric and 10 V rating voltage is
Cs		2.2 µF	recommended to minimize C/ V when VCC = 4.8 V.
			Must be placed as close as possible to the TS4621B to minimize parasitic
			inductance and resistance.
			Capacitor for internal negative power supply operation. An X5R dielectric
			and 6.3 V rating voltage is recommended to minimize	C/ V when
C12		2.2 µF	HPVDD = 1.9 V.
			Must be placed as close as possible to the TS4621B to minimize parasitic
			inductance and resistance.
			Filtering capacitor for internal negative power supply. An X5R dielectric and
CSS		2.2 µF	6.3 V rating voltage is recommended to minimize C/ V when
			HPVDD = 1.9 V.
		1	Input coupling capacitor that forms with Rin ≈ Rindiff/2 a first-order high-
C			pass filter with a -3 dB cutoff frequency Fc. For example, at maximum gain
		Cin = -----------------------------------------
in		2 × π × Rin × Fc	G = 4 dB, Rin = 12.5 kΩ, Cin = 1 µF, therefore Fc = 13 Hz.
Cout		0.8 to 100 nF	Output capacitor of 0.8 nF minimum to 100 nF maximum. This capacitor is
			mandatory for operation of the TS4621B.
Rout		12 Ω min.	Output resistor in-series with the TS4621B output. This 12 Ω minimum
			resistor is mandatory for operation of the TS4621B.
L1		3.3 µH	Inductor for internal DC/DC step-down converter.
			References of inductors: refer to Section 4.4.1 for more information.
			Tank capacitor for internal DC/DC step-down converter. An X5R dielectric
Ct		10 µF	and 6.3 V rating voltage is recommended to minimize	C/ V when
			HPVDD = 1.9 V. Refer to Section 4.4.2 for more information.

1. Refer to Section 4.4 for a complete description of each component.

Doc ID 022194 Rev 2

9/48

Electrical characteristics					TS4621B
3	Electrical characteristics
Table 5.	Electrical characteristics of the I²C interface
	for VCC = +3.6 V, AGND = 0 V, Tamb = 25°C (unless otherwise specified)
Symbol	Parameter	Min.	Typ.	Max.		Unit
VIL	Low level input voltage on SDA, SCL pins			0.6		V
VIH	High level input voltage on SDA, SCL pins	1.2				V
VOL	Low level output voltage, SDA pin, Isink = 3mA			0.4		V
Iin	Input current on SDA, SCL		VSDA, SCL	10		µA
			--------------------------------
			600kΩ
Table 6.	Electrical characteristics of the amplifier
	for VCC = +3.6 V, AGND = 0 V, RL= 32 Ω + 15 Ω, Tamb = 25° C
	(unless otherwise specified)
Symbol	Parameter	Min.	Typ.	Max.		Unit
ICC	Quiescent supply current, no input signal, both channels		1.2	1.5		mA
	enabled
	Supply current, with input modulation, both channels enabled,
	HPVDD = 1.2 V, output power per channel, F=1kHz
	Pout = 100 µW at 3 dB crest factor		2.3	3.5
Is	Pout = 500 µW at 3 dB crest factor		3.7	5		mA
	Pout = 1 mW at 3 dB crest factor		4.7	6.5
	Pout = 100 µW at 10 dB crest factor		2.1
	Pout = 500 µW at 10 dB crest factor		3.1
	Pout = 1 mW at 10 dB crest factor		3.9
ISTBY	Standby current, no input signal, I²C CR1 = 01h		0.6	5		µA
	VSDA = 0 V, VSCL = 0 V
Vin	Input differential voltage range(1)			1		Vrms
Voo	Output offset voltage	-500		+500		µV
	No input signal
	Maximum output voltage, in-phase signals
Vout	RL = 16 Ω, THD+N = 1% max, f = 1 kHz	0.6	0.8			Vrms
	R = 47 Ω, THD+N = 1% max, f = 1 kHz	1.0	1.1
	L
	RL = 10 kΩ, Rs = 15 Ω, CL = 1 nF, THD+N = 1% max,	1.0	1.3
	f = 1 kHz
	Total harmonic distortion + noise, G = 0 dB
THD+N	Vout = 700 mVrms, F = 1 kHz		0.006	0.02		%
	Vout = 700 mVrms, 20 Hz < F < 20 kHz		0.05
	Power supply rejection ratio(1), Vripple = 200 mVpp, grounded
PSRR	inputs					dB
	F = 217 Hz, G = 0 dB, RL ≥16 Ω	90	100
	F = 10 kHz, G = 0 dB, RL ≥16 Ω		70

10/48

Doc ID 022194 Rev 2

TS4621B			Electrical characteristics
Table 6.	Electrical characteristics of the amplifier
	for VCC = +3.6 V, AGND = 0 V, RL= 32 Ω + 15 Ω, Tamb = 25° C
	(unless otherwise specified) (continued)
Symbol	Parameter	Min.	Typ.	Max.	Unit
	Common mode rejection ratio
CMRR	F = 1 kHz, G = 0 dB, Vic = 200 mVpp		65		dB
	F = 20 Hz to 20 kHz, G = 0 dB, Vic = 200 mVpp		45
	Channel separation
Crosstalk	RL = 32 Ω + 15 Ω , G = 0 dB, F = 1 kHz, Po = 10 mW	60	100		dB
	RL = 10 kΩ, G = 0 dB, F = 1 kHz, Vout = 1 Vrms	80	110
	Signal-to-noise ratio, A-weighted, Vout = 1 Vrms, THD+N < 1%,
SNR	F = 1 kHz(1)				dB
	G = +4 dB	99
	G = +0 dB	100
	Output noise voltage, A-weighted (1)
ONoise	G = +4 dB		9	11	µVrms
	G = +0 dB			9
G	Gain range with gain (dB) = 20 x log[(VoutL/R)/(InL/R+ - InL/R-)]	-60		+4	dB
Mute	InL/R+ - InL/R- = 1 Vrms			-80	dB
-	Gain step size error	-0.5		+0.5	step-
					size
-	Gain error (G = +4 dB)	-0.45		+0.42	dB
Rindiff	Differential input impedance	25	34		kΩ
	Input impedance during wake-up phase (referred to ground)		2		kΩ
	Output impedance when CR1 = 00h (negative supply is ON and
	amplifier output stages are OFF)(1)
Zout	F < 40 kHz	10			kΩ
	F = 6 MHz	500			Ω
	F = 36 MHz	75			Ω
twu	Wake-up time(2)		12	16	ms
tstby	Standby time		100		µs
tatk	Attack time. Setup time between low rail and high rail voltages		100		µs
	of internal step-down DC/DC converter
tdcy	Decay time		50		ms

1.Guaranteed by design and parameter correlation.

2.Refer to the application information in Section 4.2 on page 30.

Doc ID 022194 Rev 2

11/48

Electrical characteristics						TS4621B
	Table 7.	Timing characteristics of the I²C interface for I²C interface signals over
		recommended operating conditions (unless otherwise specified)
	Symbol	Parameter	Min.	Typ.	Max.		Unit
	fSCL	Frequency, SCL			400		kHz
	td(H)	Pulse duration, SCL high	0.6				µs
	td(L)	Pulse duration, SCL low	1.3				µs
	tst1	Setup time, SDA to SCL	100				ns
	th1	Hold time, SCL to SDA	0				ns
	tf	Bus free time between stop and start condition	1.3				µs
	tst2	Setup time, SCL to start condition	0.6				µs
	th2	Hold time, start condition to SCL	0.6				µs
	tst3	Setup time, SCL to stop condition	0.6				µs

Figure 2. SCL and SDA timing diagram

	t d(H)
SCL	t d(L)
	t st1	t h1
SDA
		AM06113

Figure 3. Start and stop condition timing diagram

SCL
tst2	th2	tf
		tst3
SDA
Start condition		Stop condition
		AM06114

12/48

Doc ID 022194 Rev 2

TS4621B	Electrical characteristics

Figure 4. Current consumption vs. power supply voltage

Figure 5. Standby current consumption vs. power supply voltage

	1.6
(mA)	1.4
CC 1.2
I
Current	1.0
	0.8
Supply
	0.6
Quiscent	0.4							No load; No input Signal
	0.2							Both channels enabled
								Ta = 25°C
	0.0	2.6	2.8	3.0	3.2	3.4	3.6	3.8	4.0	4.2	4.4	4.6	4.8
	2.4

Power Supply Voltage Vcc (V)

No load; No input Signal

SDA=SCL = 0V

Ta = 25°C

Figure 6. Maximum output power vs. load in-phase

Figure 7. Maximum output power vs. load out-of-phase

	80
	70		Inputs = 0°, F = 1kHz
		VCC=4.8V	THD+N = 1%
			Tamb = 25°C
	60
(mW)	50
power	40	VCC=3.6V
	30
Output
	20
	10	VCC=2.3V
	0	100	1k
	10

RL Load resistance ()

	80
	70	VCC=4.8V	Inputs = 180°, F = 1kHz
			THD+N = 1%
	60		Tamb = 25°C
(mW)	50	VCC=3.6V
power	40
	30	VCC=2.3V
Output
	20
	10
	0	100	1k
	10

RL Load resistance ()

Figure 8. Maximum output power vs. power Figure 9.	Maximum output power vs. power
supply voltage, RL = 16 Ω	supply voltage, RL = 32 Ω

	120	RL = 16Ω, F = 1kHz			THD+N=10% (180°)				80	RL = 32Ω, F = 1kHz
		BW < 30kHz, Tamb = 25°C								BW < 30kHz, Tamb = 25°C				THD+N=10% (0°)
	100												THD+N=10% (180°)
(mW)	80							(mW)	60
		THD+N=10% (0°)
power								power
	60		THD+N=1% (180°)						40
Output								Output
	40
				THD+N=1% (0°)					20				THD+N=1% (0°)
										THD+N=1% (180°)
	20
	0								0
	2.3	2.7	3.1	3.5	3.9	4.3	4.7		2.3	2.7	3.1	3.5	3.9	4.3	4.7

Power Supply Voltage Vcc (V)

Power Supply Voltage Vcc (V)

Doc ID 022194 Rev 2

13/48

Electrical characteristics	TS4621B

Figure 10. Maximum output power vs. power supply voltage, RL = 47 Ω

Figure 11. Maximum output voltage vs. power supply voltage, in-phase

Output power (mW)

		RL = 47Ω, F = 1kHz
	60	BW < 30kHz, Tamb = 25°C
		THD+N=10% (0°)

THD+N=10% (180°)

40

20

THD+N=1% (180°)

THD+N=1% (0°)

0
2.3	2.7	3.1	3.5	3.9	4.3	4.7

Power Supply Voltage Vcc (V)

Output Voltage (mVrms)

1600	F = 1kHz
1500
	BW < 30kHz, Tamb = 25°C	600 Ω	10 KΩ
1400	Inputs = 0°, THD+N = 1%

1300

60 Ω

1200

1100

1000	47 Ω
32 Ω
900

800
700				16	Ω
		2.7	3.1	3.5			3.9	4.3	4.7
2.3

Power Supply Voltage Vcc (V)

Figure 12. Maximum output voltage vs. power Figure 13.	Current consumption vs. total
supply voltage, out-of-phase	output power, RL = 16 Ω

Output Voltage (mVrms)

1600
1500	F = 1kHz
	BW < 30kHz, Tamb = 25°C
		600 Ω	10 KΩ
1400	Inputs = 180°, THD+N=1%

1300

1200
1100	32 Ω	47 Ω	60 Ω
1000
900		16 Ω
800

700	2.7	3.1	3.5	3.9	4.3	4.7
2.3

Power Supply Voltage Vcc (V)

S

Supply Current I (mA)

100

Both channels enabled

RL = 16

Ω

, F = 1KHz

Ta = 25

°

C

Crest Factor = 3dB

Vcc=2.3V

Vcc=3.6V

10

			Vcc=4.8V
1
		1	10
0.1

Total Output Power (mW)

Figure 14. Current consumption vs. total output power, RL = 32 Ω

Figure 15. Current consumption vs. total output power, RL = 47 Ω

	100	Both channels enabled			100	Both channels enabled
		RL = 32Ω, F = 1KHz				RL = 47Ω, F = 1 KHz
		Ta = 25°C				Ta = 25°C
(mA)		Crest Factor = 3dB		(mA)		Crest Factor = 3dB	Vcc=2.3V
		Vcc=2.3V
							Vcc=3.6V
S				S
I				I
Supply Current				Supply Current
	10	Vcc=3.6V			10
		Vcc=4.8V					Vcc=4.8V
	1	1	10		1	1	10
	0.1				0.1
		Total Output Power (mW)				Total Output Power (mW)

14/48

Doc ID 022194 Rev 2

TS4621B	Electrical characteristics

Figure 16. Current consumption vs. total output power

Figure 17. Power dissipation vs. total output power

100			100
	Both channels enabled				R = 16 Ω
	RL = 47Ω, F = 1KHz
(mA)	Ta = 25°C, Vcc = 3.6V	(mW)		R = 32 Ω
S		Power Dissipation
10			10
SupplyCurrentI	Crest Factor=3dB			R = 47 Ω
					Both channels enabled
					F = 1KHz,
	Crest Factor=10dB				Ta = 25°C
					Crest Factor = 3dB
1			1
	1			1	10
0.1			0.1
	Total Output Power (mW)			Total Output Power (mW)

Figure 18. Output impedance vs. frequency in Figure 19.	Differential input impedance vs.
HiZ mode	gain

		80
Input Floating	)
	(K
		70
	Input Impedance
Input grounded
		60
		50
Vcc=2.3V to 4.8V	Differential
HIz; Right & Left		40
Osc level=0.5VRMS
			Vcc=2.3V to 4.8V
Ta = 25°C
			Ta = 25°C
		30
			-55	-50 -45 -40 -35 -30 -25 -20 -15 -10	-5	0
		-60
				Gain (dB)
Figure 20. THD+N vs. output power	Figure 21.			THD+N vs. output power
RL = 16 Ω, in-phase, VCC = 2.5 V				RL = 16 Ω, out-of-phase, VCC = 2.5 V

Vcc = 2.5V, RL = 16Ω	Vcc = 2.5V, RL = 16Ω
G = 4dB, Inputs = 0°	G = 4dB, Inputs = 180°
BW < 30kHz, Tamb = 25°C	BW < 30kHz, Tamb = 25°C

F=8kHz	F=8kHz
F=1kHz	F=1kHz
F=80Hz	F=80Hz

Doc ID 022194 Rev 2

15/48