ST TS4621B User Manual

TS4621B

High-performance class-G stereo headphone amplifier

with I

2

C volume control

Features

■ Power supply range: 2.3 V to 4.8 V

■ 0.6 mA/channel quiescent current

■ 2.1 mA current consumption with

100 µW/channel (10 dB crest factor)

■ 0.006% typical THD+N at 1 kHz

■ 100 dB typical PSRR at 217 Hz

■ 100 dB of SNR A-weighted at G = 0 dB

■ Zero pop and click

2

■ I

C interface for volume control

■ Digital volume control range from -60 dB to

+4 dB

■ Independent right and left channel shutdown

control

■ Integrated high-efficiency step-down converter

■ Low software standby current: 5 µA max

■ Output-coupling capacitors removed

■ Thermal shutdown

■ Flip-chip package: 1.65 mm x 1.65 mm,

400 µm pitch, 16 bumps

Applications

■ Cellular phones, smart phones

■ Mobile internet devices

■ PMP/MP3 players

Description

The TS4621B is a class-G stereo headphone
driver dedicated to high audio performance, high
power efficiency and space-constrained
applications.

It is based on the core technology of a low power
dissipation amplifier combined with a high­efficiency step-down DC/DC converter for
supplying this amplifier.

TS4621BEIJT - flip-chip

Pinout (top view)

SCL

SCL

SDA

PVSS

PVSS

C1

C1

AVDD

AVDD

SDA

C2

C2

AGND

AGND

SW

SW

D

D

C

C

B

B

A

A

INR-

INR-

VOUTR

VOUTR

INR+

INR+

CMS

CMS

HPVDD

INL+

HPVDD

INL+

VOUTL

VOUTL

INL-

INL-

4321

4321

Balls are underneath

When powered by a battery, the internal step­down DC/DC converter generates the appropriate
voltage to the amplifier depending on the
amplitude of the audio signal to supply the
headsets. It achieves a total 2.1 mA current
consumption at 100 µW output power (10 dB
crest factor).

THD+N is 0.02 % maximum at 1 kHz and PSRR
is 100 dB at 217 Hz, which ensures a high audio
quality of the device in a wide range of
environments.

The traditionally bulky output coupling capacitors
can be removed.

A dedicated common-mode sense pin removes
parasitic ground noise.

The TS4621B is designed to be used with an
output serial resistor. It ensures unconditional
stability over a wide range of capacitive loads.

The TS4621B is packaged in a tiny 16-bump
flip-chip package with a pitch of 400 µm.

September 2011 Doc ID 022194 Rev 2 1/48

www.st.com

48

Contents TS4621B

Contents

1 Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 6

2 Typical application schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.1 I2C bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.1.1 I²C bus operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.1.2 Control register CR1 - address 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

4.1.3 Control register CR2 - address 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1.4 Control register CR3 - address 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

4.1.5 Summary of output impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.2 Wake-up and standby time definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4.3 Overview of the class-G, 2-level headphone amplifier . . . . . . . . . . . . . . . 31

4.4 External component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.4.1 Step-down inductor selection (L1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

4.4.2 Step-down output capacitor selection (Ct) . . . . . . . . . . . . . . . . . . . . . . . 33

4.4.3 Full capacitive inverter capacitors selection (C12 and Css) . . . . . . . . . 34

4.4.4 Power supply decoupling capacitor selection (Cs) . . . . . . . . . . . . . . . . . 34

4.4.5 Input coupling capacitor selection (Cin) . . . . . . . . . . . . . . . . . . . . . . . . . 34

4.4.6 Low-pass output filter (Rout and Cout) and

IEC 61000-4-2 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4.4.7 Integrated input low-pass filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.5 Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

4.5.1 Layout recommendations for single-ended operation . . . . . . . . . . . . . . 38

4.6 Startup phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.6.1 Auto zero technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.6.2 Input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.7 Layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

4.7.1 Common mode sense layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4.8 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

2/48 Doc ID 022194 Rev 2

TS4621B Contents

6 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

Doc ID 022194 Rev 2 3/48

List of figures TS4621B

List of figures

Figure 1. Typical application schematics for the TS4621B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 2. SCL and SDA timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 3. Start and stop condition timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 4. Current consumption vs. power supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 5. Standby current consumption vs. power supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 6. Maximum output power vs. loadin-phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 7. Maximum output power vs. loadout-of-phase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 8. Maximum output power vs. power supply voltage, RL = 16 Ω . . . . . . . . . . . . . . . . . . . . . . 13

Figure 9. Maximum output power vs. power supply voltage, RL = 32 Ω . . . . . . . . . . . . . . . . . . . . . . 13

Figure 10. Maximum output power vs. power supply voltage, RL = 47 Ω . . . . . . . . . . . . . . . . . . . . . . 14

Figure 11. Maximum output voltage vs. power supply voltage, in-phase. . . . . . . . . . . . . . . . . . . . . . . 14

Figure 12. Maximum output voltage vs. power supply voltage, out-of-phase . . . . . . . . . . . . . . . . . . . 14

Figure 13. Current consumption vs. total output power, RL = 16 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 14. Current consumption vs. total output power, RL = 32 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 15. Current consumption vs. total output power, RL = 47 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 16. Current consumption vs. total output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 17. Power dissipation vs. total output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 18. Output impedance vs. frequency in HiZ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 19. Differential input impedance vs. gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 20. THD+N vs. output power RL = 16 Ω, in-phase, V
Figure 21. THD+N vs. output power RL = 16 Ω, out-of-phase, V
Figure 22. THD+N vs. output power RL = 16 Ω, in-phase, V
Figure 23. THD+N vs. output power RL = 16 Ω, out-of-phase, V
Figure 24. THD+N vs. output power RL = 16 Ω, in-phase, V
Figure 25. THD+N vs. output power RL = 16 Ω, out-of-phase, V
Figure 26. THD+N vs. output power RL = 32 Ω, in-phase, V
Figure 27. THD+N vs. output power RL = 32 Ω, out-of-phase, V
Figure 28. THD+N vs. output power RL = 32 Ω, in-phase, V
Figure 29. THD+N vs. output power RL = 32 Ω, out-of-phase, V
Figure 30. THD+N vs. output power RL = 32 Ω, in-phase, V
Figure 31. THD+N vs. output power RL = 32 Ω, out-of-phase, V
Figure 32. THD+N vs. output power RL = 47 Ω, in-phase, V
Figure 33. THD+N vs. output power RL = 47 Ω, out-of-phase, V
Figure 34. THD+N vs. output power RL = 47 Ω, in-phase, V
Figure 35. THD+N vs. output power RL = 47 Ω, out-of-phase, V
Figure 36. THD+N vs. output power RL = 47 Ω, in-phase, V
Figure 37. THD+N vs. output power RL = 47 Ω, out-of-phase, V
Figure 38. THD+N vs. frequency RL = 16 Ω, in-phase, V
Figure 39. THD+N vs. frequency RL = 16 Ω, out-of-phase, V
Figure 40. THD+N vs. frequency RL = 16 Ω, in-phase, V
Figure 41. THD+N vs. frequency RL = 16 Ω, out-of-phase, V
Figure 42. THD+N vs. frequency RL = 16 Ω, in-phase, V
Figure 43. THD+N vs. frequency RL = 16 Ω, out-of-phase, V
Figure 44. THD+N vs. frequency RL = 32 Ω, in-phase, V
Figure 45. THD+N vs. frequency RL = 32 Ω, out-of-phase, V
Figure 46. THD+N vs. frequencyRL = 32 Ω, in-phase, V

CC

Figure 47. THD+N vs. frequency RL = 32 Ω, out-of-phase, V
Figure 48. THD+N vs. frequency RL = 32 Ω, in-phase, V

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 15

CC

CC

CC

CC

CC

CC

CC

CC

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . 18

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . 19

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . 15

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 16

= 3.6 V . . . . . . . . . . . . . . . . . . . . 16

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 16

= 4.8 V . . . . . . . . . . . . . . . . . . . . 16

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 16

= 2.5 V . . . . . . . . . . . . . . . . . . . . 16

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 17

= 3.6 V . . . . . . . . . . . . . . . . . . . . 17

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 17

= 4.8 V . . . . . . . . . . . . . . . . . . . . 17

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 17

= 2.5 V . . . . . . . . . . . . . . . . . . . . 17

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 18

= 3.6 V . . . . . . . . . . . . . . . . . . . . 18

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 18

= 4.8 V . . . . . . . . . . . . . . . . . . . . 18

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 18

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 19

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 19

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 19

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . 20

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 20

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . 20

CC

4/48 Doc ID 022194 Rev 2

TS4621B List of figures

Figure 49. THD+N vs. frequency RL = 32 Ω, out-of-phase, V
Figure 50. THD+N vs. frequency RL = 47 Ω, in-phase, V

CC

Figure 51. THD+N vs. frequency RL = 47 Ω, out-of-phase, V
Figure 52. THD+N vs. frequency RL = 47 Ω, in-phase, V

CC

Figure 53. THD+N vs. frequency RL = 47 Ω, out-of-phase, V
Figure 54. THD+N vs. frequency RL = 47 Ω, in-phase, V

CC

Figure 55. THD+N vs. frequency RL = 47 Ω, out-of-phase, V

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 20

CC

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . 20

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . 20

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . 21

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . 21

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . 21

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . 21

CC

Figure 56. THD+N vs. frequency RL = 10 kΩ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 57. THD+N vs. frequency RL = 600 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Figure 58. THD+N vs. output voltage RL = 10 kΩ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 59. THD+N vs. output voltage RL = 600 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 60. THD+N vs. input voltage, HiZ left and right . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 61. CMRR vs. frequency. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 62. PSRR vs. frequencyV
Figure 63. PSRR vs. frequencyV
Figure 64. PSRR vs. frequencyV

= 2.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

CC

= 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

CC

= 4.8 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

CC

Figure 65. Output signal spectrum. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 66. Crosstalk vs. frequencyRL = 16 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 67. Crosstalk vs. frequencyRL = 32 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 68. Crosstalk vs. frequencyRL = 47 Ω . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 69. Crosstalk vs. frequencyRL = 10 kΩ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 70. Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 71. Shutdown time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 72. I²C write operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 73. I²C read operations1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 74. Flowchart for short-circuit detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 75. TS4621B architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 76. Efficiency comparison. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 77. Class-G operating with a music sample . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 78. Typical application schematic with IEC 61000-4-2 ESD protection . . . . . . . . . . . . . . . . . . 36

Figure 79. Single-ended input configuration1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 80. Single-ended input configuration 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 81. Incorrect ground connection for single-ended option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 82. Correct ground connection for single-ended option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 83. Common mode sense layout example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Figure 84. Demonstration board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

Figure 85. Copper layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Figure 86. Copper layer and overlay layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Figure 87. TS4621B footprint recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 88. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 89. Marking (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Figure 90. Flip-chip - 16 bumps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Figure 91. Device orientation in tape pocket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

Doc ID 022194 Rev 2 5/48

Absolute maximum ratings and operating conditions TS4621B

1 Absolute maximum ratings and operating conditions

Table 1. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

in+,Vin-

T

R

P

ESD

CC

stg

T

thja

Supply voltage

Input voltage referred to ground +/- 1.2 V

Storage temperature -65 to +150 °C

Maximum junction temperature

j

Thermal resistance junction to ambient

Power dissipation Internally limited

d

Human body model (HBM)

All pins
VOUTR, VOUTL vs. AGND

Machine model (MM), min. value

Charge device model (CDM)

All pins
VOUTR, VOUTL

IEC61000-4-2 level 4, contact
IEC61000-4-2 level 4, air discharge

(1)

during 1ms.

(5)

(7)

(2)

(6)

(7)

(3)

5.5 V

150 °C

200 °C/W

(4)

2
4

100 V

500
750

+/- 8

+/- 15

kV

V

kV

Lead temperature (soldering, 10 sec) 260 °C

1. All voltage values are measured with respect to the ground pin.

2. Thermal shutdown is activated when maximum junction temperature is reached.

3. The device is protected from over-temperature by a thermal shutdown mechanism, active at 150° C.

4. Exceeding the power derating curves for long periods may provoke abnormal operation.

5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a

1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.

6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.

7. The measurement is performed on an evaluation board, with ESD protection EMIF02-AV01F3.

6/48 Doc ID 022194 Rev 2

TS4621B Absolute maximum ratings and operating conditions

Table 2. Operating conditions

Symbol Parameter Value Unit

V

CC

Supply voltage 2.3 to 4.8 V

internal step-down DC output voltages

HPVDD

High rail voltage
Low rail voltage

1.9

1.2

SDA, SCL Input voltage range GND to V

T

R

R

C

oper

thja

L

L

Load resistor ≥ 16 Ω

Load capacitor
Serial resistor of 12 Ω minimum, R

≥ 16 Ω 0.8 to 100

L

Operating free air temperature range -40 to +85 °C

Flip-chip thermal resistance junction to ambient 90 °C/W

V

cc

V

nF

Doc ID 022194 Rev 2 7/48

Typical application schematics TS4621B

2 Typical application schematics

Figure 1. Typical application schematics for the TS4621B

Negative left in put

Positive left input

Negative rig ht input

Positive right input

I²C bus

Cin
1 uF

Cin
1 uF

Cin
1 uF

Cin
1 uF

InL+

InR-

SDA

SCL

InL-

InR+

I2C

Cs

2.2 uF

PVss

Css

2.2 uF

-

+

+

-

Negative

supply

AVdd

Vbat

Positive

detector

detector

C12

2.2 uF

supply

Level

Level

Sw

3.3 uH

HpVdd

VoutL

CMS

VoutR

AGndC1 C2

L1

Ct
10 uF

Rout

12 ohms min.

Rout

12 ohms min.

Cout

0.8 nF min.

3

J1

2

1

Cout

0.8 nF min.

Table 3. TS4621B pin description

Pin number Pin name Pin definition

A1 SW Switching node of the buck converter

A2 AVDD Analog supply voltage, connect to battery

A3 VOUTL Output signal for left audio channel

A4 INL- Negative input signal for left audio channel

B1 AGND Device ground

B2 C1 Flying capacitor terminal for internal negative supply generator

B3 HPVDD Buck converter output, power supply for amplifier

B4 INL+ Positive input signal for left audio channel

C1 C2 Flying capacitor terminal for internal negative supply generator

C2 PVSS Negative supply generator output

C3 CMS

Common mode sense, to be connected as close as possible to the
ground of headphone/line out plug

C4 INR+ Positive input signal for right audio channel

D1 SDA I²C data signal, up to V

D2 SCL I²C clock signal, up to V

tolerant input

CC

tolerant input

CC

D3 VOUTR Output signal for right audio channel

D4 INR- Negative input signal for right audio channel

AM06119

8/48 Doc ID 022194 Rev 2

TS4621B Typical application schematics

Table 4. TS4621B component description

(1)

Component Value Description

Decoupling capacitors for V

. A 2.2 µF capacitor is sufficient for proper

CC

decoupling of the TS4621B. An X5R dielectric and 10 V rating voltage is

Cs 2.2 µF

recommended to minimize ΔC/ΔV when V
Must be placed as close as possible to the TS4621B to minimize parasitic

inductance and resistance.

Capacitor for internal negative power supply operation. An X5R dielectric
and 6.3 V rating voltage is recommended to minimize ΔC/ΔV when

C12 2.2 µF

HPVDD = 1.9 V.
Must be placed as close as possible to the TS4621B to minimize parasitic

inductance and resistance.

Filtering capacitor for internal negative power supply. An X5R dielectric and

C

SS

2.2 µF

6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V.

Cin

C

in

C

out

R

out

----------------------------------------- -=

2 π Rin Fc×××

0.8 to 100 nF

12 Ω min.

L1 3.3 µH

1

Input coupling capacitor that forms with Rin ≈ Rindiff/2 a first-order high­pass filter with a -3 dB cutoff frequency Fc. For example, at maximum gain
G=4dB, Rin=12.5kΩ, C

= 1 µF, therefore Fc = 13 Hz.

in

Output capacitor of 0.8 nF minimum to 100 nF maximum. This capacitor is
mandatory for operation of the TS4621B.

Output resistor in-series with the TS4621B output. This 12 Ω minimum
resistor is mandatory for operation of the TS4621B.

Inductor for internal DC/DC step-down converter.
References of inductors: refer to Section 4.4.1 for more information.

Tank capacitor for internal DC/DC step-down converter. An X5R dielectric

C

t

10 µF

and 6.3 V rating voltage is recommended to minimize ΔC/ΔV when
HPVDD = 1.9 V. Refer to Section 4.4.2 for more information.

1. Refer to Section 4.4 for a complete description of each component.

CC

=4.8V.

Doc ID 022194 Rev 2 9/48

Electrical characteristics TS4621B

3 Electrical characteristics

Table 5. Electrical characteristics of the I²C interface

for V

= +3.6 V, AGND = 0 V, T

CC

= 25°C (unless otherwise specified)

amb

Symbol Parameter Min. Typ. Max. Unit

V

V

V

Table 6. Electrical characteristics of the amplifier

Low level input voltage on SDA, SCL pins 0.6 V

IL

High level input voltage on SDA, SCL pins 1.2 V

IH

Low level output voltage, SDA pin, I

OL

Input current on SDA, SCL 10 µA

I

in

for V

= +3.6 V, AGND = 0 V, RL= 32 Ω + 15 Ω, T

CC

= 3mA 0.4 V

sink

V

SDA SCL,

------------------------------ -- -

600k Ω

= 25° C

amb

(unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unit

I

I

STBY

V

V

V

Quiescent supply current, no input signal, both channels

CC

enabled

Supply current, with input modulation, both channels enabled,
HPVDD = 1.2 V, output power per channel, F=1kHz

Pout = 100 µW at 3 dB crest factor

I

s

Pout = 500 µW at 3 dB crest factor
Pout = 1mW at 3dB crest factor
Pout = 100 µW at 10 dB crest factor
Pout = 500 µW at 10 dB crest factor
Pout = 1 mW at 10 dB crest factor

Standby current, no input signal, I²C CR1 = 01h

= 0 V, V

V

SDA

Input differential voltage range

in

SCL

= 0 V

(1)

Output offset voltage

oo

No input signal

Maximum output voltage, in-phase signals

= 16 Ω, THD+N = 1% max, f = 1 kHz

R

L

= 47 Ω, THD+N = 1% max, f = 1 kHz

out

R

L

RL = 10 kΩ, Rs = 15 Ω, CL = 1 nF, THD+N = 1% max,
f = 1 kHz

1.2 1.5 mA

2.3

3.7

4.7

3.5
5

6.5

2.1

3.1

3.9

0.6 5 µA

1V

-500 +500 µV

0.6

1.0

1.0

0.8

1.1

1.3

mA

V

rms

rms

Total harmonic distortion + noise, G = 0 dB

THD+N

PSRR

= 700 mVrms, F = 1 kHz

V

out

= 700 mVrms, 20 Hz < F < 20 kHz

V

out

Power supply rejection ratio
inputs

F = 217 Hz, G = 0 dB, R
F = 10 kHz, G = 0 dB, R

L

L

(1)

, V

≥16 Ω

≥16 Ω

= 200 mVpp, grounded

ripple

10/48 Doc ID 022194 Rev 2

0.006

0.05

90 100

70

0.02 %

dB

TS4621B Electrical characteristics

Table 6. Electrical characteristics of the amplifier

for V

= +3.6 V, AGND = 0 V, RL= 32 Ω + 15 Ω, T

CC

amb

= 25° C

(unless otherwise specified) (continued)

Symbol Parameter Min. Typ. Max. Unit

Common mode rejection ratio

CMRR

F = 1 kHz, G = 0 dB, V
F = 20 Hz to 20 kHz, G = 0 dB, Vic = 200 mV

= 200 mV

ic

pp

65

pp

45

Channel separation

Crosstalk

SNR

ONoise

= 32 Ω + 15 Ω , G = 0 dB, F = 1 kHz, Po = 10 mW

R

L

= 10 kΩ, G = 0 dB, F = 1 kHz, V

R

L

Signal-to-noise ratio, A-weighted, V
F = 1 kHz

(1)

out

out

= 1 V

=1 Vrms

G = +4 dB
G = +0 dB

Output noise voltage, A-weighted

(1)

G = +4 dB

, THD+N < 1%,

rms

60
80

99

100

100
110

9119µVrms

G = +0 dB

G Gain range with gain (dB) = 20 x log[(V

Mute InL/R+ - InL/R- = 1 V

rms

L/R)/(InL/R+ - InL/R-)] -60 +4 dB

out

- Gain step size error -0.5 +0.5

-80 dB

dB

dB

dB

step-

size

- Gain error (G = +4 dB) -0.45 +0.42 dB

R

Differential input impedance 25 34 kΩ

indiff

Input impedance during wake-up phase (referred to ground) 2 kΩ

Output impedance when CR1 = 00h (negative supply is ON and
amplifier output stages are OFF)

Z

out

F < 40 kHz
F = 6 MHz
F = 36 MHz

t

t

stby

t

t

1. Guaranteed by design and parameter correlation.

2. Refer to the application information in Section 4.2 on page 30.

Wake-up time

wu

Standby time 100 µs

Attack time. Setup time between low rail and high rail voltages

atk

of internal step-down DC/DC converter

Decay time 50 ms

dcy

(2)

(1)

10

500

75

12 16 ms

100 µs

kΩ

Ω
Ω

Doc ID 022194 Rev 2 11/48

Electrical characteristics TS4621B

Table 7. Timing characteristics of the I²C interface for I²C interface signals over

recommended operating conditions (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unit

f

SCL

t

d(H)

t

d(L)

t

t

t

t

t

Frequency, SCL 400 kHz

Pulse duration, SCL high 0.6 µs

Pulse duration, SCL low 1.3 µs

Setup time, SDA to SCL 100 ns

st1

Hold time, SCL to SDA 0 ns

h1

Bus free time between stop and start condition 1.3 µs

t

f

Setup time, SCL to start condition 0.6 µs

st2

Hold time, start condition to SCL 0.6 µs

h2

Setup time, SCL to stop condition 0.6 µs

st3

Figure 2. SCL and SDA timing diagram

t

d(H)

t

SCL

SDA

d(L)

t

st1

t

h1

Figure 3. Start and stop condition timing diagram

SCL

t

t

st2

h2

SDA

Start condition Stop condition

AM06113

t

f

t

st3

AM06114

12/48 Doc ID 022194 Rev 2

TS4621B Electrical characteristics

No load; No input Signal
SDA=SCL = 0V
Ta = 25°C

2.3 2.7 3.1 3.5 3.9 4.3 4.7

0

20

40

60

80

THD+N=10% (180°)

THD+N=10% (0°)

THD+N=1% (0°)

RL = 32Ω, F = 1kHz
BW < 30kHz, Tamb = 25°C

THD+N=1% (180°)

Output power (mW)

Power Supply Voltage Vcc (V)

Figure 4. Current consumption vs. power

supply voltage

1.6

1.4

(mA)

1.2

CC

1.0

0.8

0.6

0.4

Quiscent Supply Current I

0.2

0.0

2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8

Power Supply Voltage Vcc (V)

No load; No input Signal
Both channels enabled
Ta = 25°C

Figure 6. Maximum output power vs. load

in-phase

80

70

60

50

40

30

20

Output power (mW)

10

0

10 100 1k

VCC=4.8V

VCC=3.6V

VCC=2.3V

RL Load resistance ( )

Inputs = 0°, F = 1kHz
THD+N = 1%
Tamb = 25°C

Figure 5. Standby current consumption vs.

power supply voltage

Figure 7. Maximum output power vs. load

out-of-phase

80

70

60

50

40

30

20

Output power (mW)

10

0

10 100 1k

VCC=4.8V

VCC=3.6V

VCC=2.3V

RL Load resistance ( )

Inputs = 180°, F = 1kHz
THD+N = 1%
Tamb = 25°C

Figure 8. Maximum output power vs. power

supply voltage, RL = 16 Ω

RL = 16Ω, F = 1kHz

120

BW < 30kHz, Tamb = 25°C

100

80

60

40

Output power (mW)

20

0

2.3 2.7 3.1 3.5 3.9 4.3 4.7

THD+N=10% (0°)

THD+N=1% (180°)

Power Supply Voltage Vcc (V)

Figure 9. Maximum output power vs. power

supply voltage, RL = 32 Ω

THD+N=10% (180°)

THD+N=1% (0°)

Doc ID 022194 Rev 2 13/48

Electrical characteristics TS4621B

2.3 2.7 3.1 3.5 3.9 4.3 4.7

700

800

900

1000

1100

1200

1300

1400

1500

1600

10 K

Ω

600

Ω

60

Ω

47

Ω

16

Ω

F = 1kHz
BW < 30kHz, Tamb = 25°C
Inputs = 0°, THD+N = 1%

32

Ω

Output Voltage (mVrms)

Power Supply Voltage Vcc (V)

0.1 1 10

1

10

100

Vcc=4.8V

Vcc=3.6V

Vcc=2.3V

Both channels enabled
RL = 16Ω, F = 1KHz
Ta = 25°C
Crest Factor = 3dB

Supply Current I

S

(mA)

Total Output Power (mW)

0.1 1 10

1

10

100

Vcc=4.8V

Vcc=3.6V

Vcc=2.3V

Both channels enabled
RL = 47Ω, F = 1 KHz
Ta = 25°C
Crest Factor = 3dB

Supply Current I

S

(mA)

Total Output Power (mW)

Figure 10. Maximum output power vs. power

supply voltage, RL = 47 Ω

RL = 47Ω, F = 1kHz
BW < 30kHz, Tamb = 25°C

60

THD+N=10% (0°)

THD+N=10% (180°)

40

20

Output power (mW)

THD+N=1% (180°)

0

2.3 2.7 3.1 3.5 3.9 4.3 4.7

Power Supply Voltage Vcc (V)

THD+N=1% (0°)

Figure 12. Maximum output voltage vs. power

supply voltage, out-of-phase

1600

1500

1400

1300

1200

1100

1000

Output Voltage (mVrms)

F = 1kHz
BW < 30kHz, Tamb = 25°C
Inputs = 180°, THD+N=1%

47

16

Ω

Ω

32

Ω

900

800

700

2.3 2.7 3.1 3.5 3.9 4.3 4.7

Power Supply Voltage Vcc (V)

60

600

Ω

Ω

10 K

Ω

Figure 11. Maximum output voltage vs. power

supply voltage, in-phase

Figure 13. Current consumption vs. total

output power, RL = 16 Ω

Figure 14. Current consumption vs. total

output power, RL = 32 Ω

100

Both channels enabled
RL = 32Ω, F = 1KHz
Ta = 25°C
Crest Factor = 3dB

(mA)

S

10

Supply Current I

14/48 Doc ID 022194 Rev 2

1

0.1 1 10

Vcc=3.6V

Total Output Power (mW)

Figure 15. Current consumption vs. total

output power, RL = 47 Ω

Vcc=2.3V

Vcc=4.8V

TS4621B Electrical characteristics

-60 -55 -50 -45 -40 -35 -30 -25 -20 -15 -10 -5 0

30

40

50

60

70

80

Vcc=2.3V to 4.8V
Ta = 25°C

Differential Input Impedance (K )

Gain (dB)

Figure 16. Current consumption vs. total

output power

100

Both channels enabled
RL = 47Ω, F = 1KHz
Ta = 25°C, Vcc = 3.6V

(mA)

S

10

Crest Factor=3dB

Supply Current I

Crest Factor=10dB

1

0.1 1

Total Output Power (mW)

Figure 18. Output impedance vs. frequency in

HiZ mode

Input Floating

Input grounded

Figure 17. Power dissipation vs. total output

power

100

R = 16

Ω

R = 32

Ω

10

R = 47

Ω

Power Dissipation (mW)

1

0.1 1 10

Total Output Power (mW)

Both channels enabled
F = 1KHz,
Ta = 25°C
Crest Factor = 3dB

Figure 19. Differential input impedance vs.

gain

Vcc=2.3V to 4.8V
HIz; Right & Left
Osc level=0.5V
Ta = 25°C

Figure 20. THD+N vs. output power

RL = 16 Ω, in-phase, V

Vcc = 2.5V, RL = 16
G = 4dB, Inputs = 0
BW < 30kHz, Tamb = 25°C

RMS

Ω

°

F=8kHz

F=1kHz

CC

F=80Hz

= 2.5 V

Figure 21. THD+N vs. output power

RL = 16 Ω, out-of-phase, V

Vcc = 2.5V, RL = 16
G = 4dB, Inputs = 180
BW < 30kHz, Tamb = 25°C

Ω

°

F=8kHz

F=1kHz

CC

F=80Hz

= 2.5 V

Doc ID 022194 Rev 2 15/48