ST TS27L4 User Manual
Very low power precision CMOS quad operational amplifiers
Inverting Input 2
Non-inverting Input 2
Non-inverting Input 1
CC
V
-
CC
V
1
2
3
4
8
5
6
7
9
10
11
12
13
14
+
Output 3
Output 4
Non-inverting Input 4
Inverting Input 4
Non-inverting Input 3
Inverting Input 3
-
+
-
+
-
+
-
+
Output 1
Inverting Input 1
Output 2
Features
■ Very low power consumption: 10 µA/op
■ Output voltage can swing to ground
■ Excellent phase margin on capacitive loads
■ Unity gain stable
■ Two input offset voltage selections
TS27L4
DIP14
(Plastic package)
Description
The TS27L4 series are low-cost, low-power quad
operational amplifiers designed to operate with
single or dual supplies. These operational
amplifiers use the ST silicon gate CMOS process
allowing an excellent consumption-speed ratio.
These series are ideally suited for low
consumption applications.
Three power consumptions are available enabling
the best consumption-speed ratio:
I
= 10 µA/amp: TS27L4 (very low power),
CC
I
= 150 µA/amp: TS27M4 (low power),
CC
I
= 1 mA/amp: TS274 (standard).
CC
These CMOS amplifiers offer very high input
impedance and extremely low input currents. The
major advantage versus JFET devices is the very
low input current drift with temperature (see
Figure 4).
SO-14
(Plastic micropackage)
TSSOP14
(Thin shrink small outline package)
Pin connections (top view)
March 2009 Rev 3 1/15
www.st.com
15
Circuit schematics TS27L4
E
E
Input
differential
Second
stage
Output
stage
Output
CC
V
CC
V
Current
source
x I
1 Circuit schematics
Figure 1. Internal block diagram
2/15
TS27L4 Circuit schematics
Figure 2. Schematic diagram (for 1/4 TS27L4)
15
T
12
T
10
T
11
T
8
T
6
T
Output
16
T
14
T
13
T
9
T
7
T
R1
C1
Input
2
T
5
CC
V
T
1
T
4
T
3
T
27
T
26
T
25
T
24
T
Inpu t
28
T
23
T
2
R
18
T
17
T
19
T
29
T
22
T
21
T
20
T
CC
V
3/15
Absolute maximum ratings and operating conditions TS27L4
2 Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings
Symbol Parameter Value Unit
(3)
(1)
18 V
(2)
±18 V
-0.3 to 18 V
+
≥ 15V ±30 mA
CC
(4)
105
100
80
(4)
31
32
33
(5)
(6)
(7)
1kV
100 V
1.5 kV
°C/W
°C/W
V
V
V
T
CC+
I
o
I
in
stg
Supply voltage
Differential input voltage
id
Input voltage
in
Output current for V
Input current ±5 mA
Storage temperature range -65 to +150 °C
Thermal resistance junction to ambient
R
thja
SO-14
TSSOP14
DIP14
Thermal resistance junction to case
R
thjc
SO-14
TSSOP14
DIP14
HBM: human body model
ESD
MM: machine model
CDM: charged device model
1. All values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive
supply voltage.
4. Short-circuits can cause excessive heating and destructive dissipation. Values are typical.
5. Human body model: a 100 pF capacitor is charged to the specified voltage, then discharged through a
1.5 kΩ resistor between two pins of the device. This is done for all couples of connected pin combinations
while the other pins are floating.
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
connected pin combinations while the other pins are floating.
7. Charged device model: all pins and the package are charged together to the specified voltage and then
discharged directly to the ground through only one pin. This is done for all pins.
Table 2. Operating conditions
Symbol Parameter TS27L4C TS27L4I Unit
+
V
V
T
Supply voltage 3 to 16 V
CC
Common mode input voltage range 0 to V
icm
Operating free-air temperature range 0 to +70 -40 to +125 °C
oper
4/15
+
- 1.5 V
CC
TS27L4 Electrical characteristics
3 Electrical characteristics
Table 3. V
+
= +10 V, V
CC
Symbol Parameter
Input offset voltage
= 1.4V, Vic = 0V
V
o
TS27L4
V
io
TS27L4A
≤ T
T
min
amb
≤ T
max
TS27L4
TS27L4A
DV
Input offset voltage drift 2 2 µV/°C
io
Input offset current
I
io
Vic = 5V, VO = 5V
≤ T
T
min
amb
≤ T
Input bias current
I
ib
Vic = 5V, VO = 5V
T
≤ T
amb
≤ T
min
High level output voltage
V
OH
V
OL
= 100mV, RL = 1MΩ
V
id
T
≤ T
amb
≤ T
min
Low level output voltage
Vid = -100mV
max
(1)
max
max
CC
(1)
-
= 0 V, T
= +25° C (unless otherwise specified)
amb
TS27L4C/AC TS27L4I/AI
Min. Typ. Max. Min. Typ. Max.
1.1
0.9105
12
6.5
1
100
1
150
8.8
98.8
8.7
50 50 mV
8.6
1.1
0.9105
6.5
1
200
1
300
9
Unit
mV
12
pA
pA
V
A
vd
GBP
CMR
SVR
I
CC
I
o
I
sink
SR
Large signal voltage gain
V
= 5V, RL = 1MΩ, Vo = 1V to 6V
iC
≤ T
T
min
amb
≤ T
max
Gain bandwidth product
= 40dB, RL = 1MΩ, CL = 100pF, fin = 100kHz
A
v
Common mode rejection ratio
V
= 1V to 7.4V, Vo = 1.4V
iC
Supply voltage rejection ratio
+
V
= 5V to 10V, Vo = 1.4V
CC
Supply current (per amplifier)
= 1, no load, Vo = 5V
A
v
T
≤ T
amb
≤ T
max
min
Output short circuit current
= 0V, Vid = 100mV
V
o
Output sink current
= VCC, Vid = -100mV
V
o
Slew rate at unity gain
R
= 1MΩ, CL = 100pF, Vi = 3 to 7V
L
6045100 6040100
V/mV
0.1 0.1 MHz
65 80 65 80 dB
60 80 60 80 dB
10 15
17
10 15
18
µA
60 60 mA
45 45 mA
0.04 0.04 V/µs
5/15
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