ST TDR004V1 User Manual

RF power amplifier demonstration board using two
SD2933 N-channel enhancement-mode lateral MOSFETs
Features
Excellent thermal stability
Frequency: 1.6 - 54 MHz
Output power: 400 W (typ.)
Input power 10 W max.
Efficiency: 57 % - 76 %
IMD at 300 WPEP < -26 dBc
Load mismatch: 3:1 (all phases)
Description
The STEVAL-TDR004V1 demonstration board is an RF broadband power amplifier intended for linear or nonlinear operation over the 1.6 to 54 MHz band, using two SD2933 gold metallized N­channel MOS field-effect transistors. The temperature compensating biasing circuit supports class B and class AB operation.
STEVAL-TDR004V1 is designed in cooperation with Specific RF Devices (Germany).
STEVAL-TDR004V1

Table 1. Device summary

Order code
STEVAL-TDR004V1
March 2010 Doc ID 17341 Rev 1 1/12
www.st.com
12
Contents STEVAL-TDR004V1
Contents
1 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Typical performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 STEVAL-TDR004V1 amplifier photos . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 STEVAL-TDR004V1 class of operation . . . . . . . . . . . . . . . . . . . . . . . . . . 8
6 SD2933 mounting recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6.1 Mounting recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6.2 Mounting sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12 Doc ID 17341 Rev 1
STEVAL-TDR004V1 Electrical data

1 Electrical data

1.1 Maximum ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit
P
IN
P
OUT
(1)
V
DD
V
GG
I
DD
P
DISS
1. VGG from 9 to 15 V and PIN < 16 W
Input power 16 W
Output power 500 W
Drain supply voltage 50 V
Gate biasing voltage 15 V
Drain current 20 A
Power dissipation 400 W
Doc ID 17341 Rev 1 3/12
Electrical characteristics STEVAL-TDR004V1

2 Electrical characteristics

TA = +25 ºC, VDD = 48 V, I
= 2 x 900 mA
DQ

Table 3. Electrical specification

Symbol Test conditions Min. Typ. Max. Unit
Freq Frequency range 1.6 54 MHz
P
OUT
Gain P
ND P
H2 2
H3 3
VSWR Load mismatch all phases @ P
PIN = 10 W 300 400 W
= 10 W 16.2 ± 0.6dB dB
IN
= 10 W 57 - 76 %
IN
ND
Harmonic @ P
RD
Harmonic @ P
= 300 W -26 / -49 dBc
OUT
= 300 W -13 / -58 dBc
OUT
= 300 W 3:1
OUT
4/12 Doc ID 17341 Rev 1
STEVAL-TDR004V1 Typical performance
)

3 Typical performance

Figure 1. Output power and efficiency
60 59 58 57 56 55 54 53
Output Power (dBm)
52 51 50
vs. frequency
- eff
- Pout
Vdd =
40V
Id q = 2x
0 5 10 15 20 25 30 35 40 45 50 55 60 65
F requency (MHz)
90
Pin = 10W
mA
100 90 80 70 60 50 40 30 20 10 0
Figure 2. Output power and efficiency
vs. frequency
60 59 58 57 56 55 54
Eff iciency (%
53
Output Power (dBm)
52 51 50
0 5 10 15 20 25 30 35 40 45 50 55 60 65
- eff
- Pout
Vdd =
Idq = 2x
Frequency (MHz)
48V
900
Pin = 10W
mA
100 90 80 70 60 50 40 30 20 10 0
Efficiency (%)
Figure 3. IMD vs. frequency Figure 4. Output power vs. drain voltage
0
-5
-10
-15
-20
IMD (dBc)
-25
-30
-35
-40 0 5 10 15 20 25 30 35 40 45 50 55 60 65
IMD
Frequency (MHz)
Vdd =
48V
Idq = 2x
900
Pout = 300 WPEP
mA
600
500
400
300
200
Output Power (W)
100
0
10 14 18 22 26 30 34 38 42 46 50
Pin = 10W
Idq = 2x
1.6 M Hz 5 M Hz 10 M Hz 20 MHz 28 MHz 40 MHz 60 MHz
mA
900
Drain voltage (V)
Doc ID 17341 Rev 1 5/12
Typical performance STEVAL-TDR004V1

Figure 5. Harmonics vs. frequency

0
Vdd =
-10
-20
I dq = 2x
Pout = 300 WPEP
48V
900
mA
-30
-40
-50
Harmon ics ( d Bc)
-60
-70 0 5 10 15 20 25 30 35 40 45 50 55 60 65
H2 H3
Freque ncy (MHz)
6/12 Doc ID 17341 Rev 1
STEVAL-TDR004V1 STEVAL-TDR004V1 amplifier photos

4 STEVAL-TDR004V1 amplifier photos

Figure 6. Top view

Figure 7. Side view

Doc ID 17341 Rev 1 7/12
STEVAL-TDR004V1 class of operation STEVAL-TDR004V1

5 STEVAL-TDR004V1 class of operation

class B: a low bias point with ~100 mA per transistor
class AB: a higher bias point with ~ 900 mA per transistor
To select a bias point, the STEVAL-TDR004V1 features a “BIAS” control port.
The bias point is 2 x 100 mA if “BIAS” is left open. In this case a DC voltage of ~5 V is
present
The bias point is 2 x 900 mA if “BIAS” is connected to ground.
"PA_ON" control port / ON-OFF bias current
To switch on the biasing circuit, connect “PA_ON” to ground.
To switch off the biasing circuit, leave “PA_ON” open.
8/12 Doc ID 17341 Rev 1
STEVAL-TDR004V1 SD2933 mounting recommendations

6 SD2933 mounting recommendations

6.1 Mounting recommendations

Ensure the holes in the heat sinks are free from burrs
The minimum depth of tapped holes in heat sinks is 6 mm
Use 4-40 UNC-2A cheese-head screws with a flat washer to more evenly distribute the
joint pressure
The minimum flatness of the mounting area is 0.02 mm
Mounting area roughness should be less than 0.5 µm (micro)
Avoid, as much as possible, the use of flux or flux solutions, as they can penetrate even
hermetically sealed ceramic-capped transistors. Tin and wash the printed circuit board BEFORE mounting the power transistors, then solder the transistor leads without using flux
Transistor leads may be tinned by dipping them full-length into a solder bath at a
temperature of about 230 °C. No flux should be used during tinning
Recommended heat sink compounds: WPSII (silicon-free) from Austerlitz Electronics,
340 from Dow Corning, etc.

6.2 Mounting sequence

Apply a thin layer of evenly distributed heat sink compound to the flange
Position the device with flat washers in place
Tighten the screws until finger tight (0.05 Nm)
Further tighten the screws until the specified torque is reached
For M174, M177 & M244 package types, torque should be a minimum of 0.6 Nm, and a
maximum of 0.75 Nm.
Doc ID 17341 Rev 1 9/12
SD2933 mounting recommendations STEVAL-TDR004V1

Table 4. DMOS packages - list of materials

Package
type
M174
M174 (Moly
disk)
M177
M244
Description Flange Leadframe
0.500 DIA 4L NON
HERM
W/FLANGE
0.500 DIA 4L NON
HERM
W/FLANGE
(MOLY
DISK)
0.550 DIA 4L NON
HERM
W/FLANGE
2x
0.400x0.425 WIDE 2L LAP N/H FLANGE
Cu
Cu-Mo-
Cu
Cu-Mo-
Cu
(85%) -
Cu
(15%)
W
ALLOY 42
(Fe58 /
Ni42)
ALLOY 42
(Fe58 /
Ni42)
ALLOY 42
(Fe58 /
Ni42)
ALLOY 42
(Fe58 /
Ni42)
Ceramic
insulator
BeO
(99.5%
min)
BeO
(99.5%
min)
BeO
(99.5%
min)
BeO(99.5
% min)
Plating Torque (Nm)
Leads Flange Min Max
Au (100 µ min)
over Ni (100 µ min /
350 µ max)
Au (100 µ min)
over Ni (100 µ min /
350 µ max)
Au (60 µ min) over
Ni (100 µ min /
350 µ max)
Au (60 µ min) over
Ni (100 µ min /
350 µ max)
Ni(100 µ min) +
Pd (10 µ min)
Ni(100 µ min) +
Pd (10 µ min)
Au (100 µ min)
over Ni (100 µ min
/ 350 µ max)
Au (60 µ min) over
Ni (100 µ min /
350 µ max)
0.6 0.75
0.6 0.75
0.6 0.75
0.6 0.75
10/12 Doc ID 17341 Rev 1
STEVAL-TDR004V1 Revision history

7 Revision history

Table 5. Document revision history

Date Revision Changes
31-Mar-2010 1 Initial release.
Doc ID 17341 Rev 1 11/12
STEVAL-TDR004V1
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12/12 Doc ID 17341 Rev 1
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