–4 x 50 W/4 Ω max.
–4 x 30 W/4 Ω @ 14.4 V, 1 kHz, 10 %
–4 x 80 W/2 Ω max.
–4 x 55 W/2 Ω @ 14.4V, 1 kHz, 10 %
■ MOSFET output power stage
■ Excellent 2 Ω driving capability
■ Hi-Fi class distortion
■ Low output noise
■ ST-BY function
■ Mute function
■ Automute at min. supply voltage detection
■ Low external component count:
– Internally fixed gain (26 dB)
– No external compensation
– No bootstrap capacitors
■ On board 0.35 A high side driver
Protections:
■ Output short circuit to gnd, to V
load
■ Very inductive loads
■ Overrating chip temperature with soft thermal
limiter
■ Output DC offset detection
■ Load dump voltage
■ Fortuitous open gnd
■ Reversed battery
Table 1.Device summary
, across the
s
TDA7850
Flexiwatt25
(Vertical)
Flexiwatt25
(Horizontal)
■ ESD
Description
The TDA7850 is a breakthrough MOSFET
technology class AB audio power amplifier in
Flexiwatt 25 package designed for high power car
radio. The fully complementary P-Channel/NChannel output structure allows a rail to rail
output voltage swing which, combined with high
output current and minimized saturation losses
sets new power references in the car-radio field,
with unparalleled distortion performances.
Figure 7.Output power vs. supply voltage (R
Figure 8.Output power vs. supply voltage (R
Figure 9.Distortion vs. output power (R
Figure 10.Distortion vs. output power (R
Figure 11.Distortion vs. frequency (R
Figure 12.Distortion vs. frequency (R
Figure 16.Power dissipation and efficiency vs. output power (R
Figure 17.Power dissipation and efficiency vs. output power (R
Figure 18.Power dissipation vs. output power (R
Figure 19.Power dissipation vs. output power (R
*) R3 = 10kΩ to be placed when pin 25 is used as offset detector.
C7
2200μF
Vcc1-2
SVRTAB
C6
47μF
Vcc3-4
620
HSD/OD
R3
100nF470μF
HSD
*)
HSD/V
OFF_DET
OUT1+
OUT1-
PW-GND
OUT2+
OUT2-
PW-GND
OUT3+
OUT3-
PW-GND
OUT4+
OUT4-
PW-GND
D94AU158D
9
8
7
5
2
3
17
18
19
21
24
23
OUT1
OUT2
OUT3
OUT4
D95AU335
5/18
Pin descriptionTDA7850
2 Pin description
Figure 3.Pin connection (top view)
TAB
P-GND2
OUT2-
ST-BY
OUT2+
V
OUT1-
P-GND1
OUT1+
SVR
IN1
IN2
S-GND
IN4
IN3
AC-GND
OUT3+
P-GND3
OUT3-
V
OUT4+
MUTE
OUT4-
P-GND4
HSD
TAB
P-GND2
OUT2-
ST-BY
OUT2+
V
OUT1-
P-GND1
OUT1+
SVR
IN1
IN2
S-GND
IN4
IN3
AC-GND
OUT3+
P-GND3
OUT3-
V
OUT4+
MUTE
OUT4-
P-GND4
HSD
1
CC
Vertical
CC
25
D94AU159A
1
CC
Horizontal
CC
25
D06AU1655
6/18
TDA7850Electrical specifications
3 Electrical specifications
3.1 Absolute maximum ratings
Table 2.Absolute maximum ratings
SymbolParameterValueUnit
V
S (DC)
V
S (pk)
V
Operating supply voltage18V
S
DC supply voltage28V
Peak supply voltage (for t = 50 ms)50V
Output peak current
I
repetitive (duty cycle 10 % at f = 10 Hz)
O
non repetitive (t = 100 μs)
P
T
T
Power dissipation T
tot
Junction temperature150°C
j
Storage temperature-55 to 150°C
stg
3.2 Thermal data
Table 3.Thermal data
SymbolParameterValueUnit
R
th j-case
Thermal resistance junction to caseMax.1°C/W
9
10
= 70 °C80W
case
A
A
7/18
Electrical specificationsTDA7850
3.3 Electrical characteristics
Table 4.Electrical characteristics
(Refer to the test and application diagram, V
T
= 25 °C; unless otherwise specified).
amb
= 14.4 V; RL = 4 Ω; Rg = 600 Ω; f = 1 kHz;
S
SymbolParameterTest conditionMin. Typ.Max.Unit
Quiescent currentRL = ∞100180280mA
I
q1
V
dV
dG
P
o max.
THDDistortion
e
SVRSupply voltage rejectionf = 100 Hz; V
I
I
pin5
V
SB out
V
SB in
A
V
M out
V
Output offset voltagePlay mode / Mute mode±50mV
OS
During mute ON/OFF output
offset voltage
OS
During Standby ON/OFF output
ITU R-ARM weighted
see Figure 20
offset voltage
Voltage gain252627dB
G
v
Channel gain unbalance±1dB
v
= 13.2 V; THD = 10 %
V
S
= 13.2 V; THD = 1 %
V
S
= 14.4 V; THD = 10 %
Po Output power
V
S
VS = 14.4 V; THD = 1 %
= 14.4 V; THD = 10 %, 2 Ω5055W
V
S
Max. output power
Output noise
No
High cut-off frequencyPO = 0.5 W100300KHz
f
ch
R
Input impedance80100120KΩ
i
Cross talk
C
T
Standby current consumption
SB
(1)
ST-BY pin currentV
VS = 14.4 V; RL = 4 Ω
= 14.4 V; RL = 2 Ω
V
S
P
= 4W
o
= 15W; RL = 2Ω
P
o
"A" Weighted
Bw = 20 Hz to 20 kHz
= 1Vrms5075dB
r
f = 1 kHz P
f = 10 kHz P
V
ST-BY
V
ST-BY
ST-BY
= 4 W
O
= 4 W
O
= 1.5 V20
= 0 V10
= 1.5 V to 3.5 V±1μA
-10+10mV
-10+10mV
23
16
28
20
25
19
30
23
50
85
0.006
0.015
35
50
6070
60
Standby out threshold voltage(Amp: ON)2.75V
Standby in threshold voltage(Amp: OFF)1.5V
Mute attenuationP
M
= 4 W8090dB
Oref
Mute out threshold voltage(Amp: Play)3.5V
Mute in threshold voltage(Amp: Mute)1.5V
M in
0.02
0.03
50
70
-
-
W
W
%
μV
dB
μA
8/18
TDA7850Electrical specifications
Table 4.Electrical characteristics (continued)
(Refer to the test and application diagram, V
T
= 25 °C; unless otherwise specified).
amb
SymbolParameterTest conditionMin. Typ.Max.Unit
(Amp: Mute)
Att
V
AM inVS
I
pin23
Muting pin current
HSD section
automute threshold
≥ 80 dB; P
(Amp: Play)
Att < 0.1 dB; P
V
= 1.5 V
MUTE
(Sourced Current)
V
= 3.5 V-518μA
MUTE
= 14.4 V; RL = 4 Ω; Rg = 600 Ω; f = 1 kHz;
S
= 4 W
Oref
= 0. 5W
O
6.57
7.58
71218μA
V
V
dropout
I
Dropout voltageIO = 0.35 A; VS = 9 to 16 V0.250.6V
Current limits400800mA
prot
Offset detector (Pin 25)
V
M_ON
V
M_OFF
V
V
V
1. Saturated square wave output.
Mute voltage for DC offset
detection enabled
Detected differential output offset V
OFF
Pin 25 voltage for detection =
25_T
TRUE
Pin 25 Voltage for detection =
25_F
FALSE
V
V
V
V
V
ST-BY
ST-BY
ST-BY
OFF
ST-BY
OFF
= 5 V
= 5 V; V
= 5 V; V
> ±4 V
= 5 V; V
> ±2 V
8V
6V
= 8 V±2±3±4V
mute
= 8 V
mute
mute
= 8 V
01.5V
12V
9/18
Electrical specificationsTDA7850
Figure 4.Components and top copper layer of the Figure 2.
Figure 5.Bottom copper layer Figure 2.
10/18
TDA7850Electrical specifications
Vs (V)
Po (W)
Vs (V)
RL= 4Ω
f = 1 KHz
Po-max
THD= 10%
THD= 1%
Vs (V)
Po (W)
Po-max
THD=10%
THD=1%
RL= 2Ω
f = 1 KHz
Po (W)
THD (%)
VS = 14.4 V
R
L
= 4Ω
f = 1 KHz
f = 10 KHz
Po (W)
THD (%)
VS = 14.4 V
RL = 2Ω
f = 10 KHz
f = 1 KHz
f (Hz)
THD (%)
VS = 14.4 V
R
L
= 4Ω
P
o
= 4 W
3.4 Electrical characteristic curves
Figure 6.Quiescent current vs. supply
voltage
Id (mA)
200
Vi = 0
190
RL =
180
170
160
150
140
130
120
110
100
∞
8 1012141618
AC00064
Figure 8.Output power vs. supply voltage
(R
= 2Ω)
130
120
110
100
90
80
70
60
50
40
30
20
10
0
89101112131415161718
L
AC00066
Figure 7.Output power vs. supply voltage
(R
= 4Ω)
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
89101112131415161718
L
AC00064
Figure 9.Distortion vs. output power
(R
= 4Ω)
10
1
0.1
0.01
0.001
0.1110100
L
AC00067
Figure 10. Distortion vs. output power
(R
= 2Ω)
10
1
0.1
0.01
0.001
0.1110100
L
Figure 11. Distortion vs. frequency
(R
= 4Ω)
10
1
0.1
0.01
0.001
10100100010000100000
AC00068
11/18
L
AC00069
Electrical specificationsTDA7850
f (Hz)
THD (%)
VS = 14.4 V
R
L
= 2Ω
P
o
= 8 W
R
L
= 4Ω
P
o
= 4 W
R
g
= 600Ω
f (Hz)
CROSSTALK (dB)
f (Hz)
SVR (dB)
Rg = 600Ω
Vripple = 1 Vrms
Vs (V)
OUTPUT ATTN (dB)
RL = 4Ω
P
o
= 4 W ref
P
tot
(W)
η
(%)
Po (W)
0
10
20
304050
60
708090
P
tot
η
VS = 14.4 V
R
L
= 4 x 4Ω
f = 1 KHz SINE
Ptot (W)
η
(%)
Po (W)
P
tot
η
VS = 14.4 V
R
L
= 4 x 2Ω
f = 1 KHz SINE
Figure 12. Distortion vs. frequency
(R
= 2Ω)
10
1
0.1
0.01
0.001
10100100010000100000
L
Figure 14. Supply voltage rejection vs.
frequency
-20
-30
-40
-50
-60
-70
-80
-90
-100
10100100010000100000
AC00070
AC00072
Figure 13. Crosstalk vs. frequency
-20
-30
-40
-50
-60
-70
-80
-90
-100
10100100010000100000
AC00071
Figure 15. Output attenuation vs. supply
voltage
0
-20
-40
-60
-80
-100
5678910
AC00073
Figure 16. Power dissipation and efficiency
vs. output power (R
90
80
70
60
50
40
30
20
10
0
02468 10 12 14 16 18 20 22 24 26 28 30
12/18
= 4Ω, SINE)
L
AC00074
Figure 17. Power dissipation and efficiency
vs. output power (R
180
160
140
120
100
80
60
40
20
0
0510152025303540455055
= 2Ω, SINE)
L
AC00075
90
80
70
60
50
40
30
20
10
0
TDA7850Electrical specifications
6
VS = 13.2 V
R
L
= 4 x 4Ω
GAUSSIAN NOISE
CLIP START
P
tot
(W)
Po (W)
VS = 13.2 V
R
L
= 4 x 2Ω
GAUSSIAN NOISE
CLIP START
P
tot
(W)
Po (W)
Figure 18. Power dissipation vs. output power
(R
= 4Ω, audio program simulation)
30
25
20
15
10
5
0123456
L
AC0007
Figure 20. ITU R-ARM frequency response,
weighting filter for transient pop
Output attenuation (dB)
10
0
-10
Figure 19. Power dissipation vs. output power
(R
= 2Ω, audio program simulation)
60
55
50
45
40
35
30
25
20
15
10
5
0246810
L
AC00077
-20
-30
-40
-50
10100100010000100000
Hz
AC00343
13/18
Application hintsTDA7850
4 Application hints
Referred to the circuit of Figure 2.
4.1 SVR
Besides its contribution to the ripple rejection, the SVR capacitor governs the turn ON/OFF
time sequence and, consequently, plays an essential role in the pop optimization during
ON/OFF transients. To conveniently serve both needs, Its minimum recommended value
is 10µF.
4.2 Input stage
The TDA7850's inputs are ground-compatible and can stand very high input signals (±
8Vpk) without any performance degradation.
If the standard value for the input capacitors (0.1µF) is adopted, the low frequency cut-off
will amount to 16 Hz.
4.3 Standby and muting
Standby and Muting facilities are both CMOS compatible. In absence of true CMOS ports or
microprocessors, a direct connection to Vs of these two pins is admissible but a 470kΩ
equivalent resistance should be present between the power supply and the muting and
ST-BY pins.
R-C cells have always to be used in order to smooth down the transitions for preventing any
audible transient noises.
About the standby, the time constant to be assigned in order to obtain a virtually pop-free
transition has to be slower than 2.5 V/ms.
4.4 DC offset detector
The TDA7850 integrates a DC offset detector to avoid that an anomalous DC offset on the
inputs of the amplifier may be multiplied by the gain and result in a dangerous large offset on
the outputs which may lead to speakers damage for overheating. The feature is enabled by
the MUTE pin (according to table 3) and works with the amplifier unmuted and with no signal
on the inputs.
The DC offset detection is signaled out on the HSD pin. To ensure the correct functionality of
the Offset Detector it is necessary to connect a pulldown 10 kW resistor between HSD and
ground.
4.5 Heatsink definition
Under normal usage (4 Ohm speakers) the heatsink's thermal requirements have to be
deduced from Figure 18, which reports the simulated power dissipation when real
music/speech programmes are played out. Noise with gaussian-distributed amplitude was
employed for this simulation. Based on that, frequent clipping occurrence (worst-case) will
cause P
heatsink's thermal resistance should be approximately 2°C/W. This would avoid any thermal
shutdown occurrence even after long-term and full-volume operation.
= 26 W. Assuming T
diss
= 70 °C and T
amb
= 150 °C as boundary conditions, the
CHIP
14/18
TDA7850Package information
5 Package information
In order to meet environmental requirements, ST (also) offers these devices in ECOPACK®
packages. ECOPACK
®
packages are lead-free. The category of second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 21. Flexiwatt25 (vertical) mechanical data and package dimensions
Updated the values for the dVOS and Iq1 parameters on the Ta bl e 4 .
Added Figure 20 on page 13.
Updated Figure 2: Standard test and application circuit.
Updated Section 4.4: DC offset detector and Section 4.3: Standby
and muting.
Updated the values of V
Modified max. values of the THD distortion in Table 4: Electrical
characteristics on page 8.
and THD parameters on the Ta bl e 4 .
OS
17/18
TDA7850
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