ST TDA7293 User Manual

120-volt, 100-watt, DMOS audio amplifier

(**)

Features

 Multipower BCD technology

 Very high operating voltage range (±50 V)

 DMOS power stage

 High output power (100 W into 8 Ω

@ THD =10%, with V

 Muting and stand-by functions

 No switch on/off noise

 Very low distortion

 Very low noise

 Short-circuit protected (with no input signal

applied)

 Thermal shutdown

 Clip detector

 Modularity (several devices can easily be

connected in parallel to drive very low
impedances)

= ±40 V)

S

TDA7293

with mute and standby

Multiwatt15V

class AB amplifier in Hi-Fi field applications, such
as home stereo, self powered loudspeakers and
Topclass TV. Thanks to the wide voltage range
and to the high output current capability it is able
to supply the highest power into both 4-Ω and 8-Ω
loads.

The built-in muting function with turn-on delay
simplifies the remote operation avoiding on-off
switching noises.

Parallel mode is possible by connecting several
devices and using pin11. High output power can
be delivered to very low impedance loads, so
optimizing the thermal dissipation of the system

Table 1. Device summary

Multiwatt15H

Description

The TDA7293 is a monolithic integrated circuit in
Multiwatt15 package, intended for use as audio

Order code Package

TDA7293V Multiwatt15V

TDA7293HS Multiwatt15H

Figure 1. TDA7293 block diagram

C7 100nF C6 1000µF

VMUTE

VSTBY

R3 22K

C2

R2

22µF

680Ω

IN- 2

C1 470nF

IN+

3

R1 22K

R5 10K

R4 22K

C3 10µF C4 10µF

(*) see Application note

4

SGND

(**)

10

MUTE

STBY

9

for SLAVE function

MUTE

STBY

1

STBY-GND

BUFFER DRIVER

713

-

+

THERMAL

SHUTDOWN

-Vs -PWVs

C9 100nF C8 1000µF

September 2010 Doc ID 6744 Rev 8 1/21

+Vs

PROTECTION

158

-Vs

+PWVs+Vs

OUT

14

BOOT

12

LOADER

S/C

6

5

D97AU805A

C5

22µF

BOOTSTRAP

CLIP DET

(*)

VCLIP

www.st.com

11

21

Contents TDA7293

Contents

1 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Circuit description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 Output Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.3 Other Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.1 Applications suggestions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.2 High efficiency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.3 Bridge application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.4 Modular application (ref. figure 12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.5 Bootstrap capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.1 Vertically-mounted package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.2 Horizontally-mounted package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2/21 Doc ID 6744 Rev 8

TDA7293 Pin connections

1 Pin connections

Figure 2. Pin connections

TAB CONNECTED TO PIN 8

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

D97AU806

-VS (POWER)

OUT

(POWER)

+V

S

BOOTSTRAP LOADER

BUFFER DRIVER

MUTE

STAND-BY

(SIGNAL)

-V

S

(SIGNAL)

+V

S

BOOTSTRAP

CLIP AND SHORT CIRCUIT DETECTOR

SIGNAL GROUND

NON INVERTING INPUT

INVERTING INPUT

STAND-BY GND

Doc ID 6744 Rev 8 3/21

Electrical specifications TDA7293

2 Electrical specifications

2.1 Absolute maximum ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

V

S

V

1

V

2

V

- V

2

V

3

V

4

V

5

V

6

V

9

V

10

V

11

V

12

I

O

P

tot

T

op

, T

T

stg

V

S

V

1

V

ESD_HBM

Supply voltage (no signal) ±60 V

V

STANDBY

Input voltage (inverting) referred to -V

Maximum differential inputs ±30 V

3

Input voltage (non inverting) referred to -V

Signal GND voltage referred to -V

Clip detector voltage referred to -V

Bootstrap voltage referred to -V

Standby voltage referred to -V

GND voltage referred to -VS (pin 8) 90 V

S

S

S

S

S

S

90 V

90 V

90 V

120 V

120 V

120 V

Mute voltage referred to -VS 120 V

Buffer voltage referred to -VS 120 V

Bootstrap loader voltage referred to -VS 100 V

Output peak current 10 A

Power dissipation T

= 70°C 50 W

case

Operating ambient temperature range 0 to 70 °C

Storage and junction temperature 150 °C

j

Supply voltage (no signal) ±60 V

V

STANDBY

GND voltage referred to -VS (pin 8) 90 V

ESD maximum withstanding voltage range,
test condition CDF-AEC-Q100-002- ”Human body

±1500 V

model”

2.2 Thermal data

Table 3. Thermal data

Symbol Parameter Min Typ Max Unit

R

thj-case

4/21 Doc ID 6744 Rev 8

Thermal resistance junction to case - 1 1.5 °C/W

TDA7293 Electrical specifications

2.3 Electrical characteristics

The specifications given here were obtained with the conditions VS = ±40 V, RL = 8 Ω,
R

=50Ω, T

g

Table 4. Electrical characteristics

.

Symbol Parameter Test conditions Min Typ Max Unit

= 25 °C, f = 1 kHz unless otherwise specified.

amb

V

S

I

q

I

b Input bias current - - 0.3 1 µA

V

OS

I

OS

P

O

d Total harmonic distortion

I

SC

Supply range - ±12 - ±50 V

Quiescent current - - 50 100 mA

Input offset voltage - -10 - 10 mV

Input offset current - - - 0.2 µA

Continuous output power

(1)

Current limiter threshold V

d = 1%, R

= ±29 V

V

S

d = 10%, R

= ±29 V

V

S

= 5 W, f = 1 kHz - 0.005 - %

P

O

= 0.1 to 50 W,

P

O

f = 20 Hz to 15 kHz

≤ ±40 V - 6.5 - A

S

= 4 Ω,

L

= 4Ω,

L

75

90

80
80

100
100

-W

-W

--0.1%

SR Slew rate - 5 10 - V/µs

G

V

G

V

Open loop voltage gain - - 80 - dB

Closed loop voltage gain

(2)

- 293031dB

A = curve - 1 - µV

e

N

R

i

SVR Supply voltage rejection

Total input noise

f = 20 Hz to 20 kHz - 3 10 µV

Input resistance - 100 - - kΩ

f = 100 Hz,

= 0.5 V RMS

V

ripple

-75-dB

Device mutes - 150 - °C

T

S

Thermal protection

Device shuts down - 160 - °C

Standby function (ref. to to pin 1)

V

ST on

V

ST off

AT T

I

q st-by

st-by

Standby on threshold - - - 1.5 V

Standby off threshold - 3.5 - - V

Standby attenuation - 70 90 - dB

Quiescent current @ standby - - 0.5 1 mA

Mute function (ref. to pin 1)

V

Mon

V

Moff

AT T

mute

Mute on threshold - - - 1.5 V

Mute off threshold - 3.5 - - V

Mute attenuatIon - 60 80 - dB

Doc ID 6744 Rev 8 5/21

Electrical specifications TDA7293

Table 4. Electrical characteristics (continued)

Symbol Parameter Test conditions Min Typ Max Unit

Clip detector

Duty Duty cycle ( pin 5)

I

CLEAK

-P

d = 1%,
R

PULLUP

= 10 kΩ to 5 V

d = 10%,
R

= 10 kΩ to 5 V

PULLUP

= 50 W - - 3 µA

O

-10-%

30 40 50 %

Slave function pin 4 (ref. to pin 8)

V

Slave

V

Master

1. Tested with optimized applications board (see fig. 3)

2. G

Vmin

Slavethreshold - - - 1 V

Master threshold - 3 - - V

≥ 26dB

Note: Pin 11 only for modular connection. Max external load 1 MΩ / 10 pF, only for test purposes

Figure 3. Typical application PCB and component layout

6/21 Doc ID 6744 Rev 8

TDA7293 Circuit description

3 Circuit description

In consumer electronics, an increasing demand has arisen for very high power monolithic
audio amplifiers able to match, with a low cost, the performance obtained from the best
discrete designs.

The task of realizing this linear integrated circuit in conventional bipolar technology is made
extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe
operating area (SOA) of the power devices, and, as a consequence, the maximum
attainable output power, especially in presence of highly reactive loads.

Moreover, full exploitation of the SOA translates into a substantial increase in circuit and
layout complexity due to the need of sophisticated protection circuits.

To overcome these substantial drawbacks, the use of power MOS devices, which are
immune from secondary breakdown is highly desirable.

The device described has therefore been developed in a mixed bipolar-MOS high voltage
technology called BCDII 100/120.

3.1 Output Stage

The main design task in developping a power operational amplifier, independently of the
technology used, is that of realization of the output stage.

The solution shown as a principle shematic by Fig6 represents the DMOS unity - gain output
buffer of the TDA7293.

Figure 4. Schematic of a DMOS unity-gain buffer

This large-signal, high-power buffer must be capable of handling extremely high current and
voltage levels while maintaining acceptably low harmonic distortion and good behaviour
over frequency response; moreover, an accurate control of quiescent current is required.

A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above
requirements, allowing a simple and effective quiescent current setting. Proper biasing of
the power output transistors alone is however not enough to guarantee the absence of
crossover distortion.

Doc ID 6744 Rev 8 7/21