ST TDA7266P User Manual

1 FEATURES

V
F

Figure 1. Package

T
TECHNOLOGY BI20II
WIDE SUPPLY VOLTAGE RA NGE (3 .5 - 12V)
OUTPUT POWER:
V
= 8.5V
CC
SINGLE SUPPLY
MINIMUM EXTERNAL COMPONENTS:
= 8, VCC = 7.5V
L
= 8Ω,
L
– NO SVR CAPACITOR – NO BOOTSTRA P – NO BOUCHEROT CELLS – INTERNALLY FIXED GAIN
STAND-BY & MUTE FUNCTIONS
SHORT CIRCUIT PROTECTION
THERMAL OVERLOAD PR OTEC TION
TDA7266P
3+3W DUAL BRIDGE AMPLIFIER
PRODUCT PREVIEW
PowerSSO24 (Slug Down)
able 1. Order Codes
Part Number Package
TDA7266P PowerSSO24 (Slug Down)

2 DESCRIPTION

The TDA7266P is a dual bridge amplifier specially designed for LCD TV/Monitor, PC Motherboard, TV and Portable Audio applications.

Figure 2. Tes t an d A pp li cat io n D i agram

CC
+5V
ST-BY
MUTE
IN2
C3 0.22µF
R3 10K
C4
10µF
C5 0.22µF
R4 10K
C6
1µF
PW-GND
S-GND
8
14
11
17
10
1 24
Vref
187
+
-
-
+
+
-
-
+
5
6
20
19
C1
470µFC2100nF
OUT1+
OUT1-
OUT2+
OUT2-
D03AU1531A
C7
100n
July 2004
This is preliminary information on a new product foreseen to be developed. Details are subject to change without notice.
REV. 2
1/12
TDA7266P
D
P

Table 2. Absolute Maximum Ratings

Symbol Parameter Value Unit
Supply Voltage 20 V
s
Output Peak Current (internally limited) 1.5 A Operating Temperature 0 to 70 °C Storage and Junction Temperature -40 to 150 °C
T
T
stg, Tj
V
I
O
op

Figure 3. Pin Connection (Top view)

W GND
N.C. N.C. N.C.
OUT1+
OUT1-
+V
S
IN1
1 2 3 4 5 6 7 8
24 23 22 21 20 19 18 17
PW GN N.C. N.C. N.C. OUT2+ OUT2­+V
S
IN2
9
16 15MUTE
STBY
N.C.
11 12
14 13
D03AU1532
N.C.N.C. N.C.10 SGND N.C.

Table 3. Themal Data

Symbol Parameters Value Unit
R
th j-case
Thermal Resistance Junction to Case Typ. 1.5 °C/W
2/12
TDA7266P
Table 4.
(Refer to te st circuit; VCC = 7.5V, RL = 8Ω, f = 1KHz, T
Electrical Characteristcs
= 25°C unless otherwise specified)
amb
Symbol Parameter Test Condition Min. Typ. Max. Unit
V
V
P P
Supply Range 3.5 12 V
CC
Total Quiescent Current 40 mA
I
q
Output Offset Voltage 120 mV
OS
Output Power THD 10% 3 W
O
Output Music Power (*) 4 W
O
THD Total Harmonic Distortion PO = 1W 0.03 0.2 %
PO = 0.1W to 2W
1%
f = 100Hz to 15KHz
SVR Supply Voltage Rejection f = 100Hz, VR =0.5V 40 56 dB
CT Crosstalk 46 60 dB
A
MUTE
G
Mute Attenuation 60 80 dB
T
Thermal Threshold 150 °C
w
Closed Loop Voltage Gain 25 26 27 dB
V
G
VT
VT
I
ST-BY
(*) Measured on demoboard of figure 8 wi th gaussian noi se signal whi ch simulates M usic/Speec h programmes.
Voltage Gain Matching 0.5 dB
V
R
Input Resistance 25 30 K
i
Mute Threshold for VCC > 6.4V; Vo = -30dB 2.3 2.9 4.1 V
MUTE
< 6.4V; Vo = -30dB VCC/2-1VCC/2
for V
CC
St-by Threshold 0.8 1.3 1.8 V
ST-BY
St-by Current V6 = GND 100 µA
e
Total Output Voltage A Curve 150 µV
N
-0.75
VCC/2
-0.5
V
3/12
TDA7266P
F

3 APPLICATIVE SUG GESTIONS

3.1 STAND-BY AND MUTE FUNCTIONS

3.1.1 (A) Microprocessor Application

In order to avoid annoying "Pop-Noise" during Turn-On/Off transients, it is necessary to guarantee the right St­by and mute signals seque nce.It is quite simpl e to obtain this function using a microprocessor (Fig. 4 and 5).
At first St-by signal (f rom exponentially. The external RC network is intended to turn-on slowly the biasing circuits of the amplifier, this to avoid "POP" and "CLICK" on the outputs.
When this voltage reaches the St-by threshold level, the amplifier is switched-on and the external capacitors in series to the input terminals (C1, C3) start to charge.
It's necessary to mantain the mute signal low until the capacitors are fully charged, this to avoid that the device goes in play mode causing a loud "Pop Noise" on the speakers.
A delay of 100-200ms between St-by and mute signals is suitable for a proper operation.

Figure 4. Microprocessor Application

µ
P) goes high and the voltage across the St-by terminal (Pin 11) starts to increase
V
CC
µP
ST-BY
MUTE
IN1
R1 10K
IN2
R2 10K
PW-GND
C1 0.22µF
C2
10µF
C3 0.22µF
C4
1µF
S-GND
8
11
14
17
10
1 24
Vref
187
+
-
-
+
+
-
-
+
5
6
20
19
C5
470µFC6100n
OUT1+
OUT1-
OUT2+
OUT2-
D03AU1533
4/12
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