ST STW20NM50 User Manual

STW20NM50

STW20NM50

N-CHANNEL 500V - 0.20Ω - 20A TO-247

MDmesh™Power MOSFET

TYPE	VDSS	RDS(on)	ID
STW20NM50	500V	< 0.25Ω	20 A

nTYPICAL RDS(on) = 0.20Ω

nHIGH dv/dt AND AVALANCHE CAPABILITIES

n100% AVALANCHE TESTED

nLOW INPUT CAPACITANCE AND GATE CHARGE

nLOW GATE INPUT RESISTANCE

nTIGHT PROCESS CONTROL AND HIGH MANUFACTURING YIELDS

DESCRIPTION

The MDmesh™ is a new revolutionary MOSFET technology that associates the Multiple Drain process with the Company’s PowerMESH™ horizontal layout. The resulting product has an outstanding low on-resistance, impressively high dv/dt and excellent avalanche characteristics. The adoption of the Company’s proprietary strip technique yields overall dynamic performance that is significantly better than that of similar competition’s products.

APPLICATIONS

The MDmesh™ family is very suitable for increasing power density of high voltage converters allowing system miniaturization and higher efficiencies.

ABSOLUTE MAXIMUM RATINGS

3

2

1

TO-247

INTERNAL SCHEMATIC DIAGRAM

Symbol	Parameter	Value	Unit
VDS	Drain-source Voltage (VGS = 0)	500	V
VDGR	Drain-gate Voltage (RGS = 20 kΩ)	500	V
VGS	Gatesource Voltage	±30	V
ID	Drain Current (continuous) at TC = 25°C	20	A
ID	Drain Current (continuous) at TC = 100°C	12.6	A
IDM (l)	Drain Current (pulsed)	80	A
PTOT	Total Dissipation at TC = 25°C	214	W
	Derating Factor	1.44	W/°C
dv/dt (1)	Peak Diode Recovery voltage slope	15	V/ns
Tstg	Storage Temperature	–65 to 150	°C
Tj	Max. Operating Junction Temperature	150	°C

(•)Pulse width limited by safe operating area	(1) ISD ≤20A, di/dt ≤400A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

August 2002

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STW20NM50

THERMAL DATA

Rthj-case	Thermal Resistance Junction-case	Max	0.585	°C/W
Rthj-amb	Thermal Resistance Junction-ambient	Max	30	°C/W
Tl	Maximum Lead Temperature For Soldering Purpose		300	°C

AVALANCHE CHARACTERISTICS

Symbol	Parameter	Max Value	Unit
IAR	Avalanche Current, Repetitive or Not-Repetitive	10	A
	(pulse width limited by Tj max)
EAS	Single Pulse Avalanche Energy	650	mJ
	(starting Tj = 25 °C, I D = 5 A, VDD = 35 V)

ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)

OFF

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
V(BR)DSS	Drain-source	ID = 250 µA, VGS = 0	500			V
	Breakdown Voltage
IDSS	Zero Gate Voltage	VDS = Max Rating			1	µA
	Drain Current (VGS = 0)	VDS = Max Rating, TC = 125 °C			100	µA
IGSS	Gate-body Leakage	VGS = ±30V			±100	nA
	Current (VDS = 0)

ON (1)

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
VGS(th)	Gate Threshold Voltage	VDS = VGS, ID = 250µA	3	4	5	V
RDS(on)	Static Drain-source On	VGS = 10V, ID = 10A		0.20	0.25	Ω
	Resistance

DYNAMIC

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
gfs (1)	Forward Transconductance	VDS > ID(on) x RDS(on)max,		10		S
		ID = 10A
Ciss	Input Capacitance	VDS = 25V, f = 1 MHz, VGS = 0		1480		pF
Coss	Output Capacitance			285		pF
Crss	Reverse Transfer			34		pF
	Capacitance
Coss eq. (2)	Equivalent Output	VGS = 0V, VDS = 0V to 400V		130		pF
	Capacitance
RG	Gate Input Resistance	f=1 MHz Gate DC Bias = 0		1.6		Ω
		Test Signal Level = 20mV
		Open Drain

1.Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2.Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

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STW20NM50

ELECTRICAL CHARACTERISTICS (CONTINUED)

SWITCHING ON

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
td(on)	Turn-on Delay Time	VDD = 250V, ID = 10 A		24		ns
tr	Rise Time	RG = 4.7Ω VGS = 10 V		16		ns
		(see test circuit, Figure 3)
Qg	Total Gate Charge	VDD = 400 V, ID = 20 A,		40	56	nC
Qgs	Gate-Source Charge	VGS = 10 V		13		nC
Qgd	Gate-Drain Charge			19		nC

SWITCHING OFF

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
tr(Voff)	Off-voltage Rise Time	VDD = 400 V, ID = 20 A,		9		ns
tf	Fall Time	RG = 4.7Ω, VGS = 10 V		8.5		ns
		(see test circuit, Figure 5)
tc	Cross-over Time			23		ns

SOURCE DRAIN DIODE

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
ISD	Source-drain Current					20	A
ISDM (2)	Source-drain Current (pulsed)					80	A
VSD (1)	Forward On Voltage	ISD = 20	A, VGS = 0			1.5	V
trr	Reverse Recovery Time	ISD = 20	A, di/dt = 100 A/µs,		350		ns
Qrr	Reverse Recovery Charge	VDD = 100 V, Tj = 25°C			4.6		µC
Irrm	Reverse Recovery Current	(see test circuit, Figure 5)			26		A
trr	Reverse Recovery Time	ISD = 20	A, di/dt = 100 A/µs,		435		ns
Qrr	Reverse Recovery Charge	VDD = 100 V, Tj = 150°C			5.9		µC
Irrm	Reverse Recovery Current	(see test circuit, Figure 5)			27		A

Note: 1.

Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2.

Pulse width limited by safe operating area.

Safe Operating Area

Thermal Impedance

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