ST STV9432TA User Manual
STV9432TA
100MHz OSD FOR MONITOR
INCLUDING BEAM CURRENTS & VIDEO TIMING ANALYZER
• MULTIFUNCTION OSD FOR MONITOR
• INCLUDES FACILITIES FOR CUT-OFF VOLTAGES MONITORING:
- THREE 8 BITS ADC INPUTS
- ADC TRIGGER DURING RETRACE TIME OF A
PROGRAMMED LINE
• INCLUDES FACILITIES FOR SCREEN SIZE &
CENTERING AUTO SETUP
- HS, VS, VIDEO TIMING MEASUREMENTS
• 100MHz MAX. PIXEL CLOCK, AVAILABLE FOR
ANY LINE FREQUENCY BETWEEN 15 AND
140 kHz
• 12 x 18 CHARACTER ROM FONT INCLUDES:
- 240 MONOCOLO R CHARAC TER S
- 16 MULTICOLOR CHARACTERS
• CHARACTER FLASHING
• UP TO 1K CHARACTERS TEXT DISPLAY
• ULTRA HIGH FREQUENCY PLL FOR JITTERFREE DISPLAY
• FLEXIBLE DISPLAY:
- ANY CHARACTER WIDTH AND HEI GHT
- ANYWHERE IN THE SCREEN
• SINGLE BYTE CHARACTER CODES AND
COLOR LOOK-UP TABLE FOR EASY PROGRAMMING AND FAST ACCESS
• CHARACTER FLIP OPERATIONS
• WIDE DISPLAY WINDOW ALLOWS PATTERN
GENERATION FOR FACTORY ADJUSTMENTS
2
•I
C BUS MCU INTERFACE
DESCRIPTION
Connected to a host MCU via a serial I2C Bus, the
STV9432 TA is a multifunction s lav e peripheral dev ic e
integrating the following blocks:
- On-screen Display. It includes a MASK PROGRAMMABLE ROM that holds the CUSTOM
CHARACTER FONT, a 1Kbytes RAM that stores
the code strings of the different lines of text to be
displayed, and a set of registers to program character sizes and colors. A built-in digital PLL, oper-
ating at very high frequency, provides an accurate
display without visible jitter for a wide line frequency range from 15 to 140 kHz.
- Cut-off Monitoring Circuitry includes 3 x 8 bits
ADCs and a programmable ADC sampling trigger.
It gives the possibility to measure the three beam
currents, during the horizontal flyback, at a given
line in the frame, provided that the three ADC
inputs are connected to a beam current sensing
circuitry. The values are stored in three BEAM
CURRENT REGISTERS, and available for MCU
read.
- Video Timing Analyzer. Using the Horizontal Sync,
Vertical Sync, Horizontal Flyback, and "Video
Active" inputs, a set of counters provide the different timing measurements necessary to analyze
the current Video timing characteristics to make
the automatic set-up of screen size and centering.
The measurements are initialized on the same
programmable trigger line than in the above cut-off
monitoring circuitry
SDIP24 (Plastic Package)
ORDER CODE: STV9432TA
PIN CO NNECTIONS
24
1
2
3
SDA
4
SCL
5
HS
6
VS
HFLY
7
AV
8
DV
9
DD
10
DV
SS
11
XTI
12
XTO OV
23
2221RCI
20
19
18
17
16
15
14
13
TESTFILTER
ADCREFAGND
GCI
BCI
AV
OV
FBLK
BOUT
GOUT
ROUT
DD
DD
SS
Rev. 4.0
February 2000 1/24
This is preliminary information on a new product in development or undergoing evaluation. Details are subject to change without notice.
1
STV9432TA
1 - PIN DESCRIPTION
Pin Number Symbol Type Description
1 FILTER I/O PLL Filter
2 AGND Power Analog Ground
3 SDA I/O I
4 SCL I I
5 HS I Horizontal Sync Input
6 VS I Vertical Sync Input
7 HFLY I Horizontal Flyback Input
8 AV I Active Video Input
9 DV
10 DV
DD
SS
Power Digital +5V Power Supply
Power Digital Ground
11 XTI I Crystal Oscillator Input
12 XTO O Crystal Oscillator Output
13 OV
SS
Power Ground for the RGB Outputs
14 ROUT O Red Output
15 GOUT O Green Output
16 BOUT O Blue Output
17 FBLK O Fast Blanking Output
18 OV
19 AV
DD
DD
Power +5V Supply for the RGB Outputs
Power Analog +5V Power Supply
20 BCI I Blue Beam Current Input
21 GCI I Green Beam Current Input
22 RCI I Red Beam Current Input
23 ADCREF I/O ADC Reference Voltage Pin
24 TEST I/O Pin must be connected to ground
2
C Bus Serial Data
2
C Bus Serial Clock
2/24
2
2 - BLOCK DIAGRAM
TEST
FILTER
HFLY
ADCREF
AV
DV
RCI
GCI
BCI
STV9432TA
11
OSCILLATOR
24
1
7
6
VS
5
HS
8
AV
22
21
20
23
19
DD
9
DD
PLL
TIMINGS
ANALYZER
BEAM
CURRENT
MEASURE
3.3V
VOLTAGE REGULATOR
POWER-ON RESET
CONTROLLER
1k BYTES RAM
CHARACTER
DISPLAY
FONT ROM
2
C BUS
I
INTERFACE
STV9432TA
XTI
12
XTO
18
OV
DD
13
OV
SS
14
ROUT
15
GOUT
16
BOUT
17
FBLK
3
SDA
4
SCL
10
DV
SS
2
AGND
3 - ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
AV
DD
, DVDD, OV
V
IN
T
oper
T
stg
Supply Voltage -0.3, +6.0 V
DD
Input Voltage VSS - 0.3, VDD + 0.3 V
Operating Temperatu re 0, +70
Storage Temperature -40, +125
o
C
o
C
3/24
2
STV9432TA
4 - ELECTRIC AL CHARACTERI STICS
(V
= 5V, VSS = 0V, GND = 0V, TA = 0 to 70o, unless otherwise specified)
DD
Symbol Parameter Min. Typ. Max. Unit
SUPPLY
AV
, DVDD, OV
DD
+ DIDD + OI
AI
DD
INPUTS (SCL, SDA)
V
IL
V
IH
I
IL
INPUTS (HS, VS, AV, HFLY)
V
IL
V
IH
V
HYST
I
PU
HSIN Horizontal Synchro Input Range 15 140 kHz
OUTPUTS (SDA open drain)
V
OL
OUTPUTS (R, G, B, FBLK)
V
OL
V
OH
OSCILLATOR (XTI, XTO)
I
IL
I
IH
V
IL
V
IH
V
OL
V
OH
ADCREF
V
REF
POWER-ON RESE T
DV
DDTH
8 BITS ADC INPUTS (RCI GCI BCI)
V
IN
Z
IN
V
OFF
I
LEAK
ILE Integral Linearity Error (Note 2) -2 +2 LSB
DLE Differential Linearity Error (Note 2) -0.5 +0.5 LSB
Supply Voltage 4.75 5 5.25 V
DD
Analog and Digital Supply Current - - 150 mA
DD
Input Low Voltage 0.8 V
Input High Voltage 2.4 V
Input Leakage Current -1 +1 µA
Input Low Voltage 0.8 V
Input High Voltage HS, VS, AV
HFLY
2.4
3.6
V
Schmidt Trigger Hysteresis 0.4 V
Pull-up Source Current (V
= 0V) 100 µA
IN
Output Low Voltage (IOL = 3mA) 0 0.4 V
Output Low Voltage (IOL = 3mA) 0 0.4 V
Output High Voltage (IOH = 3mA) 0.8V
DD
VDDV
XTI Input Source Current (VIN = 0V) 3 15 µA
XTI Input Sink Current (VIN = VDD)3 15µA
XTI Input Low Voltage 1.4 V
XTI Input High Voltage 0.7V
DD
V
XTI Output Low Voltage (IOL = 3mA) 0 0.4 V
XTI Output High Voltage (IOH = 3mA) 0.8V
DD
VDDV
Output Voltage Reference 3.3 V
Supply Threshold Level 3.6 V
Input Voltage 0 V
ADCREF
Input Impedance 100 k
V
Ω
Input Offset Voltage 3 LSB
Input Leakage Current 0 50 µA
4/24
2
STV9432TA
5 - TIMINGS
Symbol Parameter Min. Typ. Max. Unit
OSCILLATOR
f
OSC
f
PXL
R, G, B, FBLK (C
t
R
t
F
t
SKEW
2
C INTERFACE: SDA AND SCL (see Figure 1)
I
f
SCL
t
BUF
t
HDS
t
SUP
t
LOW
t
HIGH
t
HDAT
t
SUDAT
t
F
t
R
ANALYZER (HS, HFLY, AV)
t
HLOW
t
HHIGH
Hs max Max Hs Frequency Hfly
ANALYZER (VS)
t
VLOW
t
VHIGH
Note 1: These par ame te rs are not tested on eac h unit . They are meas ure d duri ng our in tern al qual ifi catio n pro cedur e wh ich inc lu des char-
acterizat i on on batches co mming from cor ners of our processes and also temperature characterizat i on
Note 2 : The AD C measureme nt s are dependan t o n th e noi se. The test is done by correla tion in order to screen out margi nal devices.
Note 3 :
t
= 3t
HTIM
OSC
Clock Frequency 8 MHz
Pixel Frequency 100 MHz
= 30pF)
LOAD
Rise Time (see Note 1) 5 ns
Fall Time (see Note 1) 5 ns
Skew between R, G, B, FBLK 5 ns
SCL Clock Frequency 0 400 kHz
Time the bus must be free between 2 access 500 ns
Hold Time for Start Condition 500 ns
Set up Time for Stop Condition 500 ns
The Low Period of Clock 400 ns
The High Period of Clock 400 ns
Hold Time Data 0 ns
Set up Time Data 500 ns
Fall Time of SDA 20 ns
Rise Time of both SCL and SDA
Depend on the pull-up resistor and the load
capacitance
Low Pulse Width (see Note 3) 2 4091 t
High Pulse Width (see Note 3) 2 4091 t
Low Pulse Width 2 4091 Lines
High Pulse Width 2 4091 Line s
: 40.
HTIM
HTIM
Figure 1.
STOP START DATA
t
BUF
SDA
t
HDS
SCL
t
HIGH
t
SUDAT
t
HDAT
t
LOW
t
SUP
STOP
5/24
2
STV9432TA
6 - SERIAL INTERFACE
The 2-wires serial interface is an I2C interface. To be
connected to the I
address; the slave address of the STV9432TA is BA
(in hexadecimal).
A6 A5 A4 A3 A2 A1 A0 RW
1011101
2
C bus, a devic e mu st o wn its slave
- The two bytes of the internal address where the
MCU wants to write data(s),
- The successive bytes of data(s).
All bytes are sent MSB bit first and the write data
transfer is ended with a stop.
6.2 - DATA TRANSFER IN READ MODE
6.1 - DATA TRANSFER IN WRITE MODE
The host MCU can write data into the STV9432TA
registers or RAM.
To write data into the STVA9432TA after a start, the
MCU must send (Figure 2):
- First, the I
2
C address slave byte with a l ow le vel for
the R/W bit,
Figure 2. I2C Write Operation
SCL
SDA
SCL
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
SDA
Figure 3. I
SCL
SDA
Start
I2C Slave Address
2
C Read Operation
I2C Slave Address
R/W
A7 A6 A5 A4 A3 A2 A1 A0 - - A13 A12 A11 A10 A9 A8
ACK LSB Address ACK MSB Address ACKStart
ACK ACKData Byte 1 Data Byte 2 ACK Data Byte n Stop
R/W
A7 A6 A5 A4 A3 A2 A1
ACK
The host MCU can read data from the STV9432TA
registers, RAM or ROM.
To read data from the STV9432TA (Figure 3), the
MCU must send 2 different I
one includes the I
2
C slave address byte with R/W bit
2
C sequences. The first
at low level and the 2 internal address bytes.
The second one includes the I
2
C slave address byte
with R/W bit at high level and all the successive data
bytes read at successive addresses starting from the
initial address given by the first sequence.
A0
--
A13 A12
A10
A10A9A8
LSB Address ACK
MSB Address
ACK
Stop
6/24
2
SCL
SDA
Start
I2C Slave Address
D7 D6 D5 D4 D3 D2 D1 D0
R/W
*
ACK
Data Byte 1
D7 D6 D5 D4 D3 D2 D1 D0
ACK
Data Byte n
ACK
Stop
6.3 - ADDRESSING SPACE
6.3.1 - General Mapping
STV9432TA registers, RAM and ROM are mapped in a 32K address space.
The mapping is:
STV9432TA
0000
03FF
0400
07FF
0800
3FFF
4000
403F
4040
7FFF
Important Notice:
1024 bytes RAM Descriptors and character codes
Empty Space
Character Generator ROM
Internal Registers
Empty Space
All 16 bits datas are mapped LSB byte at lower address and MSB byte at higher ad-
dress.
– Example: H1 12 bits register: @4000: 8 LSB bits - @4001: 4 MSB bits.
– Descriptors must also be written to RAM LSB byte first.
6.3.2 - I
2
C Registers Mapping
4000 H1 LSB 4022 Color 2
4001 H1 MSB 4023 Color 3
4002 H2 LSB 4024 Color 4
4003 H2 MSB 4025 Color 5
4004 H3 LSB 4026 Color 6
4005 H3 MSB 4027 Color 7
4006 H4 LSB 4028 Color 8
4007 H4 MSB 4029 Color 9
4008 H5 LSB 402A Color 10
4009 H5 MSB 402B Color 11
400A H6 LSB 402C Color 12
400B H6 MSB 402D Color 13
400C V1 LSB 402E Color 14
400D V1 MSB 402F Color 15
400E V2 LSB 4030 Line Duration
400F V2 MSB 4031 Top Margin
4010 V3 LSB 4032 Horizontal Delay
4011 V3 MSB 4033 Character Height
4012 RCI 4034 Display Control
4013 GCI 4035 Locking Time Constant
4014 BCI 4036 Capture Time Constant
4015 SBN 4037 Initial Pixel Period
4016 TIMG 4038-403E Reserved
4017-401F Reserved 403F RST
4020 Color 0 4040-7FFF Reser ved
4021 Color 1
7/24
STV9432TA
7 - TIMING ANALYZER
7.1 - Video Hori z ontal Timings
All horizontal timing measurements use a 106.7MHz clock. This clock is made from the internal oscillator:
f
= 40f
HTIM
They hold the value of the last measurement that was initiated by I2C command (see TIMG Register).
Figure 4.
: 3. These twelve bits read-only registers read time measurements, given in t
OSC
HTIM
units.
AV
HS
EE’
HFLY
AA’
L
F
B
K’K
L’
F’
H1 Register: H sync to Active video, min of C to A
4000 H1.7 H1.6 H1.5 H1.4 H1.3 H1.2 H1.1 H1.0
4001 - - - - H1.11 H1.10 H1.9 H1.8
H2 Register: Active video to H sync, min of B to C’
4002 H2.7 H2.6 H2.5 H2.4 H2.3 H2.2 H2.1 H2.0
4003 - - - - H2.11 H2.10 H2.9 H2.8
H3 Register: Line period, C to C’
4004 H3.7 H3.6 H3.5 H3.4 H3.3 H3.2 H3.1 H3.0
4005 - - - - H3.11 H3.10 H3.9 H3.8
H4 Register: H Fly to H sync, E to C
4006 H4.7 H4.6 H4.5 H4.4 H4.3 H4.2 H4.1 H4.0
4007 - - - - H4.11 H4.10 H4.9 H4.8
H5 Register: H sync to H Fly, C to E’
4008 H5.7 H5.6 H5.5 H5.4 H5.3 H5.2 H5.1 H5.0
4009 - - - - H5.11 H5.10 H5.9 H5.8
H6 Register: H fly pulse, E to F
400A H6.7 H6.6 H6.5 H6.4 H6.3 H6.2 H6.1 H6.0
400B - - - - H6.11 H6.10 H6.9 H6.8
7.2 - Video Ver t ical Ti m in gs
These twelve bits read-only registers read time measurements, given in number of scan lines. They hold the
value of the last measurement that was initiated by I
2
C command (see TIMG Register).
Figure 5.
8/24
AV
VS
AA’
B
K’K
L’L
3
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