ST STV6120 User Manual

STV6120

8PSK/QPSK low-power 3.3-V dual wide-band satellite tuner IC

Data brief

Features

■Four VLNA inputs

■On-chip 4:2 matrix

■Input frequency range 250 MHz to 2150 MHz

■Two independently programmable tuners

■RF to baseband direct conversion

■Single 3.3-V DC supply

■Fractional N synthesizers

■Extremely low phase noise, compliant with DVB-S2 requirements

■Flexible crystal frequency output to drive the demodulator IC

■Continuously variable gain: 0 to 65 dB

■Additional and programmable gain on baseband amplifier: 0 to 16 dB

■Programmable 5- to 36-MHz cut-off frequency (Butterworth 5th-order baseband filters)

■Low power consumption

■Compatible with 5- and 3.3-V I2C bus

Applications

■Direct broadcasting satellite (DBS) QPSK/8PSK demodulation

■Set-top box

Package

■VFQFPN-56 8 x 8 x 1 mm3 with exposed pad down (EPD) for heat dissipation

■ECOPACK®, environmentally friendly package

Description

The STV6120 satellite tuner is a quad-input dual direct-conversion (zero-IF) wideband satellite tuner intended for digital set-top boxes and similar applications.

			PLL1	DC offset compensation 1
			+dividers1
RFAin				QP1
				QN1
RFBin				IN1
	VLNA			IP1
RFCin	+
	Matrix 4:2
				QP2
				QN2
RFDin				IN2
				IP2
			PLL2	DC offset compensation 2
	AGC1	AGC2	+ dividers2
XTAL_IN				SCL
XTAL_INN		XTAL		I2C Bus Interface
XTAL_OUT		Amplifier		SDA
November 2011			Doc ID 022527 Rev 1	1/4
For further information contact your local STMicroelectronics sales office.				www.st.com

Introduction	STV6120

1 Introduction

The STV6120 dual tuner has four identical wideband RF inputs. The switch matrix 4:2 allows the selection of the appropriate RF input for each down-conversion path. After the matrix, there is a high-frequency low-pass filter followed by two down mixers. Each mixer, which down-converts the signal to baseband, is followed by a low-pass filter and amplifying stages. The baseband gain can be varied by programming a register through the I2C bus.

The local oscillator signals are provided by two integrated fractional-N PLLs. Each PLL contains an on-chip voltage controlled oscillator, which meets stringent phase noise requirements. The PLL loop filters are partially integrated. The local oscillator frequencies are programmable between 250 and 2150 MHz.

The comparison frequency for the phase-frequency detector is generated by dividing the crystal oscillator reference frequency. The crystal frequency will be in the range 16 MHz to 30 MHz depending on the application.

The design of the STV6120 has been carefully implemented to avoid the problems associated with having two tuners integrated on a single chip.

Features

Quad tuner inputs

4:2 switch matrix

Single flexible Xtal

Fine-grained power management

Wide input frequency range

Intrinsic performance

Fractional-N PLL

Benefits

Fits universal quad and Quattro LNB requirements or if fewer inputs are used, very high isolation

Low-cost, high-performance BoM integration allowing flexibility between legacy systems and SCR (unicable) systems

Wide choice of crystal frequencies with robust clock buffer to drive second tuners and demodulators allowing eBoM savings

Allows power savings and settings optimized for actual use conditions

Allows flexible and novel frequency planning and in some cases BoM cost optimization

Excellent compromise between linearity and noise figure allowing the most difficult signals to be extracted in the most congested and noisy conditions

Low phase noise for low packet error rate under extreme conditions (e.g., low symbol rates), fast locking

2/4	Doc ID 022527 Rev 1