The STTS75 is a high-precision CMOS (digital) temperature sensor IC with a delta-sigma
analog-to-digital (ADC) converter and an I
for general applications such as personal computers, system thermal management,
electronics equipment, and industrial controllers, and is packaged in the industry standard
8-lead MSOP(TSSOP) and SO8 packages.
The device contains a band gap temperature sensor and programmable 9- to 12-bit ADC
which monitor and digitize the temperature to a resolution up to 0.0625 °C. The STTS75 is
typically accurate to (±3 °C - max) over the full temperature measurement range of
–55 °C to 125 °C with ±2 °C accuracy in the –25 °C to +100 °C range. At power-up, the
STTS75 defaults to 9-bit resolution for software compatibility with the STLM75.
The STTS75 is specified for operating at supply voltages from 2.7 V to 5.5 V. Operating at
3.3 V, the supply current is typically (75 µA).
The onboard delta-sigma analog-to-digital converter (ADC) converts the measured
temperature to a digital value that is calibrated in °C; for Fahrenheit applications a lookup
table or conversion routine is required.
The STTS75 is factory-calibrated and requires no external components to measure
temperature.
1.1 Serial communications
The STTS75 has a simple 2-wire I2C-compatible digital serial interface which allows the
user to access the data in the temperature register at any time. It communicates via the
serial interface with a master controller which operates at speeds up to 400 kHz. Three pins
(A0, A1, and A2) are available for address selection, and enable the user to connect up to 8
devices on the same bus without address conflict.
2
C-compatible serial digital interface. It is targeted
In addition, the serial interface gives the user easy access to all STTS75 registers to
customize operation of the device.
1.2 Temperature sensor output
The STTS75 temperature sensor has a dedicated open drain overlimit signal/alert
(OS
/INT/Alert) output which features a thermal alarm function. This function provides a
user-programmable trip and turn-off temperature. It can operate in either of two selectable
modes:
●Section 2.3: Comparator mode, and
●Section 2.4: Interrupt mode.
At power-up the STTS75 comes up in 9-bit mode and immediately begins measuring the
temperature and converting the temperature to a digital value. The resolution of the digital
output data is user-configurable to 9, 10, 11, or 12 bits which correspond to temperature
increments of 0.5 °C, 0.25 °C, 0.125 °C, and 0.0625 °C, respectively.
6/41Doc ID 13298 Rev 11
STTS75Description
The measured temperature value is compared with a temperature limit (which is stored in
the 16-bit (T
the 16-bit (T
OS
/INT pin is activated (see Figure 3 on page 8).
) READ/WRITE register), and the hysteresis temperature (which is stored in
OS
) READ/WRITE register). If the measured value exceeds these limits, the
HYS
Figure 1.Logic diagram
V
DD
(1)
SDA
SCL
O.S./INT
1. SDA and OS/INT are open drain.
(1)
Note:See Pin descriptions on page 9 for details.
Table 1.Signal names
PinSymbol/nameType/directionDescription
DD
(1)
(1)
2
1
0
Input/outputSerial data input/output
OutputOverlimit signal/interrupt alert output
InputAddress2 input
InputAddress1 input
InputAddress0 input
Supply powerSupply voltage (2.7 V to 5.5 V)
1SDA
2SCLInputSerial clock input
3OS/INT
4GNDSupply groundGround
5A
6A
7A
8V
1. SDA and OS/INT are open drain.
STTS75
GND
A
0
A
1
A
2
AI11840
Note:See Pin descriptions on page 9 for details.
Doc ID 13298 Rev 117/41
DescriptionSTTS75
Figure 2.Connections (SO8, TSSOP8)
(1)
O.S./INT
1. SDA and OS/INT are open drain.
SDA
GND
SCL
(1)
1
2
3
4
V
8
7
6
5
DD
A
0
A
1
A
2
AI11841
Note:See Pin descriptions on page 9 for details.
Figure 3.Functional block diagram
Temperature
Sensor and
Analog-to-Digital
Converter (ADC)
Σ-Δ
V
DD
A
0
A
1
A
2
Configuration Register
Temperature Register
THYS Set Point Register
TOS Set Point Register
2-wire I2C Interface
Pointer Register
Control and Logic
Comparator
GND
O.S.
SDA
SCL
AI11833a
8/41Doc ID 13298 Rev 11
STTS75Description
1.3 Pin descriptions
See Figure 1 on page 7 and Table 1 on page 7 for a brief overview of the signals connected
to this device.
1.3.1 SDA (open drain)
This is the serial data input/output pin for the 2-wire serial communication port.
1.3.2 SCL
This is the serial clock input pin for the 2-wire serial communication port.
1.3.3 OS/INT (open drain)
This is the overlimit signal/interrupt alert output pin. It is open drain, so it needs a pull-up
resistor.
Note:The open drain thermostat output that indicates if the temperature has exceeded user-
programmable limits (over/under temperature indicator).
1.3.4 GND
Ground; it is the reference for the power supply. It must be connected to system ground.
1.3.5 A2, A1, A0
A2, A1, and A0 are selectable address pins for the 3LSBs of the I2C interface address. They
can be set to V
1.3.6 V
DD
This is the supply voltage pin and ranges from +2.7 V to +5.5 V.
or GND to provide 8 unique address selections.
DD
Doc ID 13298 Rev 119/41
OperationSTTS75
2 Operation
After each temperature measurement and analog-to-digital conversion, the STTS75 stores
the temperature as a 16-bit two’s complement number in the 2-byte temperature register.
The most significant bit (S, bit 15) indicates if the temperature is positive or negative:
●for positive numbers S = 0, and
●for negative numbers S = 1.
The most recently converted digital measurement can be read from the temperature register
at any time. Since temperature conversions are performed in the background, reading the
temperature register does not affect the operation in progress.
Bits 3 through 0 of the temperature register are hardwired to logic '0.' When the STTS75 is
configured for 12-bit resolution, the 12 MSBs (bits 15 through 4) of the temperature register
will contain temperature data. For 11-bit resolution, the 11 MSBs (bits 15 through 5) of the
temperature register will contain data, and bit 4 will read out as logic '0.' For 10-bit
resolution, the 10 MSBs (bits 15 through 6) will contain data, and for 9-bit resolution the
9 MSBs (bits 15 through 7) will contain data and all unused LSBs will contain '0s.'
Table 4 on page 15 gives examples of 12-bit resolution digital output data and the
corresponding temperatures. The data is compared to the values in the T
registers, and then the OS
operating mode. The number of T
/INT is updated based on the result of the comparison and the
OS
and T
bits used during the thermostat comparison
HYS
is equal to the conversion resolution set by the FT1 and FT0 bits in the configuration
register. For example, if the resolution is 9 bits, only the 9 MSBs of T
OS
used by the thermostat comparator. The alarm fault tolerance is controlled by the FTI and
FTO bits in the configuration register. They are used to set up a fault queue. This prevents
false tripping of the OS
/INT pin when the STTS75 is used in a noisy environment (see
Table 2 on page 14).
OS
and T
and T
HYS
HYS
will be
The STTS75 also supports a special one-shot mode feature that performs a single
temperature measurement and returns to shutdown mode. This is especially useful for lowpower applications. This features is accessed by first putting the device in shutdown mode,
then enabling the one-shot mode (OSM) bit in the configuration register.
The active state of the OS
/INT output can be changed via the polarity (POL) bit in the
configuration register. The power-up default is active-low.
If the user does not wish to use the thermostat capabilities of the STTS75, the OS
output should be left floating.
Note:If the thermostat is not used, the T
system data.
OS
and T
/INT
registers can be used for general storage of
HYS
10/41Doc ID 13298 Rev 11
STTS75Operation
2.1 Applications information
STTS75 digital temperature sensors are optimal for thermal management and thermal
protection applications. They require no external components for operations except for pullup resistors on SCL, SDA, and OS
The sensing device of STTS75 is the chip itself. The typical interface connection for this type
of digital sensor is shown in Figure 4 on page 11.
/INT outputs. A 0.1 µF bypass capacitor is recommended.
Pull-up
V
DD
10kΩ
1. SDA and OS/INT are open drain.
STTS75
O.S./INT
A
0
A
1
A
2
(1)
SDA
V
DD
SCL
(1)
GND
0.1μF
V
DD
Pull-up
V
10kΩ10kΩ
I2C Address = 1001000 (1001A2A1A0)
DD
Master
Device
AI11832
Doc ID 13298 Rev 1111/41
OperationSTTS75
2.2 Thermal alarm function
The STTS75 thermal alarm function provides user-programmable thermostat capability and
allows the STTS75 to function as a standalone thermostat without using the serial interface.
The OS
/INT output is the alarm output. This signal is an open drain output, and at power-up,
this pin is configured with active-low polarity by default.
2.3 Comparator mode
In comparator mode, each time a temperature-to-digital (T-to-D) temperature conversion
occurs, the new digital temperature is compared to the value stored in the T
registers. If a fault tolerance number of consecutive temperature measurements are greater
than the value stored in the T
register, the OS/INT output will be activated.
OS
For example, if the FT1 and FT0 bits are equal to “10” (fault tolerance = 4), four consecutive
temperature measurements must exceed T
OS
/INT output is active, it will remain active until the first time the measured temperature
drops below the temperature stored in the T
When the thermostat is in comparator mode, the OS
with any amount of hysteresis. The OS
temperature exceeds the T
value a consecutive number of times as defined by the FT1
OS
/INT output becomes active when the measured
and FT0 fault tolerance (FT) bits in the configuration register. The OS
when the temperature falls below the value stored in T
to activate the OS/INT output. Once the
OS
register.
HYS
/INT can be programmed to operate
/INT then stays active
register for a consecutive number
HYS
of times as defined by the fault tolerance bits (FT1 and FT0). Putting the device into
shutdown mode does not clear OS
/INT in comparator mode.
OS
and T
HYS
12/41Doc ID 13298 Rev 11
STTS75Operation
2.4 Interrupt mode
In Interrupt mode, the OS/INT output first becomes active when the measured temperature
exceeds the T
configuration register. Once activated, the OS
STTS75 into shutdown mode or by reading from any register (temperature, configuration,
T
, or T
OS
HYS
reactivated when the measured temperature falls below the T
number of times equal to the FT value. Figure 5 illustrates typical OS
response for STTS75 configured to have a fault tolerance of 2. The interrupt/clear process is
cyclical between T
value a consecutive number of times equal to the FT value in the
OS
/INT can only be cleared by either putting the
) on the device. Once the OS/INT has been deactivated, it will only be
value a consecutive
HYS
output temperature
OS
and T
HYS
.
Figure 5.OS
output temperature response diagram
T
OS
Temperature
T
HYS
Inactive
OS Output - Comparator mode
Active
Inactive
OS Output - Interrupt mode
Active
(1)(1)
(1)
Conversions
1. This assumes that a READ has occurred.
Note:The STTS75 is configured to have a fault tolerance of 2 in this example.
AI12224b
Doc ID 13298 Rev 1113/41
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