ST STSR30 User Manual
■ SUPPLY VOLTAGE RANGE: 4V TO 5.5V
■ TYPICAL PEAK O UTPUT CURRENT:
(SOURCE-SINK: 1.5A)
■ OPERATING FREQUENCY: 20 TO 500 KHz
■ INHIBIT BLANKING TIME: 700 ns
■ AUTOMATIC TURN OFF FOR DUTY-CYCLE
LESS THAN 14%
■ POSSIBILITY TO OPERATE IN
DISCONTINUOUS MODE
STSR30
SYNCHRONOUS RECTIFIER
SMART DRIVER FO R FLYBACK
SO-8
DESCRIPTION
STSR30 Smart Driver IC provides a high c urrent
outputs to properly drive secondary Power
Mosfets used as Synchronous Rectifier in low
output voltage, high efficiency Flyback
Converters. From a synchronizing clock inp ut,
withdrawn on the secondary side of the isolation
transformer, the IC generates a driving s ignal with
set dead times with respect to t he primary side
PWM signal.
The IC operation prevents sec ondary side
shoot-through conditions at turn-on of the primary
BLOCK DIAGRAM
switch providing anticipation in turn-off the output.
This smart function is implemented by a fast
cycle-after-cycle logic control mechanism, based
on a high freq uenc y oscillator synchronized by the
clock signal. This anticipation is externally set
through external component. A special Inhibit
function, detec ting the voltage across the
Synchronous FET, allows to shut-off the drive
output during discontinuous mode condition. A
Disable pin allows turning off the device during
no-load condition reducing overall current
consumption.
1/10January 2004
STSR30
ABSOLUTE MAXIMUM RATINGS (Note 1)
Symbol Parameter Value Unit
V
OUT
DISABLE
INHIBIT
CK Clock Input Voltage Range (*) -0.3 to V
ESD Human Body Model ±2KV
P
TOT
T
STG
T
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
(*) A higher positive voltage level can be applied to the pin with a resistor which limits the current flowing into the pin to 10mA maximum
THERMAL DATA
Symbol Parameter SO-8 Unit
R
thj-case
R
thj-amb
(*) This value is referred to one layer pcb board with minimum copper connections for the leads. A minimum value of 120 °C/W can be
obtained improving thermal conductivity of the board
DC Input Voltage to SGLGND
CC
Max Gate Drive Output Voltage -0.3 to V
GATE
Max DISABLE Voltage -0.3 to V
Max INHIBIT Voltage (*) -0.6 to V
-0.3 to 6 V
CC
CC
CC
CC
Continuous Power Dissipation at TA=105°C SO-8 (No heatsink) 275 mW
Storage Temperature Range
Operating Junction Temperature Range -40 to +125 °C
OP
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient (*)
-40 to +150 °C
40 °C/W
160 (*) °C/W
V
V
V
V
ORDERING CODES
TYPE SO-8 SO-8 (T&R)
STSR30 STSR30D STSR30D-TR
CONNECTION DIAGRAM (top view)
2/10
PIN DESCRIPTION
Pin N° Symbol Name and Function
1 INHIBIT This input enables OUT
threshold voltage (V
INHIBIT<VH
minimum conduction time (t
possible to turn off the synchronous MOSFET when the current through it tends to
reverse, allowing discontinuous conduction mode and providing protection to the
converter from eventual sinking current from the load.
A blanking time of 700ns allows operation when some voltage ringing is present
during turn-off of primary switch.
Absolute maximum voltage rating of the pin can be exceeded limiting the current
flowing into the pin to 10mA max.
2OUT
GATE
Gate Drive signal for Synchronous MOSFET. Anticipation [t
OUT
is provided when the clock input goes to low level.
GATE
3 SGLGND Reference for all the control logic signals. This pin is completely separated from
the PWRGND to prevent eventual disturbances to affect the control logic.
4 PWRGND Reference for power signals, this pin carries the full peak currents for the output.
5V
CC
The supply voltage range from 4.5V to 5.5V allows applications with logic gate
threshold mosfets. UVLO feature guarantees proper start-up while it avoids
undesirable driving during eventual dropping of the supply voltage.
6 DISABLE This pin allows turning off the device completely when kept to low level. In this
condition the IC power consumption is strongly reduced. When this pin goes to
high value, OUT
GATE
7 SETANT The voltage on this pin sets the anticipation in turning off the OUTGATE. It is
possible to choose among three different anticipation times by discrete
partitioning of the supply voltage [ANT].
8 CK This input provides synchronization for IC’s operations, being the transitions
between the two output conditions based on a positive threshold, equal for the
two slopes. A smart internal control logic mechanism using a 15MHz internal
oscillator generates proper anticipation timing at the turn-off of each output. This
feature allows safe turn-off of Synchronous Rectifiers avoiding any eventual
shoot-through situation on secondary side at both transitions. Clock revelation
mechanism makes the operation of STSR30 particularly suitable for flyback
adaptors application allowing correct operation during discontinuous mode.
Absolute maximum positive voltage rating of the pin can be exceeded limiting the
current flowing into the pin to 10mA max.
to work when its voltage is lower than the negative
GATE
). If V
INHIBIT>VH
ON(GATE)
). In typical flyback converter application, it is
turns to switching again according to the CK signal.
the OUT
will be high for a
GATE
] in turning off
ANT
STSR30
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