N-CHANNEL 600V - 7.2 Ω - 1.4A T O-220/TO- 220FP/ TO-92/IP AK
Zener-Protected SuperMESH™ MOSFET
Table 1: General Features
TYPEV
STF2NK60Z
STQ2NK60ZR-AP
STP2NK60Z
STD2NK60Z-1
■ TYPICAL R
■ EXTREMELY HIGH dv /d t CAPABILITY
■ ESD IMPROVED CAPABILITY
■ 100% AVALANCHE TESTED
■ NEW HIGH VOLTAGE BENCHMARK
■ GATE CHARGE MINIMIZED
DS
DSSRDS(on)ID
600 V
600 V
600 V
600 V
(on) = 7.2 Ω
< 8 Ω
< 8 Ω
< 8 Ω
< 8 Ω
1.4 A
0.4 A
1.4 A
1.4 A
Pw
20
3 W
45 W
45 W
DESCRIPTION
The SuperMESH™ series is obtained through an
extreme optimization of ST’s well established
strip-based PowerMESH™ layout. In addition to
pushing on-resistance significantly down, special
care is taken to ensure a very good dv/dt capability
for the most demanding applications. Such series
complements ST full range of high voltage MOSFET s including revolutionary MDmesh™ products.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage± 30V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
()
Drain Current (pulsed)5.61.65.6 (*)A
Total Dissipation at TC = 25°C
1.40.41.4 (*)A
0.770.250.77 (*)A
45320W
Derating Factor0.360.0250.16W/°C
V
ESD(G-S)
V
ISO
Gate source ESD (HBM-C= 100pF, R=1.5kΩ)1500V
Insulation Withstand Voltage (DC)2500V
dv/dt (1)Peak Diode Recovery voltage slope4.5V/ns
T
j
T
stg
() Pulse wi dt h l i m i ted by safe operating area
≤ 1.4A, di/dt ≤ 200A/µs, VDD ≤ V
(1) I
SD
(*) Limit ed only by maxi m um temperature allowed
Operating Junction Temperature
Storage Temperature
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID = IAR, VDD = 50 V)
j
1.4A
90mJ
Table 6: Gate-Source Zener Diode
SymbolParameterTest ConditionsMin.Typ.Max.Unit
BV
GSO
Gate source
Igs= ± 1 mA (Open Drain)30V
Breakdown Voltage
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have sp ecifically been desig ned to enhance not only the dev ice’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an ef ficient and
cost-effective intervention to prot ect the device’s integrity. Thes e integrate d Z ener diodes thus avoid t he
usage of external components.
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These
packages have a Lead-free second level interconnect . The category of second level interconnect is
marked on the package and on the inner box label, i n compliance with JEDEC Standard JESD97. The
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an
ST trademark. ECOPACK specifications are available at: www.st.com
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