ST STQ2HNK60ZR-AP, STF2HNK60Z, STD2HNK60Z-1 User Manual

STD2HNK60Z-1

STQ2HNK60ZR-AP STF2HNK60Z - STD2HNK60Z-1

N-CHANNEL 600V - 4.4Ω - 2.0A TO-92/TO-220FP/IPAK Zener-Protected SuperMESH™ MOSFET

TYPE	VDSS	RDS(on)	ID	PW
STQ2HNK60ZR-AP	600 V	< 4.8 Ω	0.5 A	3 W
STD2HNK60Z-1	600 V	< 4.8 Ω	2.0 A	45 W
STF2HNK60Z	600 V	< 4.8 Ω	2.0 A	20 W

TYPICAL RDS(on) = 4.4Ω

EXTREMELY HIGH dv/dt CAPABILITY

ESD IMPROVED CAPABILITY

100% AVALANCHE TESTED

NEW HIGH VOLTAGE BENCHMARK

GATE CHARGE MINIMIZED

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established stripbased PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.

APPLICATIONS

AC ADAPTORS AND BATTERY CHARGERS

SWITH MODE POWER SUPPLIES (SMPS)

ORDER CODES

3

	2
	1
TO-92 (Ammopack)	TO-220FP

3

2

1

IPAK

INTERNAL SCHEMATIC DIAGRAM

PART NUMBER	MARKING	PACKAGE	PACKAGING
STD2HNK60Z-1	D2HNK60Z	IPAK	TUBE
STQ2HNK60ZR-AP	Q2HNK60ZR	TO-92	AMMOPAK
STF2HNK60Z	F2HNK60Z	TO-220FP	TUBE

April 2004

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ABSOLUTE MAXIMUM RATINGS

Symbol	Parameter		Value		Unit
		IPAK	TO-220FP	TO-92
VDS	Drain-source Voltage (VGS = 0)		600		V
VDGR	Drain-gate Voltage (RGS = 20 kΩ )		600		V
VGS	Gatesource Voltage		± 30		V
ID	Drain Current (continuous) at TC = 25°C	2.0	2.0 (*)	0.5	A
ID	Drain Current (continuous) at TC = 100°C	1.26	1.26 (*)	0.32	A
IDM ( )	Drain Current (pulsed)	8	8 (*)	2	A
PTOT	Total Dissipation at TC = 25°C	45	20	3	W
	Derating Factor	0.36	0.16	0.025	W/°C
VESD(G-S)	Gate source ESD(HBM-C=100pF, R=1.5KΩ)		2000		V
dv/dt (1)	Peak Diode Recovery voltage slope		4.5		V/ns
VISO	Insulation Withstand Voltage (DC)	--	2500	--	V
Tj	Operating Junction Temperature		-55 to 150		°C
Tstg	Storage Temperature

( ) Pulse width limited by safe operating area

(1) ISD ≤ 2 A, di/dt ≤ 200 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

(*) Current Limited by package

THERMAL DATA

		IPAK	TO-220FP	TO-92
Rthj-case	Thermal Resistance Junction-case Max	2.77	6.25	--	°C/W
Rthj-amb	Thermal Resistance Junction-ambient Max	100	62.5	120	°C/W
Rthj-lead	Thermal Resistance Junction-lead Max	--	--	40	°C/W
Tl	Maximum Lead Temperature For Soldering	300	300	260	°C
	Purpose

AVALANCHE CHARACTERISTICS

Symbol	Parameter	Max Value	Unit
IAR	Avalanche Current, Repetitive or Not-Repetitive	2	A
	(pulse width limited by Tj max)
EAS	Single Pulse Avalanche Energy	120	mJ
	(starting Tj = 25 °C, ID = IAR, VDD = 50 V)

GATE-SOURCE ZENER DIODE

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
BVGSO	Gate-Source Breakdown	Igs=± 1mA (Open Drain)	30			V
	Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES

The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.

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ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED) ON/OFF

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
V(BR)DSS	Drain-source	ID = 1 mA, VGS = 0	600			V
	Breakdown Voltage
IDSS	Zero Gate Voltage	VDS = Max Rating			1	µA
	Drain Current (VGS = 0)	VDS = Max Rating, TC = 125 °C			50	µA
IGSS	Gate-body Leakage	VGS = ± 20V			±10	µA
	Current (VDS = 0)
VGS(th)	Gate Threshold Voltage	VDS = VGS, ID = 50 µA	3	3.75	4.5	V
RDS(on)	Static Drain-source On	VGS = 10V, ID = 1.0 A		4.4	4.8	Ω
	Resistance

DYNAMIC

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
gfs (1)	Forward Transconductance	VDS = 15 V, ID = 1.0 A		1.5		S
Ciss	Input Capacitance	VDS = 25V, f = 1 MHz, VGS = 0		280		pF
Coss	Output Capacitance			38		pF
Crss	Reverse Transfer			7		pF
	Capacitance
Coss eq. (3)	Equivalent Output	VGS = 0V, VDS = 0V to 480V		30		pF
	Capacitance
td(on)	Turn-on Delay Time	VDD = 300 V, ID = 1.0 A		10		ns
tr	Rise Time	RG = 4.7Ω VGS = 10 V		30		ns
td(off)	Turn-off Delay Time	(Resistive Load see, Figure 3)		23		ns
tf	Fall Time			50		ns
Qg	Total Gate Charge	VDD = 480V, ID = 2.0 A,		11	15	nC
Qgs	Gate-Source Charge	VGS = 10V		2.25		nC
Qgd	Gate-Drain Charge			6		nC

SOURCE DRAIN DIODE

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
ISD	Source-drain Current				2.0	A
ISDM (2)	Source-drain Current (pulsed)				8.0	A
VSD (1)	Forward On Voltage	ISD = 2.0 A, VGS = 0			1.6	V
trr	Reverse Recovery Time	ISD = 2.0 A, di/dt = 100 A/µs		178		ns
Qrr	Reverse Recovery Charge	VDD = 20 V, Tj = 25°C		445		nC
IRRM	Reverse Recovery Current	(see test circuit, Figure 5)		5		A
trr	Reverse Recovery Time	ISD = 13 A, di/dt = 100 A/µs		200		ns
Qrr	Reverse Recovery Charge	VDD = 20 V, Tj = 150°C		500		nC
IRRM	Reverse Recovery Current	(see test circuit, Figure 5)		5		A

Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2.Pulse width limited by safe operating area.

3.Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

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Safe Operating Area for TO-92

Thermal Impedance for TO-92

Safe Operating Area for TO-220FP

Thermal Impedance for TO-220FP

Safe Operating Area for IPAK

Thermal Impedance for IPAK

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