dV/dtCritical rate of rise of reverse voltage10000V/µs
Ptot
--------------
1. condition to avoid thermal runaway for a diode on its own heatsink
dTj
Table 3.Thermal resistance
1
--------------------------
<
Rth j a–()
SymbolParameterValueUnit
R
th(j-c)
Table 4.Static electrical characteristics
Junction to case2.5°C/W
SymbolParameterTest ConditionsMin.Typ.Max.Unit
(1)
I
R
V
F
1. Pulse test: tp = 380 µs, δ < 2%
Reverse leakage current
(
1.)Forward voltage drop
Tj = 25 °C
Tj = 125 °C
Tj = 25 °C
Tj = 125 °C
Tj = 25 °C
Tj = 125 °C
VR = V
RRM
55115mA
IF = 5 A0.47
IF = 5 A0.310.35
IF = 10 A0.59
IF = 10 A0.410.50
350µA
V
2/7
STPS5L25Characteristics
Figure 1. Average forward power dissipation
versus average forward current
PF(av)(W)
2.5
2.0
1.5
δ = 0.05
δ = 0.1
δ = 0.2
δ = 0.5
δ = 1
1.0
T
0.5
tp
=tp/T
0.0
IF(av) (A)
0123456
δ
Figure 3.Normalized avalanche power
derating versus pulse duration
P(t)
ARM p
P(1µs)
ARM
1
0.1
0.01
t (µs)
0.001
0.10.011
p
101001000
Figure 2.Average forward current versus
ambient temperature (δ = 0.5)
IF(av)(A)
6
5
Rth(j-a)=Rth(j-c)
4
3
2
Rth(j-a)=70°C/W
T
1
tp
=tp/T
δ
0
0255075100125150
Tamb(°C)
Figure 4.Normalized avalanche power
derating versus junction
temperature
P(t)
ARM p
P(25°C)
ARM
1.2
1
0.8
0.6
0.4
0.2
0
0255075100125150
T (°C)
j
Figure 5.Non repetitive surge peak forward
current versus overload duration
(maximum values)
IM(A)
100
80
60
40
IM
20
0
1E-31E-21E-11E+0
δ=0.5
t
t(s)
Tc=25°C
Tc=75°C
Tc=100°C
Figure 6.Relative variation of thermal
impedance junction to case
versus pulse duration
Zth(j-c)/Rth(j-c)
1.0
0.8
δ = 0.1
δ = 0.5
δ = 0.2
Single pulse
tp(s)
δ
=tp/T
T
tp
0.6
0.4
0.2
0.0
1.0E-41.0E-31.0E-21.0E-11.0E+0
3/7
CharacteristicsSTPS5L25
Figure 7.Reverse leakage current versus
reverse voltage applied (typical
values)
IR(mA)
3E+2
1E+2
1E+1
Tj=150°C
Tj=125°C
1E+0
1E-1
Tj=25°C
1E-2
1E-3
0510152025
VR(V)
Figure 9.Forward voltage drop versus
forward current (maximum values)
IFM(A)
100.0
Typical values
Tj=150°C
10.0
1.0
Tj=125°C
Tj=25°C
Figure 8.Junction capacitance versus
reverse voltage applied (typical
values)
C(pF)
2000
F=1MHz
Tj=25°C
1000
500
200
VR(V)
100
125102030
Figure 10. Thermal resistance junction to
ambient versus copper surface
under tab (Epoxy printed circuit
board FR4, copper thickness:
35 µm)
Rth(j-a) (°C/W)
100
80
60
40
20
0.1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
4/7
VFM(V)
0
0 2 4 6 8 101214161820
S(Cu) (cm²)
STPS5L25Package Information
2 Package Information
●Epoxy meets UL94, V0
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at www.st.com.
Figure 11. DPAK dimensions
Dimensions
®
Ref
A2.202.400.0860.094
E
B2
L2
A
C2
A10.901.100.0350.043
A20.0030.230.0010.009
B0.640.900.0250.035
H
L4
B
G
R
A1
D
R
C
B25.205.400.2040.212
C0.450.600.0170.023
C20.480.600.0180.023
D6.006.200.2360.244
E6.406.600.2510.259
0.60 MIN.
A2
G4.404.600.1730.181
H9.3510.100.3680.397
V2
L20.80 typ.0.031 typ.
L40.601.000.0230.039
V20°8°0°8°
Figure 12. Foot print dimensions (in millimeters)
6.733
MillimetersInches
Min.Max.Min.Max.
1.6
6.7
2.3
2.3
1.6
5/7
Ordering informationSTPS5L25
3 Ordering information
Table 5.Ordering information
Order codeMarkingPackageWeightBase qtyDelivery mode
STPS5L25B-TRSTPS5L25BDPAK0.30 g2500Tape and reel
4 Revision history
Table 6.Document revision history
DateRevisionChanges
Jul-20035APrevious release.
15-Apr-20086Reformatted to current standards. Corrected order code in Ta b l e 5.
6/7
STPS5L25
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