ST STP16CPS05 User Manual

Low voltage 16-bit constant current LED sink driver

Features

■ Low voltage power supply down to 3 V

■ 16 constant current output channels

■ Adjustable output current through external

resistor

■ Serial data IN / parallel data OUT

■ Auto power-saving feature minimizes the

quiescent current if no active data is detected
on the latches

■ Can be driven by a 3.3 V microcontroller

■ Output current: 5-100 mA

■ Max clock frequency 30 MHz

■ ESD protection 2.5 kV HBM, 200 V MM

STP16CPS05

with auto power saving

QSOP-24

TSSOP24

SO-24

TSSOP24

(exposed pad)

Description

The STP16CPS05 is a monolithic, low voltage,
low current power 16-bit shift register designed for
LED panel displays. The STP16CPS05 contains a
16-bit serial-in, parallel-out shift register that
feeds a 16-bit, D-type storage register. In the
output stage, sixteen regulated current sources
provide from 5 mA to 100 mA constant current to
drive the LEDs.

The auto power shut-down and auto power-ON
feature allows the device to save power without
any external intervention.

Table 1. Device summary

Order codes Package Packaging

STP16CPS05MTR SO-24 1000 parts per reel

STP16CPS05TTR TSSOP24 2500 parts per reel

STP16CPS05XTTR TSSOP24 Exposed Pad 2500 parts per reel

The output current setup time is 40 ns (typ), thus
improving the system performance.

The LEDs' brightness can be controlled by using
an external resistor to adjust the STP16CPS05
output current.

The STP16CPS05 guarantees a 20 V output
driving capability, allowing users to connect more
LEDs in series. The high clock frequency,
30 MHz, makes the device suitable for high data
rate transmission. The 3.3 V voltage supply is
useful in applications that interface with a 3.3 V
microcontroller.

STP16CPS05PTR QSOP-24 2500 parts per reel

January 2010 Doc ID 12569 Rev 6 1/27

www.st.com

27

Contents STP16CPS05

Contents

1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

7 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

2/27 Doc ID 12569 Rev 6

STP16CPS05 Summary description

1 Summary description

Table 2. Typical current accuracy

Output voltage

Current accuracy

Output current

Between bits Between ICs

V

DD

Temperature

≥ 1.3 V ± 1.5 % ± 5 %

1.1 Pin connection and description

Figure 1. Pin connection

≥ 20 to 100 mA

3.3 V to 5 V 25 °C

Note: The exposed pad should be electrically connected to a metal land electrically isolated or

connected to GND

Table 3. Pin description

Pin N° Symbol Name and function

1 GND Ground terminal

2 SDI Serial data input terminal

3 CLK Clock input terminal

4 LE Latch input terminal

5-20 OUT 0-15 Output terminal

21 OE

22 SDO Serial data out terminal

23 R-EXT Input terminal of an external resistor for constant current programing

24 V

DD

Input terminal of output enable (active low)

Supply voltage terminal

Doc ID 12569 Rev 6 3/27

Electrical ratings STP16CPS05

2 Electrical ratings

2.1 Absolute maximum ratings

Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability.

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

V

DD

V

I

O

V

I

GND

f

CLK

T

1. Such absolute value is achieved according the thermal shutdown

Supply voltage 0 to 7 V

Output voltage -0.5 to 20 V

O

Output current 100 mA

Input voltage -0.4 to V

I

GND terminal current 1600 mA

Clock frequency 50 MHz

Junction temperature range

J

2.2 Thermal data

Table 5. Thermal data

Symbol Parameter Value Unit

T

T

R

OPR

STG

thJA

Operating temperature range -40 to +125 °C

Storage temperature range -55 to +150 °C

Thermal resistance junction

(1)

(1)

DD

-40 to+170 °C

SO-24 42.7 °C/W

TSSOP24 55 °C/W

(2)

TSSOP24

Exposed Pad

37.5 °C/W

QSOP-24 55 °C/W

V

1. According to jedec standard 51-7B

2. The exposed pad should be soldered directly to the PCB to realize the thermal benefits.

4/27 Doc ID 12569 Rev 6

STP16CPS05 Electrical ratings

2.3 Recommended operating conditions

Table 6. Recommended operating conditions at 25 °C

Symbol Parameter Test conditions Min Typ Max Unit

V

V

I

I

V

V

t

wLAT

t

wCLK

t

wEN

t

SETUP(D)

t

HOLD(D)

t

SETUP(L)

f

CLK

1. If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please
considered the timings carefully.

Supply voltage 3.0 5.5 V

DD

Output voltage 20 V

O

Output current OUTn 5 100 mA

I

O

Output current SERIAL-OUT +1 mA

OH

Output current SERIAL-OUT -1 mA

OL

Input voltage 0.7V

IH

Input voltage -0.3 0.3V

IL

LE pulse width

DD

10 ns

CLK pulse width 8 ns

OE pulse width 100 ns

VDD = 3.3 V to 5.0 V

Setup time for DATA 14 ns

Hold time for DATA 5 ns

Setup time for LATCH 15 ns

Clock frequency Cascade operation

(1)

V

DD

DD

30 MHz

V

V

Doc ID 12569 Rev 6 5/27

Electrical characteristics STP16CPS05

3 Electrical characteristics

Table 7. Electrical characteristics (V

specified)

Symbol Parameter Test conditions Min Typ Max Unit

= 3.3 V to 5 V, T = 25 °C, unless otherwise

DD

V

V

I

OH

V

V

I

OL1

OL2

I

OL3

ΔI

OL1

OL2

ΔI

OL3

R

SIN(up)

R

SIN(down)

I

DD(SH)

I

DD(OFF1)

Input voltage high level 0.7V

IH

Input voltage low level GND 0.3V

IL

DD

Output leakage current VOH = 20 V 10 μA

Output voltage

OL

(Serial-OUT)

Output voltage

OH

(Serial-OUT)

Output current

Output current error
between bit
(All Output ON)

= 1 mA 0.4 V

I

OL

= -1 mA VDD-0.4V V

I

OH

= 0.3 V, R

V

O

VO = 0.3 V, R

VO = 1.3 V, R

= 0.3 VR

V

O

VO = 0.3 VR

VO = 1.3 VR

= 3.9 kΩ 4.25 5 5.75

ext

= 970 Ω 19 20 21

ext

= 190 Ω 96 100 104

ext

= 3.9 kΩ ± 5 ± 8

EXT

= 970 Ω ± 1.5 ± 3

EXT

=190 Ω ± 1.2 ± 3

EXT

Pull-up resistor 150 300 600 kΩ

Pull-down resistor 100 200 400 kΩ

= 3.3 V 120 170 μA

V

Shut-down current
All Latched Data = L

DD

= 5 V 140 200 μA

V

DD

R

= 970

EXT

OUT 0 to 15 = OFF

5

V

DD

DD

Supply current (OFF)

I

DD(OFF2)

I

DD(ON1)

EXT

OUT 0 to 15 = OFF

R

= 970

EXT

OUT 0 to 15 = ON

12.5

5.5

R

= 240

Supply current (ON)

R

= 240

I

DD(ON2)

EXT

OUT 0 to 15 = ON

13

Thermal Thermal protection 170 °C

V

V

mAI

%ΔI

mA

6/27 Doc ID 12569 Rev 6

STP16CPS05 Electrical characteristics

Table 8. Switching characteristics (V

= 3.3 to 5 V, T = 25 °C)

DD

Symbol Parameter Test conditions Min Typ Max Unit

V

= 3.3 V 35 55

t

PLH1

t

PLH2

t

PLH3

t

Propagation delay time,
CLK-OUTn

Propagation delay time,
LE-OUTn, OE = L

Propagation delay time,
OE-OUTn, LE = H

Propagation delay time,

PLH

CLK-SDO

, LE = H, OE = L

Propagation delay time,

t

PHL1

t

PHL2

t

PHL3

t

CLK-OUTn, LE = H,

= L

OE

Propagation delay time,
LE-OUTn

Propagation delay time,
OE-OUTn, LE = H

Propagation delay time,

PHL

CLK-SDO

, OE = L

V

= V

IH

DD

VIL = GND CL = 10 pF

= 20 mA VL = 3.0 V

I

O

R

= 1 KΩ RL = 60 Ω

EXT

Output rise time

t

10~90 % of voltage

ON

waveform

Output fall time

t

90~10 % of voltage

OFF

waveform

CLK rise time

t

r

t

CLK fall time

f

1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully.

(1)

(1)

DD

= 5 V 17.5 26

V

DD

= 3.3 V 33.5 52

V

DD

= 5 V 17 20

V

DD

= 3.3 V 53.5 84.5

V

DD

= 5 V 28.5 40.5

V

DD

= 3.3 V 19 27.5

V

DD

= 5 V 13 18.5

V

DD

V

= 3.3 V 13 19

DD

= 5 V 8.5 12

V

DD

VDD = 3.3 V 10 14.5

= 5 V 6.5 9

V

DD

= 3.3 V 10.5 15

V

DD

= 5 V 7.5 10.5

V

DD

= 3.3 V 23 33

V

DD

= 5 V 15.5 21.5

V

DD

VDD = 3.3 V 23.5 31.5

= 5 V 9 10.5

V

DD

VDD = 3.3 V 4.6 5.5

= 5 V 3.5 5

V

DD

5000 ns

5000 ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

Doc ID 12569 Rev 6 7/27

Equivalent circuit and outputs STP16CPS05

4 Equivalent circuit and outputs

Figure 2. OE terminal

Figure 3. LE terminal

Figure 4. CLK, SDI terminal

8/27 Doc ID 12569 Rev 6

STP16CPS05 Equivalent circuit and outputs

Figure 5. SDO terminal

Figure 6. Block diagram

Doc ID 12569 Rev 6 9/27