ST STP16CPPS05 User Manual

STP16CPPS05

Low voltage 16-bit constant current LED sink driver with auto power-saving

Preliminary data

Features

Low voltage power supply down to 3 V

16 constant current output channels

Adjustable output current through external resistor

Serial data IN/parallel data OUT

Auto power-saving

3.3 V MCU-driving capability

Output current: 3 to 40 mA

30 MHz clock frequency

Available in high thermal efficiency TSSOP exposed pad

ESD protection: 2 kV HBM, 200 V MM

Description

The STP16CPPS05 is a monolithic, low voltage, low current power 16-bit shift register designed for LED panel displays. The device features a 16-bit serial-in, parallel-out shift register that feeds a 16-bit D-type storage register. In the output stage, sixteen regulated current sources are designed to provide 3 to 40 mA of constant current to drive the LEDs.

QSOP-24

SO-24

TSSOP24

TSSOP24

 

(exposed pad)

The STP16CPPS05 output current can be adjusted through an external resistor to control the light intensity of the LEDs.

LED brightness is adjustable from 0% to 100% via the OE pin.

The auto power-shutdown and auto power-ON feature allows the device to save power with no external intervention.

The STP16CPPS05 guarantees a 20 V output driving capability, allowing users to connect more LEDs in series. The high 30 MHz clock frequency makes the device suitable for high data rate transmission. The 3.3 V supply is well suited for applications which interface a 3.3 V MCU. Compared to a standard TSSOP package, the TSSOP with exposed pad increases heat dissipation capability by a factor of 2.5

Table 1.

Device summary

 

 

 

Order codes

Package

Packaging

 

 

 

 

 

STP16CPPS05MTR

SO-24

1000 parts per reel

 

 

 

 

 

STP16CPPS05TTR

TSSOP24

2500 parts per reel

 

 

 

STP16CPPS05XTTR

TSSOP24 exposed pad

2500 parts per reel

 

 

 

 

 

STP16CPPS05PTR

QSOP-24

2500 parts per reel

 

 

 

 

October 2009

Doc ID 16536 Rev 1

1/29

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to

www.st.com

change without notice.

 

 

Contents

STP16CPPS05

 

 

Contents

1

Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. 3

 

1.1

Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3

2

Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.1

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.2

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5

 

2.3

Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

6

3

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

7

4

Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

9

5

Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

11

6

Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

14

 

6.1

Auto power-saving . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

18

7

Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

20

8

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

28

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Doc ID 16536 Rev 1

STP16CPPS05

Summary description

 

 

1 Summary description

Table 2.

Typical current accuracy

 

 

 

Output voltage

Current accuracy

Output current

VDD

Temperature

 

 

Between bits

Between ICs

 

 

 

 

 

 

 

 

 

 

 

 

≥ 1.3 V

 

± 1%

± 2%

5 to 40 mA

3.3 V to 5 V

25 °C

 

 

 

 

 

 

 

1.1Pin connection and description

Figure 1. Pin connection

Note:

The exposed pad should be electrically connected to a metal land electrically isolated or

 

connected to ground.

Doc ID 16536 Rev 1

3/29

Summary description

 

 

 

 

 

 

STP16CPPS05

 

 

 

 

 

 

 

 

 

 

Table 3.

Pin description

 

 

 

 

 

 

 

Pin n°

 

 

Symbol

Name and function

 

 

 

 

 

 

 

1

 

 

GND

Ground terminal

 

 

 

 

 

 

 

2

 

 

SDI

Serial data input terminal

 

 

 

 

 

 

 

3

 

 

CLK

Clock input terminal

 

 

 

 

 

 

 

 

4

 

 

 

LE

Latch input terminal - detect mode 1 (see operation principle)

 

 

 

 

 

 

 

 

 

 

5-20

 

 

 

 

 

 

Output terminal

 

 

OUT 0-15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Input terminal of output enable (active low) - detect mode 1

 

21

 

 

 

OE

 

 

 

 

(see operation principle)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

22

 

 

SDO

Serial data out terminal

 

 

 

 

 

 

 

 

 

 

23

 

 

R-EXT

Input terminal for an external resistor for constant current

 

 

 

programming

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

24

 

 

VDD

Supply voltage terminal

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Doc ID 16536 Rev 1

STP16CPPS05

Electrical ratings

 

 

2 Electrical ratings

2.1Absolute maximum ratings

Stressing the device above the ratings listed in the “absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other condition above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Table 4.

Absolute maximum ratings

 

 

Symbol

Parameter

Value

Unit

 

 

 

 

VDD

Supply voltage

0 to 7

V

VO

Output voltage

-0.5 to 20

V

IO

Output current

50

mA

VI

Input voltage

-0.4 to VDD

V

IGND

GND terminal current

800

mA

fCLK

Clock frequency

50

MHz

T

Junction temperature range (1)

-40 to +170

°C

J

 

 

 

1. Such absolute value is based on the thermal shutdown protection.

2.2Thermal data

Table 5.

Thermal data

 

 

 

Symbol

Parameter

 

Value

Unit

 

 

 

 

 

TA

Operating free-air temperature range

 

-40 to +125

°C

TJ-OPR

Operating thermal junction temperature range

-40 to +150

°C

TSTG

Storage temperature range

 

-55 to +150

°C

 

 

 

SO-24

42.7

°C/W

 

 

 

 

 

 

 

Thermal resistance junction-

 

TSSOP24

55

°C/W

RthJA

 

 

 

 

 

TSSOP24(2)

 

 

ambient (1)

 

37.5

°C/W

 

 

 

Exposed Pad

 

 

 

 

 

 

 

 

 

 

 

 

 

 

QSOP-24

55

°C/W

 

 

 

 

 

 

1.According with JEDEC standard 51-7B

2.The exposed pad should be soldered directly to the PCB to obtain the thermal benefits.

Doc ID 16536 Rev 1

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Electrical ratings

STP16CPPS05

 

 

2.3Recommended operating conditions

Table 6.

Recommended operating conditions

 

 

 

 

Symbol

 

 

Parameter

Test conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

 

VDD

 

Supply voltage

 

3.0

 

5.5

V

VO

 

Output voltage

 

 

 

20

V

IO

 

Output current

OUTn

3

 

40

mA

IOH

 

Output current

SERIAL-OUT

 

 

+1

mA

IOL

 

Output current

SERIAL-OUT

 

 

-1

mA

VIH

 

Input voltage

 

0.7 VDD

 

VDD

V

VIL

 

Input voltage

 

-0.3

 

0.3 VDD

V

twLAT

 

LE pulse width

 

20

 

 

ns

twCLK

 

CLK pulse width

 

10

 

 

ns

twEN

 

 

pulse width

 

100

 

 

ns

OE

VDD = 3.0 V to 5.0 V

 

 

tSETUP(D)

 

Setup time for DATA

8

 

 

ns

 

 

 

 

tHOLD(D)

 

Hold time for DATA

 

5

 

 

ns

tSETUP(L)

 

Setup time for LATCH

 

8

 

 

ns

fCLK

 

Clock frequency

Cascade operation (1)

 

 

30

MHz

1.If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please consider the timings carefully.

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Doc ID 16536 Rev 1

STP16CPPS05

Electrical characteristics

 

 

3 Electrical characteristics

VDD = 3.3 V to 5 V, TA = 25 °C, unless otherwise specified.

 

 

 

 

Table 7.

Electrical characteristics

 

 

 

 

 

 

 

 

 

 

 

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

 

 

 

 

 

 

 

VIH

Input voltage high level

 

0.7 VDD

 

VDD

V

VIL

Input voltage low level

 

GND

 

0.3 VDD

V

IOH

Output leakage current

VOH = 20 V

 

 

1

μA

VOL

Output voltage

IOL = 1 mA

 

 

0.4

V

(serial-OUT)

 

 

VOH

Output voltage

IOH = -1 mA

VDD-0.4V

 

 

V

(serial-OUT)

 

 

IOL1

 

VO = 0.3 V, Rext = 4 kΩ

4.75

5

5.25

 

IOL2

Output current

VO = 0.3 V, Rext = 1 kΩ

19

20

21

mA

IOL3

 

VO = 1.3 V, Rext = 497 Ω

38

40

42

 

IOL1

 

VO = 0.3 V, IO = 5 mA

 

± 1

± 5

 

 

REXT = 4 kΩ

 

 

 

Output current error

 

 

 

 

IOL2

VO = 0.3 V, IO = 20 mA

 

± 0.5

± 3

%

between bit

 

REXT = 980 Ω

 

 

(All output ON)

 

 

 

 

IOL3

 

VO = 1.3 V, IO = 40 mA

 

± 0.5

± 3

 

 

REXT = 490 Ω

 

 

 

 

 

 

 

 

RSIN(up)

Pull-up resistor

 

150

300

600

RSIN(down)

Pull-down resistor

 

100

200

400

 

 

REXT = 1 kΩ,

 

 

 

 

IDD(OFF1)

 

IOUT = 20 mA,

 

5.4

7.5

 

 

Supply current (OFF)

OUT 0 to 15 = OFF

 

 

 

 

 

 

 

 

 

 

IDD(OFF2)

REXT = 497 Ω,

 

 

 

 

 

 

 

 

 

 

IOUT = 40 mA OUT 0 to

 

8.0

9.5

 

 

 

15 = OFF

 

 

 

mA

 

 

 

 

 

 

IDD(ON1)

 

REXT = 1 kΩ,

 

 

 

 

 

 

 

 

 

IOUT = 20 mA,

 

5.5

7.5

 

 

Supply current (ON)

OUT 0 to 15 = ON

 

 

 

 

 

 

 

 

 

 

IDD(ON2)

REXT = 497 Ω,

 

 

 

 

 

 

 

 

 

 

IOUT = 40 mA OUT 0 to

 

8.1

9.5

 

 

 

15 = ON

 

 

 

 

 

 

 

 

 

 

 

IDD(SH)

Shut-down current all

VDD = 3.3V

 

160

200

µA

 

 

 

 

 

latched data = L

VDD = 5V

 

190

240

µA

 

 

 

 

 

 

 

 

 

 

Thermal

Thermal protection

 

 

170

 

°C

 

 

 

 

 

 

 

Doc ID 16536 Rev 1

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Electrical characteristics

 

 

 

 

STP16CPPS05

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VDD = 3.3 V to 5 V, TA = 25 °C, unless otherwise specified.

 

 

 

 

Table 8.

 

 

Switching characteristics

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Symbol

 

 

 

 

 

Parameter

 

Test conditions

 

Min

Typ

Max

Unit

 

 

 

 

 

 

 

 

 

 

tPLH1

 

Propagation delay time,

 

 

VDD = 3.3 V

 

53.5

86.5

ns

 

CLK-

OUTn,

LE = H,

OE

= L

 

 

VDD = 5 V

 

32

46.5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Propagation delay time,

 

 

VDD = 3.3 V

 

48

75.5

 

tPLH2

 

LE-

OUTn,

 

 

 

 

 

 

 

 

ns

 

 

 

 

 

 

 

 

VDD = 5 V

 

30

43

 

 

OE

 

= L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPLH3

 

Propagation delay time,

 

 

VDD = 3.3 V

 

71.5

118

ns

 

OE

-

OUTn,

LE = H

 

 

VDD = 5 V

 

43

62

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPLH

 

Propagation delay time,

 

 

VDD = 3.3 V

15

21

31

ns

 

CLK-SDO

 

 

VDD = 5 V

11

15

21

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPHL1

 

Propagation delay time,

 

 

VDD = 3.3 V

 

27.5

39

 

 

CLK-

OUTn,

LE = H,

VIH = VDD

 

 

 

 

 

ns

 

 

VDD = 5 V

 

22

30.5

 

 

OE

= L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL = GND

CL = 10 pF

 

 

 

 

 

 

 

Propagation delay time,

VDD = 3.3 V

 

11.5

17.5

 

 

 

IO = 20 mA

VL = 3.0 V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPHL2

 

LE-OUTn,

 

 

 

ns

 

REXT = 1 KΩ

RL = 60 Ω

VDD = 5 V

 

8

11.5

 

 

OE

= L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Propagation delay time,

 

 

VDD = 3.3 V

 

24

33.5

 

tPHL3

 

OE

-

OUTn,

 

 

 

 

 

 

 

ns

 

 

 

 

 

 

 

VDD = 5 V

 

21

28.5

 

 

LE = H

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tPHL

 

Propagation delay time,

 

 

VDD = 3.3 V

17.5

24

36

ns

 

CLK-SDO

 

 

VDD = 5 V

12.5

17

25

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tON

 

Output rise time

 

 

VDD = 3.3 V

 

29

54

 

 

10~90% of voltage

 

 

 

 

 

 

ns

 

 

 

VDD = 5 V

 

10

17

 

 

waveform

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tOFF

 

Output fall time

 

 

VDD = 3.3 V

 

4.5

6

 

 

90~10% of voltage

 

 

 

 

 

 

ns

 

 

 

VDD = 5 V

 

3.5

5

 

 

waveform

 

 

 

 

 

 

 

 

 

 

 

 

 

 

t

 

CLK rise time (1)

 

 

 

 

 

5000

ns

r

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tf

 

CLK fall time (1)

 

 

 

 

 

5000

ns

1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully.

8/29

Doc ID 16536 Rev 1

ST STP16CPPS05 User Manual

STP16CPPS05

Equivalent circuit and outputs

 

 

4 Equivalent circuit and outputs

Figure 2. OE terminal

Figure 3. LE terminal

Figure 4. CLK, SDI terminal

Doc ID 16536 Rev 1

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