ST STP16CL596 User Manual

STP16CL596

LOW VOLTAGE 16-BIT CONSTANT CURRENT LED SINK DRIVER

■LOW VOLTAGE POWER SUPPLY DOWN TO 3V

■16 CONSTANT CURRENT OUTPUT CHANNELS

■ADJUSTABLE OUTPUT CURRENT THROUGH EXTERNAL RESISTOR

■SERIAL DATA IN/PARALLEL DATA OUT

■SERIAL OUT CHANGES STATE ON THE FALLING EDGES OF CLOCK

■3.3V MICRO DRIVER-ABLE

■OUTPUT CURRENT: 15-90 mA

■25 MHz CLOCK FREQ.

■AVAILABLE IN HIGH THERMAL EFFICIENCY TSSOP EXPOSED PAD

DESCRIPTION

The STP16CL596 is a monolithic, low voltage, low current power 16-bit shift register designed for LED panel displays. The STP16CL596 contains a 16-bit serial-in, parallel-out shift register that feeds a 16-bitD-type storage register. In the output stage, sixteen regulated current sources were designed to provide 15-90mA constant current to drive the LEDs.

Compared with the STPIC6C595, the device provides great flexibility and improved performance in LED panel system design.

Table 1: Order Codes

DIP-24

SO-24

TSSOP24	TSSOP24
	(exposed pad)

Trough an external resistor, users can adjust the STP16CL596 output current, controlling in this way the light intensity of LEDs.

The STP16CL596 guarantees a 16V output driving capability, allowing users to connect more LEDs in series. The high clock frequency, 25 MHz, also satisfies the system requirement of high volume data transmission. The 3.3V of voltage supply is well useful for applications that interface any micro from 3.3V. Compared with a standard TSSOP package, the TSSOP exposed pad increases heat dissipation capability by a 2.5 factor.

Part Number	Package	Comments
STP16CL596B1R	DIP-24	15 parts per tube
STP16CL596M	SO-24 (Tube)	40 parts per tube
STP16CL596MTR	SO-24 (Tape & Reel)	1000 parts per reel
STP16CL596TTR	TSSOP24 (Tape & Reel)	2500 parts per reel
STP16CL596XTTR	TSSOP24 Exposed-Pad (Tape & Reel)	2500 parts per reel

July 2005	Rev. 8
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STP16CL596

Table 2: Current Accuracy

Output Voltage		Current accuracy		Output Current
	Between bits		Between ICs
≥ 0.7V	± 3%		± 10%	15 to 90 mA

Figure 1: Pin Connection (Note 1)

Note 1: The exposed Pad is electrically not connected.

Table 3: Pin Description

PIN N°	Symbol	Name and Function
1	GND	Ground Terminal
2	SDI	Serial data input terminal
3	CLK	Clock input terminal
4	/LE	Latch input terminal
5-20	OUT 0-15	Output terminal
21	/OE	Input terminal of output enable (active low)
22	SDO	Serial data out terminal
23	R-EXT	Input terminal of an external resistor for constant current programing
24	VDD	Supply voltage terminal

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		STP16CL596
Table 4: Absolute Maximum Ratings
Symbol	Parameter	Value	Unit
VDD	Supply Voltage	0 to 7	V
VO	Output Voltage	-0.5 to 16	V
IO	Output Current	90	mA
VI	Input Voltage	-0.4 to VDD+0.4	V
IGND	GND Terminal Current	1440	mA
fCLK	Clock Frequency	25	MHz
TOPR	Operating Temperature Range	-40 to +125	°C
TSTG	Storage Temperature Range	-65 to +150	°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Under these conditions, functional operation is not implied.

Table 5: Thermal Data

	Symbol	Parameter	DIP-24	SO-24	TSSOP24	TSSOP24 (*)	Unit
						(exposed pad)
	Rthj-amb	Thermal Resistance Junction-ambient	60	75	85	37.5	°C/W

(*) The exposed pad should be soldered directly to the PCB to realize the thermal benefits.

Table 6: Recommended Operating Conditions

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
VDD	Supply Voltage		3.0	3.3	3.6	V
VO	Output Voltage				16.0	V
IO	Output Current	OUTn	5		90	mA
IOH	Output Current	SERIAL-OUT			+1	mA
IOL	Output Current	SERIAL-OUT			-1	mA
VIH	Input Voltage		0.7VDD		VDD+0.3	V
VIL	Input Voltage		-0.3		0.3VDD	V
twLAT	/LE Pulse Width	VDD = 3.0 to 3.6V	20			ns
twCLK	CLK Pulse Width		20			ns
twEN	/OE Pulse Width		400			ns
tSETUP(D)	Setup Time for DATA		20			ns
tHOLD(D)	Hold Time for DATA		15			ns
tSETUP(L)	Setup Time for LATCH		15			ns
fCLK	Clock Frequency	Cascade Operation			25	MHz

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Table 7: Electrical Characteristics (VDD=3V, T = 25°C, unless otherwise specified.)

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
VIH	Input Voltage High Level			0.7VDD		VDD	V
VIL	Input Voltage Low Level			GND		0.3VDD	V
IOH	Output Leakage Current	VOH = 16 V				10	µA
VOL	Output Voltage (Serial-OUT)	IOL = 1mA				0.4	V
VOH	Output Voltage (Serial-OUT)	IOH = -1mA		VDD-0.4V			V
IOL1	Output Current	VO = 0.7V	REXT = 910 Ω	19.2	20.6	22.0	mA
IOL2		VO = 0.7V	REXT = 360 Ω	46.2	50.5	54.0	mA
∆IOL1	Output Current Error	VO = 0.7V	REXT = 910 Ω		± 4	± 5	%
	between bit (All Output ON)
∆IOL2		VO = 0.7V	REXT = 360 Ω		± 3	± 4	%
RSIN(up)	Pull-up Resistor			150	300	600	KΩ
RSIN(down)	Pull-down Resistor			100	200	400	KΩ
IDD(OFF1)	Supply Current (OFF)	REXT = OPEN OUT 0 to 15 = OFF			0.3	0.6	mA
IDD(OFF2)		REXT = 470 Ω OUT 0 to 15 = OFF			5.5	7.7
IDD(OFF3)		REXT = 250 Ω OUT 0 to 15 = OFF			10.1	14.1
IDD(ON1)	Supply Current (ON)	REXT = 470 Ω OUT 0 to 15 = ON			5.5	7.7
IDD(ON2)		REXT = 250 Ω OUT 0 to 15 = ON			10.1	14.1

Table 8: Switching Characteristics (VDD=3V, T = 25°C, unless otherwise specified.)

Symbol				Parameter	Test Conditions		Min.	Typ.	Max.	Unit
tPLH1	Propagation Delay Time,				VDD = 3 V	VIH = VDD		250	280	ns
	CLK-OUTn, /LE = H, /OE = L				VIL = GND	CL = 13pF
tPLH2		Propagation Delay Time,						220	250	ns
					IO = 40mA	VL = 3 V
	/LE-OUTn, /OE = L
tPLH3		Prop		agation Delay Time,	REXT = 470 Ω	RL = 65 Ω		200	250	ns
	/OE-OUTn, /LE = H
tPLH	Propagation Delay Time,							25	50	ns
	CLK-SDO
tPHL1	Propagation Delay Time,							25	50	ns
	CLK-OUTn, /LE = H, /OE = L
tPHL2		Propagation Delay Time,						25	50	ns
	/LE-OUTn, /OE = L
tPHL3		Prop		agation Delay Time,				50	70	ns
	/OE-OUTn, /LE = H
tPHL	Propagation Delay Time,							25	50	ns
	CLK-SDO
tr	Output Rise Time							200	250	ns
tf	Output Fall Time							17	25	ns

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EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS

Figure 2: /OE Terminal

Figure 3: /LE Terminal

Figure 4: CLK, SDI Terminal

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Figure 5: SDO Terminal

Figure 6: Block Diagram

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