ST STP1612PW05 User Manual

16-channel LED driver with 16-bit PWM,

8-bit gain and full LED error detection

Features

■ 16 constant current output channels

■ Supply voltage: 3.3 V or 5 V

■ Two PWM selectable counters 12/16-bit of

grayscale

■ Selectable enhanced PWM for ghost effect

reduction

■ Open and short LED detection

■ 8-bit current gain control by means of 256

steps in two selectable ranges

■ Single resistor to set the current from 3 mA to

60 mA

■ Programmable progressive output delay

■ Thermal protection and thermal flag

■ UVLO

■ Schmitt trigger input

■ Selectable 16-bit or 256-bit serial data-in

format

■ Max clock frequency: 30 MHz

■ ESD protection 2.5 kV HBM, 200 V MM

■ Drop-in compatible with STP16CP\S\DP05

series

■ Available in high thermal efficiency TSSOP

exposed pad

Applications

■ Video display LED panels

■ RGB backlighting

■ Special lighting

Table 1. Device summary

STP1612PW05

Preliminary data

QFN-24

TSSOP24 TSSOP24

Description

The STP1612PW05 is a 16-channel constant
current sink LED driver. The maximum output
current value for all the 16 channels is set by a
single resistor from 3 mA to 60 mA. The device
features 8-bit gain (256 steps) for global LED
brightness adjustment with two selectable ranges.
This function is accessible via a serial interface.
The device has an individual adjustable PWM
brightness control for each output channel. The
PWM counters are selectable via a serial
interface with 4096 or 65536 steps (12 or 16 bit).
The STP1612PW05 also provides enhanced
pulse-width modulation counting algorithms called
e-PWM to reduce flickering effects (ghost visual
effects) improving the overall image quality. The
device has a dual size 16-bit or 256-bit shift
register. All the control and the shift register read
back data are accessible via serial interface. The
STP1612PW05 has the capability to detect open
and short LED failure and overtemperature,
reporting the status through SPI line. The device
guarantees a 20 V output driving capability,
allowing the user to connect more LEDs in series.

SO-24

exposed pad

STP1612PW05QTR QFN-24 4000 parts per reel

STP1612PW05MTR SO-24 1000 parts per reel

STP1612PW05TTR TSSOP24 2500 parts per reel

STP1612PW05XTTR TSSOP24 exposed pad 2500 parts per reel

February 2011 Doc ID 15819 Rev 5 1/41

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.

Order code Package Packaging

www.st.com

41

Contents STP1612PW05

Contents

1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Timing waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Principle of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7 Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

8 Grey scales data loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

9 Setting the PWM gray scale counter . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

9.1 PWM data synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

9.2 Synchronization for PWM counting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

10 Error detection conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

11 Setting output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

12 Constant current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

13 Current gain adjustment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

14 Delay time of staggered output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

15 Thermal protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

2/41 Doc ID 15819 Rev 5

STP1612PW05 Contents

16 Time-out alert of GCLK disconnection . . . . . . . . . . . . . . . . . . . . . . . . . 26

17 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

17.1 LED supply voltage (VLED) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

17.2 Setting grayscale brightness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

17.3 Multi device application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

18 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Doc ID 15819 Rev 5 3/41

Block diagram STP1612PW05

1 Block diagram

Figure 1. Block diagram

SDI

CLK

LE

SDO

Serial interface

CTRL command

and

CTRL logic

TSD

Shift register
dual size mode

(16 or 256 bit)

GND

VDD

UVLO & POR

16-bit

Configuration

Register

PWM data buffer

(16x16 bit)

R-EXT

Dual range gain

7-bit DAC

Gradual outputs

delay

Open/short
error detection

PWM and e-PWM

12/16 bit counter

and SYNC control

PWCLK

1----------16

Constant current output channels

4/41 Doc ID 15819 Rev 5

STP1612PW05 Summary description

2 Summary description

Table 2. Typical current accuracy at 5 V

Current

Output voltage

accuracy

Between ICs

Output current V

DD

temp.

≥ 1.0 ± 6% 15 to 60

≥ 0,2 ± 6% 3 to 15

Table 3. Typical current accuracy at 3.3 V

Current

Output voltage

accuracy

Output current V

Between ICs

≥ 1.0 ± 6% 15 to 60

≥ 0,3 ± 6% 3 to 15

5 V 25 °C

DD

temp.

3.3 V 25 °C

Doc ID 15819 Rev 5 5/41

Summary description STP1612PW05

2.1 Pin connection and description

Figure 2. Pin connection

SDI

SDI

SDI

R-EXT

R-EXT

R-EXT

VDD

VDD

GND

GND

GND

SDI

SDI

SDI

CLK

CLK

CLK

LE

LE

LE

OUT0

OUT0

OUT0
OUT1

OUT1

OUT1
OUT2

OUT2

OUT2
OUT3

OUT3

OUT3
OUT4

OUT4

OUT4
OUT5

OUT5

OUT5
OUT6

OUT6

OUT6
OUT7

OUT7

OUT7

VDD

VDD

VDD

R-EXT

R-EXT

R-EXT

SDO

SDO

SDO
PWCLK

PWCLK

PWCLK
OUT15

OUT15

OUT15
OUT14

OUT14

OUT14
OUT13

OUT13

OUT13
OUT12

OUT12

OUT12
OUT11

OUT11

OUT11
OUT10

OUT10

OUT10
OUT9

OUT9

OUT9
OUT8

OUT8

OUT8

LE

LE

LE

OUT0

OUT0

OUT0
OUT1

OUT1

OUT1
OUT2

OUT2

OUT2
OUT3

OUT3

OUT3
OUT4

OUT4

OUT4

CLK

CLK

CLK

OUT5

OUT5

OUT5

OUT6

OUT6

OUT6

VDD

OUT7

OUT7

OUT7

SDO

PWCLK

SDO

PWCLK

SDO

PWCLK

OUT15

OUT15

OUT15
OUT14

OUT14

OUT14
OUT13

OUT13

OUT13
OUT12

OUT12

OUT12
OUT11

OUT11

OUT11
OUT10

OUT10

OUT10

GND

GND

GND

OUT9

OUT8

OUT9

OUT8

OUT9

OUT8

Note: The exposed pad should be electrically connected to a metal land electrically isolated or

connected to ground

Table 4. Pin description

Pin n° Symbol Name and function

1 GND Ground terminal

2 SDI Serial data input terminal

3CLK

4 LE Data strobe terminal and controlling command with CLK

5-20 OUT 0-15 Output terminals

21 PWCLK

22 SDO Serial data out terminal

23 R-EXT Input terminal of an external resistor for constant current programing

24 V

DD

Clock input terminal used to shift data on rising edge and carries
command information when LE is asserted.

Gray scale clock terminal.
Reference clock for grey scale PWM counter.

Supply voltage terminal

6/41 Doc ID 15819 Rev 5

STP1612PW05 Electrical ratings

3 Electrical ratings

3.1 Absolute maximum ratings

Stressing the device above the rating listed in the Table 5 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the operating sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.

Table 5. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

I

V

I

GND

f

CLK

T

1. Such absolute value is based on the thermal shutdown protection.

Supply voltage 0 to 7 V

DD

Output voltage -0.5 to 20 V

O

Output current 60 mA

O

Input voltage -0.4 to VDD V

I

GND terminal current 1300 mA

Clock frequency 50 MHz

Junction temperature range

J

3.2 Thermal data

Table 6. Thermal data

Symbol Parameter Value Unit

T

J-OPR

T

R

T

STG

thJA

Operating free-air temperature range -40 to +125 °C

A

Operating thermal junction temperature range -40 to +150 °C

Storage temperature range -55 to +150 °C

Thermal resistance junction­ambient

(1)

(1)

-40 to + 170 °C

SO-24 42.7 °C/W

TSSOP24 55 °C/W

(2)

TSSOP24

Exposed pad

37.5 °C/W

QFN-24 55 °C/W

1. According to Jedec standard 51-7B

2. The exposed pad should be soldered directly to the PCB to realize the thermal benefits.

Doc ID 15819 Rev 5 7/41

Electrical ratings STP1612PW05

3.3 Recommended operating conditions

Table 7. Recommended operating conditions at 25 °C

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

V

I

OH,SDO

I

OL,SDO

V

V

t

wLAT

t

wCLK

t

wEN

t

SETUP(D)

t

HOLD(D)

t

SETUP(L)

f

CLK

Supply voltage 3.0 - 5.5 V

DD

Output voltage - 20 V

O

Output current, OUTn 3 - 60 mA

I

O

Output current, SDO - +1 mA

Output current, SDO - -1 mA

Input voltage 0.7 V

IH

Input voltage GND - 0.3 V

IL

LE pulse width

DD

20 - ns

-V

CLK pulse width 10 - ns

PWCLK pulse width 20 - ns

VDD = 3.3 V to 5.0 V

Setup time for DATA 5 - ns

Hold time for DATA 5 - ns

Setup time for LATCH 5 - ns

Clock frequency Cascade operation

(1)

-30MHz

V

DD

DD

1. If the device is connected in cascade, it may not be possible achieve the maximum data transfer. Please
considered the timings carefully.

V

8/41 Doc ID 15819 Rev 5

STP1612PW05 Electrical characteristics

4 Electrical characteristics

VDD = 3.3 V ± 10%, VDD = 5 V ± 10%, TA = 25 °C unless otherwise specified

Table 8. Electrical characteristics

Symbol Characteristics Test conditions Min. Typ. Max. Unit

V

O

I

OUT

OH,SDO

I

OL,SDO

V

IH

V

IL

I

OH

V

OL

V

OH

dI

OUT1

dI

OUT1

dI

OUT2

dI

OUT2

%/dV

%/dV

R

IN(down)

I

DD(off) 1

I

DD(off) 2

I

DD(off) 3

Maximum output voltage OUT0 ~ OUT15 20 V

OUT0~OUT115 VO = 2V 3 60
Output
current

SDO -8

mAI

SDO 8

Input voltage “H” level 0.7 * VDD V

Input voltage “L” level GND 0.3 * V

V

DD

V

DD

Output leakage current VO = 20 V 1 µA

I

= +8 mA 0.4 V

Output voltage SDO

Current skew (channel)

Current skew (IC)

Output current vs. output voltage

O

regulation

Output current vs. supply voltage

DD

regulation

OL

IOH = -8 mA V

I

= 3mA, VO = 0.3V,

OUT

= 238.2kΩ

R

EXT

I

= 20mA, VO = 1V,

OUT

R

= 34.7kΩ

EXT

I

= 3mA, VO = 0.3V,

OUT

R

= 238.2kΩ

EXT

I

= 20mA, VO = 1V,

OUT

= 34.7kΩ

R

EXT

VO within 1.0 V and 3.0 V,
R

= 34.7 kΩ @ 20 mA

ext

within 4.5 V and 5.5 V ± 1.0 ± 5.0 % / V

V

DD

- 0.4 V

DD

±1.5 ±3 %

±3 ±6 %

± 0.1 ± 0.5 % / V

Pull-down resistor LE 150 200 250 kΩ

Supply current “Off”

Rext = Open,

OUT0 ~ OUT15 = Off

IO = 3 mA,

~ OUT15 = Off

OUT0

= 60 mA,

I

O

OUT0 ~ OUT15 = Off

811

8.5 11

11 15

mA

I

= 3 mA,

I

DD(on) 1

O

OUT0 ~ OUT15 = On

811.5

Supply current “On”

= 60 mA,

I

I

DD(on) 2

O

~ OUT15 = On

OUT0

11.5 15

Doc ID 15819 Rev 5 9/41

Electrical characteristics STP1612PW05

Figure 3. Test circuit for electrical characteristics

VIH=V

DD

VIL=GND

Function

Generator

inputLogic

waveform

VIH,V

DDI

IL

SDI

CLK

LE

PWCLK

R

ext

DDV

GND

EXT-R

V

DD

OUT0

OUT15

.

.
.

SDO

OUT

I

I

OL

I

OH

10/41 Doc ID 15819 Rev 5

STP1612PW05 Electrical characteristics

Table 9. Switching characteristics (VDD = 5.0 V) TA = -40 ~ 125 ° C

Symbol Characteristics Conditions Min. Typ. Max. Unit

t

SU0

t

SU1

t

SU2

t

H0

t

H1

t

PD0

t

PD1

t

PD2

t

DL1

t

DL2

t

DL3

t

w(L)

t

w( CLK)

t

w(PWCLK)

t

ON

t

OFF

t

EDD

Setup time

Hold time

Propagation

PWCLK-OUTn4

delay time

Stagger delay
time

Pulse width

Output rise time of output ports 10 ns

Output fall time of output ports 6 ns

Error detection minimum duration

SDI - CLK ↑

1 ns

LE ↑ – DCLK ↑ 1 ns

LE ↓ – DCLK ↑ 5 ns

CLK ↑ - SDI 3 ns

CLK ↑ - LE ↓ 7 ns

CLK - SDO 30 40 ns

LE – SDO

OUTn4

(2)

+ 1

OUTn4 + 2

OUTn4 +3

LE 5 ns

(1)

(1)

(1)

(1)

V

= 5.0 V

DD

VIH = VDD

VIL = GND

= 460 Ω

R

ext

V

= 4.5 V

LED

RL = 152 Ω
CL = 10 pF

C1 = 100 nF

C2 = 10 µF

= 20 mA

I

O

100 ns

30 40 ns

40 ns

80 ns

120 ns

CLK 20 ns

PWCLK 20 ns

(3)

1µs

1. Refer to the timing waveform, where n = 0, 1, 2, 3.

2. In timing of “read configuration” and “read error status code”, the next CLK rising edge should be t

the falling edge of LE.

3. Refer to Figure 5 on page 13.

PD2

after

Doc ID 15819 Rev 5 11/41

Electrical characteristics STP1612PW05

Table 10. Switching characteristics (V

= 3.3 V)

DD

Symbol Characteristics Conditions Min. Typ. M ax. Unit

t

SU0

t

SU1

t

SU2

t

H0

t

H1

t

PD0

t

PD1

t

PD2

t

DL1

t

DL2

t

DL3

t

w(L)

t

w(CLK)

t

w(PWCLK)

t

ON

t

OFF

t

DEC

Setup time

Hold time

Propagation delay

PWCLK-OUTn4

time

Stagger delay
time

Pulse width

Output rise time of output ports 11.6 ns

Output fall time of output ports 7 ns

Error detection duration 0.5 1 µs

1. Refer to the timing waveform Figure 4, where n = 0, 1, 2, 3.

2. In timing of “read configuration” and “read error status code”, the next CLK rising edge should be t

the falling edge of LE.

SDI - DCLK ↑

1 ns

LE ↑ – DCLK ↑ 1 ns

LE ↓ – DCLK ↑ 5 ns

CLK ↑ - SDI 3 ns

CLK ↑ - LE ↓ 7 ns

CLK - SDO 45 40 ns

LE – SDO

+ 1

OUTn4

OUTn4 + 2

OUTn4 +3

LE 5 ns

(1)

(2)

(1)

(1)

(1)

VDD = 3.3 V

VIH = VDD

= GND

V

IL

R

= 460 Ω

ext

= 4.5 V

V

LED

RL = 152 Ω
CL = 10 pF

C1 = 100 nF

C2 = 10 µF

120 ns

45 40 ns

40 ns

80 ns

120 ns

CLK 20 ns

PWCLK 20 ns

after

PD2

Figure 4. Test circuit for switching characteristics

VIH,V

IL

SDI

Function

Generator

inputLogic

VIH=V

DD

VIL=GND

12/41 Doc ID 15819 Rev 5

CLK

LE

PWCLK

V

DDV

GND

DD

OUT0

OUT15

SDO

1

C

OUT

I

.

.
.

R

L

C

L

R

L

C

L

V

C

LED waveform

C

L

2

DDI

EXT-R

R

ext

STP1612PW05 Timing waveform

5 Timing waveform

Figure 5. Timing waveform

PWCLK

PWCLK

PWCLK

Doc ID 15819 Rev 5 13/41