ST STP08CP05 User Manual

Low voltage, low current power 8-bit shift register

Features

■ Low voltage power supply down to 3 V

■ 8 constant current output channels

■ Adjustable output current through external

resistor

■ Serial data IN/parallel data OUT

■ 3.3 V micro driver-able

■ Output current: 5-100 mA

■ 30 MHz clock frequency

■ Available in high thermal efficiency TSSOP

exposed pad

■ ESD protection 2.5 kV HBM, 200 V MM

Description

The STP08CP05 is a monolithic, low voltage, low
current, power 8-bit shift register designed for
LED panel displays. The STP08CP05 contains an
8-bit serial-in, parallel-out shift register that feeds
an 8-bit D-type storage register. In the output
stage, eight regulated current sources were
designed to provide 5-100 mA constant current to
drive the LEDs, the output current setup time is 11
ns (typ), thus improving the system performance.

STP08CP05

DIP-16

TSSOP16

(Exposed pad)

TSSOP16

adjust LED’s brightness intensity from 0% to
100% via

OE pin.

The STP08CP05 guarantees a 20 V output
driving capability, allowing users to connect more
LEDs in series. The high clock frequency, 30
MHz, also satisfies the system requirement of
high volume data transmission. The 3.3 V of
voltage supply is useful for applications that
interface with any micro from 3.3 V. Compared
with a standard TSSOP package, the TSSOP
exposed pad increases heat dissipation capability
by a 2.5 factor.

SO-16

The STP08CP05 is backward compatible in
functionality and footprint with STP8C/L596.
Through an external resistor, users can adjust the
STP08CP05 output current, controlling in this way
the light intensity of LEDs, in addition, user can

Table 1. Device summary

Order codes Package Packaging

STP08CP05B1R DIP-16 25 parts per tube

STP08CP05MTR SO-16 (Tape and reel) 2500 parts per reel

STP08CP05TTR TSSOP16 (Tape and reel) 2500 parts per reel

STP08CP05XTTR TSSOP16 exposed-pad (Tape and reel) 2500 parts per reel

August 2010 Doc ID 13524 Rev 5 1/28

www.st.com

28

Contents STP08CP05

Contents

1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Pin connection and description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

3.3 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

5 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

6 Equivalent circuit and outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

7 Truth table and timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

7.1 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

7.2 Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

9 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

2/28 Doc ID 13524 Rev 5

STP08CP05 Summary description

1 Summary description

Table 2. Typical current accuracy

Current accuracy

Output voltage

Between bits Between ICs

≥ 1.3 V ± 1.5% ± 3% 20 to 100 mA

1.1 Pin connection and description

Figure 1. Connections diagram

Output current

Note: The exposed pad should be electrically connected to a metal land electrically isolated or

connected to ground.

Table 3. Pin description

Pin N° Symbol Name and function

1 GND Ground terminal

2 SDI Serial data input terminal

3 CLK Clock input terminal

4 LE Latch input terminal

5-12 OUT 0-7 Output terminal

13 OE Output enable input terminal (active low)

14 SDO Serial data out terminal

15 R-EXT Constant current programming

16 V

DD

5 V supply voltage terminal

Doc ID 13524 Rev 5 3/28

Block diagram STP08CP05

2 Block diagram

Figure 2. Block diagram

4/28 Doc ID 13524 Rev 5

STP08CP05 Maximum rating

3 Maximum rating

Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. these are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

3.1 Absolute maximum ratings

Table 4. Absolute maximum ratings

Symbol Parameter Value Unit

V

I

f

T

T

V

GND

CLK

OPR

Supply voltage I

DD

Output voltage -0.5 to 20 V

O

I

Output current 100 mA

O

GND terminal current 800 mA

Clock frequency 50 MHz

Operating temperature range -40 to +125 °C

Storage temperature range -55 to +150 °C

STG

3.2 Thermal data

Table 5. Thermal data

Symbol Parameter DIP-16 SO-16 TSSOP-16

R

1. The exposed-pad should be soldered to the PBC to realize the thermal benefits

Thermal resistance junction-ambient 90 125 140 37.5 °C/W

thJA

GND

0 to 7 V

TSSOP-16

(exposed pad)

(1)

Unit

Doc ID 13524 Rev 5 5/28

Maximum rating STP08CP05

3.3 Recommended operating conditions

Table 6. Recommended operating conditions

Symbol Parameter Test conditions Min Typ Max Unit

V

V

I

I

V

V

t

wLAT

t

wCLK

t

wEN

t

SETUP(D)

t

HOLD(D)

t

SETUP(L)

f

CLK

1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully.

Supply voltage 3.0 5.5 V

DD

Output voltage 20 V

O

I

Output current OUTn 5 100 mA

O

Output current SERIAL-OUT +1 mA

OH

Output current SERIAL-OUT -1 mA

OL

Input voltage

IH

Input voltage -0.3

IL

LE pulse width

0.7 V

DD

20 ns

CLK pulse width 20 ns

OE pulse width 200 ns

= 3.0 to 5.0 V

V

Setup time for DATA 7 ns

DD

Hold time for DATA 4 ns

Setup time for LATCH 15 ns

Clock frequency

Cascade operation

(1)

VDD+0.3

0.3 V

DD

30 MHz

V

V

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STP08CP05 Electrical characteristics

4 Electrical characteristics

V

= 3.3 V to 5 V, T = 25 °C, unless otherwise specified.

DD

Table 7. Electrical characteristics

Symbol Parameter Test conditions Min Typ Max Unit

V

V

I

OH

V

OL

V

OH

I

OL1

OL2

I

OL3

ΔI

OL1

OL2

ΔI

OL3

R

SIN(up)

R

SIN(down)

I

DD(OFF1)

Input voltage high level 0.7 V

IH

Input voltage low level GND 0.3V

IL

Output leakage current VOH = 20 V 0.5 10 μA

Output voltage
(Serial-OUT)

Output voltage
(Serial-OUT)

Output current

Output current error
between bit
(All Output ON)

Pull-up resistor 150 300 600 KΩ

Pull-down resistor 100 200 400 KΩ

Supply current (OFF)

I

DD(OFF2)

I

DD(ON1)

Supply current (ON)

I

DD(ON2)

Thermal Thermal protection

I

OL

I

OH

V

O

VO = 0.3 V, R

VO = 1.3 V, R

V

O

VO = 0.3 VR

VO = 1.3 VR

R

EXT

OUT 0 to 7 = OFF

R

EXT

OUT 0 to 7 = OFF

R

EXT

OUT 0 to 7 = ON

R

EXT

OUT 0 to 7 = ON

(1)

DD

V

DD

DD

= 1 mA 0.03 0.4 V

= -1 mA V

= 0.3 V, R

= 0.3 VR

= 3.9 kΩ 4.25 5 5.75

ext

= 970 Ω 19.4 20 20.6

ext

= 190 Ω 97 100 103

ext

= 3.9 kΩ ± 5 ± 8

EXT

= 970 Ω ± 1.5 ± 2.75

EXT

=190 Ω ± 1.2 ± 2.5

EXT

= 980

= 250

- VDD =- 0.4 V V

OH

45

11.2 13.5

mAI

mA

= 980

= 250

4.5 5

11.7 13.5

170 °C

V

V

%ΔI

1. Guaranteed by design (not tested)
The thermal protection switches OFF only the outputs

Doc ID 13524 Rev 5 7/28

Switching characteristics STP08CP05

5 Switching characteristics

V

= 5 V, T = 25 °C, unless otherwise specified.

DD

Table 8. Switching characteristics

Symbol Parameter Test conditions Min Typ Max Unit

t

PLH1

t

PLH2

t

PLH3

t

PLH

t

PHL1

t

PHL2

t

PHL3

t

PHL

t

ON

Propagation delay time,
CLK-OUTn, LE = H,

= L

OE

Propagation delay time,
LE -OUTn,

= L

OE

Propagation delay time,
OE -OUTn,
LE = H

Propagation delay time,
CLK-SDO

Propagation delay time,
CLK-OUTn, LE = H,

= L

OE

Propagation delay time,
LE -OUTn,

= L

OE

Propagation delay time,
OE -OUTn,
LE = H

Propagation delay time,
CLK-SDO

Output rise time
10~90% of voltage
waveform

V

= 3.3 V VIH = V

DD

DD

VIL = GND CL = 10 pF

= 20 mA VL = 3.0 V

I

O

R

= 1 KΩ RL = 60 Ω

EXT

= 3.3 V 35 50

V

DD

= 5 V 18 28

V

DD

V

= 3.3 V 48 74

DD

= 5 V 30 50

V

DD

VDD = 3.3 V 55 82

= 5 V 37 58

V

DD

= 3.3 V 21 28

V

DD

= 5 V 17 22

V

DD

V

= 3.3 V 11 17

DD

= 5 V 7 11

V

DD

V

= 3.3 V 24 40

DD

= 5 V 21 31

V

DD

VDD = 3.3 V 20 35

= 5 V 18 28

V

DD

= 3.3 V 24 32

V

DD

= 5 V 19 25

V

DD

VDD = 3.3 V 26 40

= 5 V 11 17

V

DD

ns

ns

ns

ns

ns

ns

ns

ns

ns

Output fall time

t

90~10% of voltage

OFF

waveform

CLK rise time

t

r

CLK fall time

t

f

1. In order to achieve high cascade data transfer, please consider tr/tf timings carefully.

(1)

(1)

VDD = 3.3 V 5 10

= 5 V 4 8

V

DD

8/28 Doc ID 13524 Rev 5

ns

5000 ns

5000 ns

STP08CP05 Equivalent circuit and outputs

6 Equivalent circuit and outputs

Figure 3. OE terminal

Figure 4. LE terminal

Figure 5. CLK, SDI terminal

Doc ID 13524 Rev 5 9/28