bus specification revision 2.0 And the on-thego supplement to the USB 2.0 specification
■ Analog car kit-compatible
■ Three operating modes: USB, UART and audio
■ Configurable using I
■ Capable of 12Mbit/s full-speed and 1.5Mbit/s
low-speed modes of operation
■ Standard digital interface compliant with the
OTG transceiver specification
■ Supports the session request protocol (SRP)
and host negotiation protocol (HNP)
■ 35mA Typical V
current for 3.3V supply voltage
■ Ability to control external charge pump for
higher V
■ Integrated pull-up/-down resistors
■ ±6kV ESD protection on all USB pins (contact
BUS
currents
discharge)
■ +1.6V to +3.6V Digital power supply and +2.7V
to +5.5V analog supply voltage range
■ Power-down mode with very low power
consumption for battery powered devices
■ Ideal for system ASICs with built-in USB OTG
dual role core
■ Available In QFN-24
■ –40°C to +85°C operating temperature range
2
C serial interface
Charge pump output
BUS
STOTG04ES
USB-OTG Full-speed Transceiver
QFN24 (4mmx4mm)
■ MP3 players
■ Digital cameras
■ Printers
Description
The STOTG04ES is a USB On-The-Go full-speed
transceiver. It provides complete physical layer
solution for any USB-OTG device. It contains
V
charge pump and comparators, ID line
BUS
detector and interrupt generator, and the USB
differential driver and receivers. The STOTG04
transceiver is suitable for mobile and battery
powered devices because of its low power
consumption and power down operating mode.
The transceiver is capable of operation in several
different modes. It can operate in basic USB-OTG
mode, as an UART transceiver or in audio mode.
Behavior of the transceiver is fully configurable
through the two-wire I
transceiver supports session request protocol and
host negotiation protocol.
5INT/OActive low interrupt signal (open-drain)
6SPEEDIMode of the transceiver (0 = low-speed, 1 = full-speed) (2)
7
8SUSPENDIPower down input (0 = active mode, 1 = power down) (See
9OE_TP_INT/I/OOutput enable of the differential driver in the USB mode or interrupt output
10VMOD– single-ended receiver output
11VPOD+ single-ended receiver output
12RCVODifferential receiver output
13SE0_VMI/O
14DAT_VPI/O
15D-I/ONegative data line in the USB mode or serial data output in the UART mode
16D+I/OPositive data line in the USB mode or serial data input in the UART mode
17GNDPower Common analog and digital ground
18IDI/OID pin of the USB connector used for protocol identification
19
20
21CAP1I/OExternal capacitor pin for the charge pump
22CAP2I/OExternal capacitor pin for the charge pump
V
TRM
ExpPad-Not Connected
V
BUS
V
BAT
Power
Power Analog power supply voltage (+2.7V to +5.5V)
Least significant bit of the I
PSW output enabling or disabling an external charge pump
2
C serial data (1)
I
I2C clock
Internal voltage regulator output; an external decoupling capacitor should be
connected (3)
Single-ended zero input/output in the DAT_SE0 mode transmit mode, negative
data input/output in the single-ended transmit mode or TXD in the UART mode
Data input/output in the DAT_SE0 mode transmit mode, positive data input/
output in the single-ended transmit mode or RXD in the UART mode
line of the USB interface – it needs an external capacitor of 4.7µF
V
I/O
BUS
C address of the transceiver input latched on reset;
Ta bl e 8
)
3/26
Pin configurationSTOTG04ES
PlN N°SYMBOLI/ONAME AND FUNCTION
23CGNDPower Ground for the charge pump
24
(1) Input and open-drain output
(2) Input with internal pull-up resistor
(3) Internal regulator can be bypassed by connecting V
V
IF
Power Logic power supply (+1.6V to 3.6V)
to this pin when the V
BAT
is in range of 2.7V to 3.6V
BAT
Figure 2.Functional diagram
4/26
STOTG04ESMaximum ratings
2 Maximum ratings
Table 2.Absolute maximum ratings
SymbolParameterValueUnit
V
V
BAT
V
DCDIG
T
STG
V
ESD
(*) In accordance to IEC61000-4-2, level 3.
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional Operation under these con-
ditions is not implied.
Table 3.Thermal data
SymbolParameterValueUnit
R
thJA
Table 4.Recommended operating condition
SymbolParameterMin.Typ.Max.Unit
V
V
BAT
T
C
EXT
C
C
TRM
R
Logic Supply Voltage-0.5 to + 4.5V
IF
Analog Supply Voltage-0.5 to + 6.5V
DC Input Voltage on any logic interface pin-0.5 to + 4.5V
Storage Temperature Range-65 to + 150°C
Electrostatic discharge voltage
on USB pins
Human Body Model± 8
Contact Discharge (*)± 6
Thermal Resistance Junction-Ambient59°C/W
Logic Supply Voltage1.61.83.6V
IF
Analog Supply Voltage2.73.35.5V
Operating Temperature Range-40+85°C
A
Charge pump external capacitor100220470nF
Charge pump tank capacitor14.76.5µF
T
Voltage regulator external capacitor1µF
Data lines impedance matching resistor20Ω
S
kV
Table 5.ESD Performance
SymbolParameterValueUnit
IEC-61000-4-2 (D+, D-, VBUS, ID)
ESD
IEC-61000-4-2 (other pins)
Air discharge (10 pulses)± 8
Contact discharge (10 pulses)± 6
Air discharge (10 pulses)± 2
Contact discharge (10 pulses)± 2
kV
5/26
Electrical characteristicsSTOTG04ES
3 Electrical characteristics
Table 6.Electrical characteristics
Characteristics measured over recommended operating conditions unless otherwise is
noted. All typical values are referred to T
C
= 220nF, CT = 4.7µF and C
EXT
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
BAT
I
Digital Part Supply Current
IF
Operating Supply Current
LOGIC INPUTS AND OUTPUTS
V
V
V
V
I
LKG
I
OZ
V
BUS
V
BUS
V
BUS_LKGVBUS
V
BUS_RIPVBUS
f
CP
R
VBUSVBUS
I
VBUS
V
BUS_VLD
HIGH level output voltage
OH
LOW level output voltage
OL
HIGH level input voltage
IH
LOW level input voltage
IL
Input leakage current-11µA
Off-state output current-55µA
V
output voltageI
BUS
leakage voltage
output rippleI
Charge-pump switching
frequency (2)
input impedance
Maximum V
V
valid comparator
BUS
source current C
BUS
threshold
Session valid comparator
V
SES_VLD
threshold for both A and B
devices
R
VBUS_PUVBUS
R
VBUS_PD
charge pull-up resistance
V
discharge pull-down
BUS
resistance
ID
V
ID_BIAS
R
ID_PU
R
ID_GND
R
ID_FLOAT
ID pin bias voltage
ID pin pull-up resistance70105130kΩ
ID line short resistance to detect id_gnd state10Ω
ID line short resistance to detect id_float state800kΩ
TRM
Active mode (1,2)0.61.6mA
Power down mode1µA
Transceiver current while
transmitting and receiving (1,2)
Charge pump current, I
Power down mode (3)1µA
= -100µAVIF-0.15
I
OH
I
= -2mAVIF-0.40
OH
= 100µA
I
OL
I
= 2mA
OL
= 8mA
LOAD
No Load3200mV
= 8mA, CT = 4.7µF
LOAD
= 220 nF, V
EXT
Low to high transition4.40
High to low transition4.40
Low to high transition0.82.0
High to low transition0.82.0
= 140kΩ, V
R
CP_ID
= 25°C, VIF = 1.8V, V
A
= 1µF
LOAD
> 4.4V
BUS
≤ 5V
BAT
= 8mA
= 3.3V, RS = 20Ω,
BAT
4.57
1725
0.15V
0.40V
0.7V
IF
0.3V
IF
4.44.95.25V
3060mV
0.50.81.5MHz
4076100kΩ
2035mA
281640Ω
6561260Ω
1.31.93.0V
mA
V
V
V
V
V
V
6/26
STOTG04ESElectrical characteristics
SymbolParameterTest ConditionsMin.Typ.Max.Unit
DIFFERENTIAL DRIVER
Z
DRV
V
OH_DRV
V
OL_DRV
V
CRS
Output Impedance
HIGH level output voltage
LOW level output voltage
Driver crossover voltage
DIFFERENTIAL AND SINGLE-ENDED RECEIVERS
V
V
SE-TH
R
C
R
PU_D+
R
PU_D-
R
V
DT_LKG
Differential receiver input
DI
sensitivity (V
D+
- VD-)
SE receivers switching
threshold
Input resistancePU/PD resistor deactivated1.5MΩ
IN
Input capacitance1030pF
IN
Data line pull-up resistance on
pin D+
Data line pull-up resistance on
pin D-
Data line pull-down resistance14.2517.024.8kΩ
PD
Data line leakage voltage
CAR KIT INTERRUPT DETECTOR
V
CR_INT_TH
Car kit Interrupt threshold0.40.6V
UART MODE – D+ AND D- PINS
V
V
V
V
HIGH level output voltage
OH
LOW level output voltage
OL
HIGH level input voltage2.0V
IH
LOW level input voltage0.8V
IL
VOLTAGE REGULATOR
V
TRM
I
TRM
(1) Transmitting and receiving at 12Mbit/s, loads of 50pF on D+ and D- pins, no capacitive loads on VP and VM pins
(2) Not tested in production; characterization only
(3) See paragraph 6.7.1
Internal power supply voltage
Voltage regulator output
current
Excluding external R
= 14.25kΩ, V
R
LH
RLH = 14.25kΩ, V
= 1.425kΩ
R
LL
= 50 to 600pF
C
LOAD
= 0.8 to 2.5V
V
CM
TRM
TRM
S
= 3.3V
= 2.7V
81624Ω
2.83.6V
2.63.0V
00.3V
1.31.672.0V
-200200mV
Low to high transition0.81.62.0
High to low transition0.81.12.0
Bus Idle90013001575
Receiving mode142522003090
90013001575Ω
R
I
I
V
V
V
V
OH
OL
= 300kΩ
PU_EXT
= -2mA
= 2mA
= 3.3 to 5V, no load; uart_en=0
BAT
= 2.8 to 5V, no load; uart_en=1
BAT
= 3.6V, V
BAT
= 3.0V, V
BAT
> 3V; uart_en=0
TRM
>2.6V; uart_en=1
TRM
200342mV
2.43.6V
00.4V
3.03.33.6V
2.62.752.9V
20mA
10mA
V
Ω
7/26
Electrical characteristicsSTOTG04ES
Table 7.Switching characteristics
Over recommended operating conditions unless otherwise is noted. All the typical values are
referred to T
= 1µF
C
TRM
SymbolParameterTest ConditionsMin.Typ.Max.Unit
T
VBUS_RISEVBUS
DIFFERENTIAL DRIVER
t
R
t
F
t
P_DRV_R
t
P_DRV_F
t
RFM
SINGLE-ENDED RECEIVERS
t
P_SE_R
t
P_SE_F
DIFFERENTIAL RECEIVER
t
P_DIF_R
t
P_DIF_F
DIGITAL INTERFACE
t
SET_OE
t
TA _ OI
t
TA _ IO
I2C BUS (3)
f
SCL
t
LOW
t
HIGH
t
IICR
rise timeI
Data signal rise time
Data signal rise time
Propagation delay of the driver,
rising edge; DAT_SE0 mode
Propagation delay of the driver,
rising edge; VP_VM mode
Propagation delay of the driver,
falling edge; DAT_SE0 mode
Propagation delay of the driver,
rising edge; VP_VM mode
Rise and fall time matching (tR/
tF) excluding the first transition
from the idle state
Propagation delay of the SE
receiver, rising edge
Propagation delay of the SE
receiver, falling edge
Propagation delay of the SE
receiver, rising edge
Propagation delay of the SE
receiver, falling edge
Output enable setup time50ns
Output to input bus turnaround
time (1, 2)
Output to input bus turnaround
time (1, 2)
SCL clock frequency100kHz
Low period of the SCL clock4.7µs
High period of the SCL clock4.0µs
Rise time of both SDA and SCL