The STM32L4R9I-EVAL board is designed as complete demonstration and development
platform for the STMicroelectronics Arm
microcontroller with four I²C buses, three SPI and six USART ports, CAN port, two SAI
ports, 12-bit ADC, 12-bit DAC, internal 640-Kbyte SRAM and 2-Mbyte Flash memory, two
Octo-SPI memory interfaces, touch-sensing capability, USB OTG FS port, LCD-TFT
controller, MIPI
interface and JTAG debugging support.
The STM32L4R9I-EVAL, shown in Figure 3, Figure 4, and Figure 5, is used as a reference
design for user application development before porting to the final product.
The full range of hardware features on the board helps the user to evaluate all the
peripherals (USB, USART, digital microphones, ADC and DAC, TFT LCD, MIPI DSI
display, LDR, SRAM, NOR Flash memory device, Octo-SPI Flash memory device,
microSD™ card, sigma-delta modulators, CAN transceiver, EEPROM) and develop
applications. Extension headers allow easy connection of a daughterboard or wrapping
board for a specific application.
An ST-LINK/V2-1 is integrated on the board, as the embedded in-circuit debugger and
programmer for the STM32 MCU and the USB virtual COM port bridge.
®
DSI host controller, flexible memory controller (FMC), 8- to 14-bit camera
•STM32L4R9AII6 Arm-based microcontroller with 2 Mbytes of Flash memory and
640 Kbytes of RAM in a UFBGA169 package
•1.2” 390x390 pixels MIPI DSI round LCD
•4.3” 480x272 pixels TFT LCD with RGB mode
•Two ST-MEMS digital microphones
•8-Gbyte microSD card bundled
•16-Mbit (1 M x 16 bit) SRAM device
•128-Mbit (8 M x 16 bit) NOR Flash memory device
•512-Mbit Octo-SPI Flash memory device with double transfer rate (DTR) support
•64-Mbit Octo-SPI SRAM memory device with HyperBus interface support
•EEPROM supporting 1 MHz I²C-bus communication speed
•Reset and wake-up / tamper buttons
•Joystick with four-way controller and selector
•Touch-sensing button
•Light-dependent resistor (LDR)
•Potentiometer
•Coin battery cell for power backup
•Board connectors:
–Two jack outputs for stereo audio headphone with independent content
–Slot for microSD card supporting SD and SDHC
–TFT LCD standard connector
–MIPI DSI display standard connector
–EXT_I2C connector supports I²C bus
–RS-232 port configurable for communication or MCU flashing
–USB OTG FS Micro-AB port
–CAN 2.0A/B-compliant port
–Connector for ADC input and DAC output
–JTAG/SWD connector
–ETM trace debug connector
–User interface through USB virtual COM port
–Embedded ST-LINK/V2-1 debug and flashing facility
–TAG connector
–STDC14 connector
–PMOD connector
•Board expansion connectors:
–Motor-control connector
–Extension connector for daughterboard
•Flexible power-supply options: power jack, ST-LINK/V2-1 USB connector,
USB OTG FS connector, daughterboard
•On-board ST-LINK/V2-1 debugger/programmer with USB re-enumeration capability:
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UM2248Product marking
mass storage, virtual COM port and debug port
•Microcontroller supply voltage: fixed 3.3 V or adjustable range from 1.71 V to 3.6 V
•MCU current consumption measurement circuit
•Access to comparator and operational amplifier of STM32L4R9AII6
•Comprehensive free software libraries and examples available with the STM32Cube
package
•Support of a wide choice of integrated development environments (IDEs) including
IAR™, Keil
®
, GCC-based IDEs
2 Product marking
Evaluation tools marked as “ES” or “E” are not yet qualified and therefore not ready to be
used as reference design or in production. ST is not responsible for any consequences
resulting from such use. In no event will ST be liable for the customer using any of these
engineering samples tools as reference design or in production.
“E” or “ES” marking examples of location:
•On the targeted STM32 that is soldered on the board (for illustration of STM32 marking,
refer to the STM32 datasheet “Package information” paragraph at the www.st.com
website).
•Next to the evaluation tool ordering part number that is stuck or silk-screen printed on
the board.
This board features a specific STM32 device version which allows the operation of any
stack or library. This STM32 device shows a “U” marking option at the end of the standard
part number and is not available for sales.
The demonstration software, included in the STM32Cube package corresponding to onboard MCU, is preloaded in the STM32 Flash memory for easy demonstration of the device
peripherals in standalone mode. The latest versions of the demonstration source code and
associated documentation are available from www.st.com.
6 Ordering information
To order the evaluation board based on the STM32L4R9AII6 MCU, use the order code
STM32L4R9I-EVAL.
7 Delivery recommendations
Before the first use, make sure that, no damage occurred to the board during shipment and
no socketed components are loosen in their sockets or fallen into the plastic bag.
In particular, pay attention to the following components:
1.microSD card in its CN8 receptacle
2. DSI display MB1314 daughterboard in its CN16 connector
For product information related with STM32L4R9AII6 microcontroller, visit www.st.com
website.
8 Technology partners
MACRONIX: 512-Mbit Octo-SPI Flash, part number MX25LM51245GXDI00
10/87DocID030791 Rev 2
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UM2248Hardware layout and configuration
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9 Hardware layout and configuration
The STM32L4R9I-EVAL board is designed around STM32L4R9AII6 target microcontroller in
UFBGA 169-pin package.
components. Figure 2 shows the location of main components on the evaluation board.
Figure 3, Figure 4, and Figure 5 are the three images showing the
STM32L4R9I-EVAL board top view with round DSI display, top view with TFT LCD, and
bottom view.
Figure 1. STM32L4R9I-EVAL hardware block diagram
Figure 1 illustrates STM32L4R9AII6 connections with peripheral
ST-LINK/V2-1 facility for debug and flashing of STM32L4R9AII6, is integrated on the
STM32L4R9I-EVAL board.
Compared to ST-LINK/V2 stand-alone tool available from STMicroelectronics, ST-LINK/V21 offers new features and drops some others.
New features:
•USB software re-enumeration
•Virtual COM port interface on USB
•Mass storage interface on USB
•USB power management request for more than 100mA power on USB
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Features dropped:
•SWIM interface
The USB connector CN21 is usable to power STM32L4R9I-EVAL regardless of the
ST-LINK/V2-1 facility use for debugging or for flashing STM32L4R9AII6. This holds also
when ST-LINK/V2 stand-alone tool is connected to CN12 or CN17 or CN11 or CN15
connector and used for debugging or flashing STM32L4R9AII6. Section 9.5 provides more
detail on powering STM32L4R9I-EVAL.
For full detail on both versions of the debug and flashing tool, the stand-alone ST-LINK/V2
and the embedded ST-LINK/V2-1, refer to www.st.com.
9.3.1 Drivers
Before connecting STM32L4R9I-EVAL to a Windows (XP, 7, 8 10) PC via USB, a driver for
ST-LINK/V2-1 must be installed. It is available from www.st.com.
In case the STM32L4R9I-EVAL board is connected to the PC before installing the driver, the
Windows device manager may report some USB devices found on STM32L4R9I-EVAL as
“Unknown”. To recover from this situation, after installing the dedicated driver downloaded
from www.st.com, the association of “Unknown” USB devices found on STM32L4R9I-EVAL
to this dedicated driver must be updated in the device manager manually. It is recommended
to proceed using USB Composite Device line, as shown in
Figure 8.
Figure 8. USB composite device
9.3.2 ST-LINK/V2-1 firmware upgrade
For its own operation, ST-LINK/V2-1 employs a dedicated MCU with Flash memory. Its
firmware determines ST-LINK/V2-1 functionality and performance. The firmware may evolve
during the life span of STM32L4R9I-EVAL to include new functionality, fix bugs or support
new target microcontroller families. It is therefore recommended to keep ST-LINK/V2-1
firmware up to date. The latest version is available from www.st.com.
9.4 ETM trace
The connector CN12 is available to output trace signals used for debug. By default, the
evaluation board is configured such that, STM32L4R9AII6 signals PE2, PE5 and PE6 are
not connected to trace outputs Trace_CK, Trace_D2, and Trace_D3 of CN12. They are
used for other functions.
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Tabl e 1 shows the setting of configuration elements to shunt PE2, PE5 and PE6 MCU ports
to CN12 connector, to use them as debug trace signals.
Table 1. Setting of configuration elements for trace connector CN12
ElementSettingConfiguration
R53
SB56
R209
SB59
R211
SB60
SB56 open
SB56 closed
SB59 open
R209 out
SB59 closed
SB60 open
R211 out
SB60 closed
Warning: Enabling the CN12 trace outputs through hardware modifications described in
Tabl e 1 results in reducing the memory address bus width to 20 address lines and so the
addressable space to 1 Mwords of 16 bits. As a consequence, the on-board SRAM and
NOR Flash memory usable capacity is reduced to 16 Mbits.
9.5 Power Supply
The STM32L4R9I-EVAL board is designed to be powered from 5 V DC power source. It
incorporates a precise polymer Zener diode (Poly-Zen) protecting the board from damage
due to wrong power supply. One of the following four 5
appropriate board configuration:
•Power jack CN18, marked PSU_DC5V on the board. A jumper must be placed in E5V
location of JP11. The positive pole is on the center pin as illustrated in Figure 20.
•Micro-B USB receptacle CN21 of ST-LINK/V2-1, provides up to 500mA to the board.
Offering enumeration feature described in Section 9.5.1.
•Micro-AB USB receptacle CN3 of USB OTG interface, marked USB OTG_FS on the
board, supplies up to 500mA to the board.
•Pin 39 of CN5 and Pin 39 of CN6 extension connectors for custom daughterboard,
marked D5V on the board.
R53 in
R53 out
R209 in
R211 in
Default setting.
PE2 connected to memory address line A23.
PE2 connected to Trace_CK on CN12. A23 pulled down.
Default setting.
PE5 connected to memory address line A21.
PE5 connected to Trace_D2 on CN12. A21 pulled down.
Default setting.
PE6 connected to memory address line A22.
PE6 connected to Trace_D3 on CN12. A22 pulled down.
V DC power inputs is usable with an
No external power supply is provided with the board.
LD7 red LED turns on when the voltage on the power line marked as +5 V is present. All
supply lines required for the operation of the components on STM32L4R9I-EVAL are
derived from that +5
V line.
Table 2 describes the setting of all jumpers related with powering STM32L4R9I-EVAL and
extension board. VDD_MCU is STM32L4R9AII6 digital supply voltage line. It is possible to
drive the boards with either fixed 3.3
RV3 potentiometer and producing a range of voltages between 1.71
V or with an adjustable voltage regulator controlled by
V and 3.6 V.
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9.5.1 Supplying the board through ST-LINK/V2-1 USB port
To power STM32L4R9I-EVAL in this way, the USB host (a PC) gets connected with the
STM32L4R9I-EVAL board’s Micro-B USB receptacle, via a USB cable. This event starts the
USB enumeration procedure. In its initial phase, the host’s USB port current supply
capability is limited to 100 mA. It is enough because only ST-LINK/V2-1 part of
STM32L4R9I-EVAL draws power at that time. If the solder bridge SB33 is open, the U22
ST890 power switch is set to OFF position, which isolates the remainder of STM32L4R9IEVAL from the power source. In the next phase of the enumeration procedure, the host PC
informs the ST-LINK/V2-1 facility of its capability to supply up to 300 mA of current. If the
answer is positive, the ST-LINK/V2-1 sets the U22 ST890 switch to ON position to supply
power to the remainder of the STM32L4R9I-EVAL board. If the PC USB port is not capable
of supplying up to 300 mA of current, the CN18 power jack is available to supply the board.
Should a short-circuit occur on the board, the ST890 power switch protects the USB port of
the host PC against a current demand exceeding 600 mA, In such an event, the LD8 LED
lights on.
The STM32L4R9I-EVAL board is also supply-able from a USB power source not supporting
enumeration, such as a USB charger, as shown in
power switch ON regardless of enumeration procedure result and passes the power
unconditionally to the board.
The LD7 red LED turns on whenever the whole board is powered.
Table 2. ST-LINK/V2-1 turns the ST890
9.5.2 Using ST-LINK/2-1 along with powering through CN18 power jack
If the board requires more than 300 mA of supply current, this cannot be provided by host
PC connected to ST-LINK/2-1 USB port, used for debugging or flashing STM32L4R9AII6. In
such a case, the board is supplied through CN18 (marked PSU_DC5V on the board).
To do this, it is important to power the board before connecting it with the host PC, which
requires the following sequence to be respected:
1.Set the jumper in JP11 header in E5V position
2. Connect the external 5 V power source to CN18
3. Check the red LED LD7 is turned on
4. Connect host PC to USB connector CN21
In case the board demands more than 300 mA and the host PC is connected via USB
before the board is powered from CN18, there is a risk of the following events to occur, in
the order of severity:
1.The host PC is capable of supplying 300 mA (the enumeration succeeds) but it does
not incorporate any over-current protection on its USB port. It is damaged due to overcurrent.
2. The host PC is capable of supplying 300 mA (the enumeration succeeds) and it has a
built-in over-current protection on its USB port, limiting or shutting down the power out
of its USB port when the excessive current demand from STM32L4R9I-EVAL is
detected. This causes an operating failure to STM32L4R9I-EVAL.
3. The host PC is not capable of supplying 300 mA (the enumeration fails) so ST-LINK/V21 does not supply the remainder of STM32L4R9I-EVAL from its USB port VBUS line.
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(9
89
67ON'9
(9
89
67ON'9
(9
89
67ON'9
(9
89
67ON'9
(9
89
67ON'9
Jumper /
solder
bridge
JP11
Power
source
selector
JP8
Vbat
connection
JP10
VDD_MCU
connection
JP1
VDD_USB
connection
Table 2. Power supply related jumpers settings
SettingConfiguration
STM32L4R9I-EVAL is supplied through CN18 power jack
(marked PSU_DC5V). CN5 and CN6 extension connectors
do not pass the 5 V of STM32L4R9I-EVAL to
daughterboard.
STM32L4R9I-EVAL is supplied through CN3 Micro-AB USB
connector. CN5 and CN6 extension connectors do not pass
the 5 V of STM32L4R9I-EVAL to daughterboard.
Default setting.
STM32L4R9I-EVAL is supplied through CN21 Micro-B USB
connector. CN5 and CN6 extension connectors do not pass
the 5 V of STM32L4R9I-EVAL to daughterboard.
STM32L4R9I-EVAL is supplied through pin 39 of CN5 and
pin 39 of CN6 extension connectors.
STM32L4R9I-EVAL is supplied through CN18 power jack.
CN5 and CN6 extension connectors pass the 5 V of
STM32L4R9I-EVAL to daughterboard. Make sure to
disconnect from the daughterboard, any power supply that
may generate conflict with the power supply on CN18 power
jack.
Vbat is connected to battery.
Default setting.
Vbat is connected to VDD.
Default setting.
VDD_MCU (VDD terminals of STM32L4R9AII6) is
connected to fixed +3.3 V.
VDD_MCU is connected to voltage in the range from
+1.71 V to +3.6 V, adjustable with potentiometer RV3.
Default setting.
VDD_USB (VDDUSB terminal of STM32L4R9AII6) is
connected with VDD_MCU.
VDD_USB is connected to +3.3 V.
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Table 2. Power supply related jumpers settings (continued)
Jumper /
solder
bridge
JP2
VDDA
connection
SettingConfiguration
Default setting.
VDDA terminal of STM32L4R9AII6 is connected with
VDD_MCU.
VDDA terminal of STM32L4R9AII6 is connected to +3.3 V.
JP3
VDD_IO
connection
SB33
SB33 Off
Powering
through
USB of ST-
LINK/V2-1
SB33 On
1. On all ST-LINK/V2-1 boards, the target application is now able to run even if the STLINK/V2-1 is either not
connected to an USB host, or is powered through a USB charger (or through a not-enumerating USB host).
9.6 Clock references
Two clock references are available on STM32L4R9I-EVAL for STM32L4R9AII6
microcontroller.
•32.768 kHz crystal X1, for embedded RTC
•25 MHz crystal X2, for mail clock generator
Default setting.
VDD_IO (VDDIO2 terminals of STM32L4R9AII6) is
connected with VDD_MCU.
VDD_IO is open.
Default setting.
Micro-B USB connector CN21 of ST-LINK/V2-1 is usable to
supply power to the STM32L4R9I-EVAL board remainder,
depending on host PC USB port’s powering capability
declared in the enumeration.
Micro-B USB connector CN21 of ST-LINK/V2-1 supplies
power to the STM32L4R9I-EVAL board remainder. Setting
for powering the board through CN21 using USB charger.
(1)
The main clock generation is possible via an internal RC oscillator, disconnected by removing
resistors R61 and R65 when internal RC clock is used.
Solder
bridge
SB50
22/87DocID030791 Rev 2
Table 3. X1 crystal related solder bridge settings
SettingConfiguration
Default setting.
Open
Closed
PC14 OSC32_IN terminal is not routed to extension connector
CN5. X1 is used as clock reference.
PC14 OSC32_IN is routed to extension connector CN5. Resistor
R50 must be removed, for X1 quartz circuit not to disturb clock
reference or source on daughterboard.
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UM2248Hardware layout and configuration
Table 3. X1 crystal related solder bridge settings (continued)
Solder
bridge
SB49
Solder
bridge
SB52
SB53
SettingConfiguration
Default setting.
Open
Closed
PC15 OSC32_OUT terminal is not routed to extension connector
CN5. X1 is used as clock reference.
PC15 OSC32_OUT is routed to extension connector CN5. Resistor
R49 must be removed, for X1 quartz circuit not to disturb clock
reference on daughterboard.
Table 4. X2 crystal related solder bridge settings
SettingConfiguration
Default setting.
Open
Closed
Open
Closed
PH0 OSC_IN terminal is not routed to extension connector CN5. X2
is used as clock reference.
PH0 OSC_IN is routed to extension connector CN5. Resistor R61
must be removed, in order not to disturb clock reference or source
on daughterboard.
Default setting.
PH1 OSC_OUT terminal is not routed to extension connector CN5.
X2 is used as clock reference.
PH1 OSC_OUT is routed to extension connector CN5. Resistor
R65 must be removed, in order not to disturb clock reference or
source on daughterboard.
9.7 Reset sources
The reset signal of STM32L4R9I-EVAL board is active low.
•reset through extension connector CN6 pin 27 (reset from daughterboard)
•embedded ST-LINK/V2-1
9.8 Boot option
After reset, the STM32L4R9AII6 MCU boot is available from the following embedded
memory locations:
•main (user, non-protected) Flash memory
•system (protected) Flash memory
•RAM, for debugging
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!
!
The boot option is configured by setting switch SW1 (BOOT) and the boot base address
programmed in the nBOOT1, nBOOT0 and nSWBOOT0 of FLASH_OPTR option bytes.
Switch SettingDescription
SW1
Table 5. Boot selection switch
Default setting.
BOOT0 line is tied low. STM32L4R9AII6 boots from main Flash
memory or system memory.
BOOT0 line is tied high. STM32L4R9AII6 boots from system Flash
memory (nBOOT1 bit of FLASH_OPTR register is set high) or from
RAM (nBOOT1 is set low).
9.8.1 Bootloader limitations
Boot from system Flash memory results in executing bootloader code stored in the system
Flash memory protected against writing and erasing. This allows in-system programming
(ISP), that is, flashing the STM32 user Flash memory. It also allows writing data into RAM.
The data come in via one of communication interfaces such as USART, SPI, I2C bus, USB
or CAN.
Bootloader version is identified by reading the Bootloader ID at the address 0x1FFF6FFE:
the content is 0x91 for bootloader V9.1 and 0x92 for V9.2.
The STM32L4R9AII6 part soldered on the STM32L4R9I-EVAL main board is marked with a
date code corresponding to its date of manufacturing. STM32L4R9AII6 parts with a date
code prior or equal to week 37 of 2017 are fitted with bootloader V9.1 affected by the
limitations to be worked around, as described hereunder. Parts with the date code starting
from week 38 of 2017 contain bootloader V9.2 in which the limitations no longer exist.
To locate the visual date code information on the STM32L4R9II6 package, refer to its
datasheet (DS12023) available at www.st.com, section Package Information. Date code
related portion of the package marking takes Y WW format, where Y is the last digit of the
year and WW is the week. For example, a part manufactured in week 38 of 2017 bares the
date code 7 38.
There is also another mean to identify the need for workaround: before opening the blister of
the Discovery Kit, just check the back side of the blister. At the bottom left side, if the
reference number is equal or higher than 32L4R9IDISCO/ 02-0, it means the bootloader
version is V9.2 and there is no need to apply workaround. Any other inferior number like
01-0 will need the workaround.
Bootloader ID for the bootloader V9.1 is 0x91.
The following limitation exists in the bootloader V9.1:
Some user Flash memory data get corrupted when written via SPI interface
Description:
During bootloader SPI Write Flash operation, some random 64-bits (2 double-words) may
be left blank at 0xFF
Workarounds:
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UM2248Hardware layout and configuration
WA1: add a delay between sending Write command and its ACK request. Its duration
should be the duration of the 256-Byte Flash write time.
WA2: read back after each write operation (256 bytes or at end of user code flashing) and in
case of error start write again.
WA3: Using bootloader, load a patch code in RAM to write in Flash memory through same
Write Memory write protocol as bootloader (code provided by ST). The patch code is
available for download from www.st.com website with a readme.txt file containing usage
instructions.
9.9 Audio
A codec connected to STM32L4R9AII6 SAI interface supports DSAI port TDM feature. This
offers STM32L4R9AII6 the capability to simultaneously stream two independent stereo
audio channels to two separate stereo analog audio outputs.
There are two digital microphones on STM32L4R9I-EVAL board.
9.9.1 Digital microphones
U30 and U31 on STM32L4R9I-EVAL board are MP34DT01TR MEMS digital omnidirectional
microphones providing PDM (pulse density modulation) outputs. To share the same data
line, their outputs are interlaced. The combined data output of the microphones is directly
routed to STM32L4R9AII6 terminals, thanks to the integrated input digital filters. The
microphones are supplied with programmable clock generated directly by STM32L4R9AII6.
As an option, the microphones is connected to U26, Wolfson audio codec device, WM8994.
In that configuration, U26 also supplies the PDM clock to the microphones.
Regardless of where the microphones are routed to, STM32L4R9AII6 or WM8994, their
power supplier is either VDD or MICBIAS1 output of the WM8994 codec device.
Tabl e 6 shows settings of all jumpers associated with the digital microphones on the board.
JumperSettingConfiguration
JP16
JP15
Table 6. Digital microphone-related jumper settings
PDM clock for digital microphones comes from WM8994 codec.
Default setting.
PDM clock for digital microphones comes from STM32L4R9AII6.
Power supply of digital microphones is generated by WM8994
codec.
Default setting.
Power supply of digital microphones is V
DD
.
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9.9.2 Headphones outputs
The STM32L4R9I-EVAL board potentially drives two sets of stereo headphones. Identical or
different stereo audio content are played back in each set of headphones. STM32L4R9AII6
sends up to two independent stereo audio channels, via its SAI1 TDM port, to the WM8994
codec device. The codec device converts the digital audio stream to stereo analog signals. It
then boosts them for direct drive of headphones connecting to 3.5
on the board, CN24 for Audio-output1 and CN23 for Audio_output2.
The CN23 jack takes its signal from the output of the WM8994 codec device intended for
driving an amplifier for loudspeakers. A hardware adaptation is incorporated on the board to
make it compatible with a direct headphone drive. The adaptation consists of coupling
capacitors blocking the DC component of the signal, attenuator and anti-pop resistors. The
loudspeaker output of the WM8994 codec device must be configured by software in linear
mode called “class AB” and not in switching mode called “class D”.
The I²C-bus address of WM8994 is 0b0011 010x.
mm stereo jack receptacles
9.9.3 Limitations in using audio features
Due to the share of some terminals of STM32L4R9AII6 by multiple peripherals, the following
limitations apply in using the audio features:
•If the SAI1_MCLKA and SAI1_FSA are used as part of SAI1 port, it cannot be used as
CAN peripheral.
•If the SAI1_SDB is used as part of SAI1 port, it cannot be used as Comp2_OUT signal.
•If the SAI1 port of STM32L4R9AII6 is used for streaming audio to the WM8994 codec
IC, STM32L4R9AII6 cannot control the motor.
•If the digital microphones are attached to STM32L4R9AII6, control the motor cannot be
driven.
9.10 USB OTG FS port
The STM32L4R9I-EVAL board supports USB OTG full-speed (FS) communication. The
USB OTG connector CN3 is Micro-AB type.
9.10.1 STM32L4R9I-EVAL used as USB device
When a “USB host” connection to the CN3 Micro-AB USB connector of STM32L4R9I-EVAL
is detected, the board starts behaving as “USB device”. Depending on the powering
capability of the USB host, the board potentially takes power from VBUS terminal of CN3. In
the board schematic diagrams, the corresponding power voltage line is called U5V.
Section 9.5 provides information on how to set associated jumpers for this powering option.
The resistor R23 must be left open to prevent STM32L4R9I-EVAL from sourcing 5 V to VBUS
terminal, which would cause conflict with the 5
if the MFX_GPIO6 is controlled by the software of the MFX MCU such that, it enables the
output of U2 power switch.
9.10.2 STM32L4R9I-EVAL used as USB host
When a “USB device” connection to the CN3 Micro-AB USB connector is detected, the
STM32L4R9I-EVAL board starts behaving as “USB host”. It sources 5
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V sourced by the USB host. This may happen
V on the VBUS
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UM2248Hardware layout and configuration
terminal of CN3 Micro-AB USB connector to power the USB device. For this to happen, the
STM32L4R9AII6 sets the U2 power switch STMPS2151STR to ON state. The LD6 green
LED marked OTG_FS indicates that the peripheral is supplied from the board. The LD5 red
LED marked FS_OC lights up if over-current is detected. The resistor R23 must be closed to
allow the MFX_GPIO6 from MFX MCU to control the U2 power switch.
In any other STM32L4R9I-EVALpowering option, the resistor R23 must be open, to avoid
accidental damage caused to an external USB host.
9.10.3 Limitations in using USB OTG FS port
The USB OTG FS port operation is exclusive with motor control
9.10.4 Operating voltage
The USB-related operating supply voltage of STM32L4R9AII6 (VDD_USB line) must be within
the range from 3.0
V to 3.6 V.
9.11 RS232 port
The STM32L4R9I-EVAL board offers one RS-232 communication port. The RS-232
communication port uses the DB9 male connector CN7. RX, TX, RTS and CTS signals of
LPUSART1 port of STM32L4R9AII6 are routed to CN7.
9.11.1 Operating voltage
The RS-232 operating supply voltage of STM32L4R9AII6 (VDD line) must be within the range
from 1.71
V to 3.6 V.
9.12 microSD card
The CN8 slot for microSD card is routed to STM32L4R9AII6 SDIO port, accepting SD (up to
2
Gbytes) and SDHC (up to 32 Gbytes) cards. One 8-Gbyte microSD card is delivered as part
of STM32L4R9I-EVAL. The card insertion switch is routed to the MFX_GPIO5 of MFX MCU
port.
9.12.1 Limitations
Due to the share of SDIO port, the following limitations apply:
•The microSD card cannot be operated simultaneously with motor control.
•The microSD card cannot be operated for 4 bits date when SDIO_D1 and SDIO_D2
used as Trace_D0 and Trace_D1 signals.
9.12.2 Operating voltage
The supply voltage for STM32L4R9I-EVAL microSD card operation must be within the range
from 2.7
V to 3.6 V.
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9.13 Motor control
The CN1 connector is designed to receive a motor-control (MC) module. Table 7 shows the
assignment of CN1 and STM32L4R9AII6 terminals.
Table 7 also lists the modifications to be made on the board versus its by-default
configuration. See Section 9.13.1 for further details.
Table 7. Motor-control terminal and function assignment
Motor-control
connector CN1
Ter min al
1
2GND- GND --
3PWM_1H PC6TIM8_CH1-
4GND- GND --
5PWM_1LPH13 TIM8_CH1N-
6GND- GND --
7PWM_2HPC7TIM8_CH2-
8GND- GND --
9PWM_2LPH14 TIM8_CH2N-
10GND-GND--
Terminal
name
Emergency
Stop
Port
name
PI4 TIM8_BKIN-
STM32L4R9AII6 microcontroller
Function
Alternate
function
Close SB3.
Remove R234.
Close SB21.
Remove R44 or no
daughterboard.
Close SB46.
Remove R186.
Close SB19.
Open SB20.
Remove R46 or no
daughterboard.
Close SB44.
Remove R185.
Board modifications for
enabling motor control
11PWM_3HPC8TIM8_CH3-
12GND-GND--
13PWM_3LPH15 TIM8_CH3N-
14Bus VoltagePC4ADC1_IN13-
15
16
28/87DocID030791 Rev 2
PhaseA
current+
PhaseA
current-
PC0ADC1_IN1-
-GND --
Close SB2.
Remove R195.
Close SB45.
Remove R184.
Close SB55.
Remove R75.
Close SB36.
Remove R242.
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UM2248Hardware layout and configuration
Table 7. Motor-control terminal and function assignment (continued)
Motor-control
connector CN1
Ter min al
17
18
19
20
Terminal
name
PhaseB
current+
PhaseB
current-
PhaseC
current+
PhaseC
current-
Port
name
PC1ADC1_IN2-
-GND --
PC2ADC1_IN3-
-GND --
STM32L4R9AII6 microcontroller
Function
Alternate
function
21ICL ShutoutPG9GPIO-
22GND-GND--
23
24
Dissipative
Brake
PFC ind.
curr.
PG13GPIO-
PA0ADC1_IN5-
25+5V-+5V--
Board modifications for
enabling motor control
Close SB37.
Remove R244.
Close SB43.
Remove R217.
Close SB34.
Remove R236.
Close SB47.
Remove SB29 and no board
on PMOD connector.
Close SB38
Remove R214 and SB39
26
Heatsink
Te mp .
PA1ADC1_IN6-
27PFC SyncPB14TIM15_CH1-
28+3.3V-+3.3V--
29PFC PWMPB15TIM15_CH2-
30
PFC
Shutdown
PA9TIM15_BKIN-
31Encoder APB6TIM4_CH1ADC12_IN
32PFC VacPC3ADC1_IN4-
Close SB40.
Remove R216.
Close SB41.
Remove R207 and no board
on PMOD connector.
Close SB51.
Remove R187.
Close SB35.
Remove R203.
Close SB14.
Remove SB15 and SB16.
Remove R26 or no
daughterboard.
Close SB54.
Remove R67.
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Table 7. Motor-control terminal and function assignment (continued)
Motor-control
connector CN1
Ter min al
33Encoder BPB7TIM4_CH2ADC12_IN
34
Terminal
name
Encoder
Index
Port
name
PB8TIM4_CH3ADC12_IN
STM32L4R9AII6 microcontroller
Function
Alternate
function
9.13.1 Board modifications to enable motor control
Figure 9 (top side) and Figure 10 (bottom side) illustrate the board modifications listed in
Table 7, required for the operation of motor control. Red color denotes a component to be
removed. Green color denotes a component to be fitted.
9.13.2 Limitations
Motor-control operation is exclusive with Octo-SPIP1 Flash memory device, audio codec,
potentiometer, LDR, microSD card, LED1 to LED4 drive, MEMS, MFX, PMOD, USB
OTG_FS, TFT LCD connector, DSI display connector and touch sensing.
Board modifications for
enabling motor control
Close SB17.
Remove SB18.
Remove R30 or no
daughterboard.
Close SB42.
Remove R235 and open JP12.
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Figure 9. PCB top-side rework for motor control
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Figure 10. PCB bottom-side rework for motor control
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UM2248Hardware layout and configuration
9.14 CAN
The STM32L4R9I-EVAL board supports one CAN2.0A/B channel compliant with CAN
specification. The CN22 DB9 male connector is available as CAN interface.
A 3.3 V CAN transceiver is fitted between the CN22 connector and the CAN controller port
of STM32L4R9AII6.
The JP14 jumper selects one of high-speed, standby and slope control modes of the CAN
transceiver. The JP13 jumper allows to integrate a CAN termination resistor. The JP12 is used
to connected CAN transceiver avoiding unknown signals from CAN transceiver.
JumperSettingConfiguration
JP14
Table 8. CAN related jumpers
Default setting.
CAN transceiver operates in high-speed mode.
CAN transceiver is in standby mode.
JP13
JP12
9.14.1 Limitations
CAN operation is exclusive with Audio codex and MC operation.
9.14.2 Operating voltage
The supply voltage for STM32L4R9I-EVAL CAN operation must be within the range from
3.0
V to 3.6 V.
Default setting.
Termination resistor fitted on CAN physical link.
No termination resistor on CAN physical link.
Default setting.
CAN_TX is not used for CAN transceiver.
CAN_TX is used from STM32L4R9AII6 termina.l
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9.15 Extension connectors CN5, CN6, CN13 and CN14
The CN5, CN6, CN13 and CN14 headers complement to give access to all GPIOs of the
STM32L4R9AII6 microcontroller. In addition to GPIOs, the following signals and power
supply lines are also routed on CN5 or CN6 or CN13 or CN14:
Each header has two rows of 20 pins, with 1.27 mm pitch and 2.54 mm row spacing. For
extension modules, SAMTEC RSM-120-02-L-D-xxx and SMS-120-x-x-D are recommendable
as SMD and through-hole receptacles, respectively (x is a wild card).
9.16 User LEDs
Four general-purpose color LEDs (LD1, LD2, LD3, LD4) are available as light indicators.
Each LED is in light-emitting state with low level of the corresponding ports of
STM32L4R9AII6.
And the four LEDs are exclusive with MC operation.
9.17 Physical input devices
The STM32L4R9I-EVAL board provides a number of input devices for physical human
control, listed below:
•four-way joystick controller with select key (B1)
•wake-up/ tamper button (B3)
•reset button (B2)
•10 kΩ potentiometer (RV2)
•light-dependent resistor, LDR (R121)
The potentiometer and the light-dependent resistor are mutually exclusively rout-able to either
PB4 or to PA0 port of STM32L4R9AII6.
jumpers.
As illustrated in the schematic diagram in Figure 30, the PB4 port is routed, in the
STM32L4R9AII6, to the non-inverting input of comparator Comp2. The PA0 is routed to noninverting input of operational amplifier OpAmp1.
Table 9 depicts the setting of associated configuration
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UM2248Hardware layout and configuration
Table 9. Port assignment for control of physical input devices
JumperSettingRouting
JP9
Potentiometer is routed to pin PB4 o fSTM32L4R9AII6.
JP5
JP9
Default setting.
Potentiometer is routed to pin PA0 of STM32L4R9AII6.
JP5
JP9
LDR is routed to pin PB4 of STM32L4R9AII6.
JP5
JP9
LDR is routed to pin PA0 of STM32L4R9AII6.
JP5
9.17.1 Limitations
The potentiometer and the light-dependent resistor are exclusive with MFX, Audio codex,
OctoSPIP1, Debugging connector and MC operation. They are mutually exclusive.
9.18 Operational amplifier and comparator
9.18.1 Operational amplifier
STM32L4R9AII6 provides two on-board operational amplifiers, one of which, OpAmp1, is
made accessible on STM32L4R9I-EVAL. OpAmp1 has its inputs and its output routed to I/O
ports PA0, PA1 and PA3, respectively. The non-inverting input PA0 is accessible on the
terminal 1 of the JP5 jumper header. On top of the possibility of routing either of the
potentiometer or LDR to PA0, an external source is also connectible to it, using the terminal
1 of JP5.
The PA3 output of the operational amplifier is accessible on test point TP9. Refer to the
schematic diagram in
The gain of OpAmp1 is determined by the ratio of the variable resistor RV1 and the resistor
R246, as shown in the following equation:
Gain = 1 + RV1 / R246
With the RV1 ranging from 0 to 10 kΩ and R246 being 1 kΩ, the gain varies from 1 to 11.
Figure 30.
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The R108 resistor in series with PA0 is beneficial for reducing the output offset.
Table 10 shows the configuration elements and their settings allowing to access the OpAmp1
function.
ElementSettingConfiguration
SB39
SB38
R214
Table 10. Configuration elements related with OpAmp1
SB38 open
SB39 closed
R214 out
SB38 open
SB39 closed
R214 in
SB38 closed
SB39 open
R214 out
OpAmp1_INP is routed to pin PA0 of STM32L4R9AII6.
Default setting.
PA0 port of STM32L4R9AII6 is routed to MFX_IRQ_OUT or
motor control signal.
PA0 port of STM32L4R9AII6 is routed to motor control signal.
R216
SB40
R215
R221
9.18.2 Comparator
STM32L4R9AII6 provides two on-board comparators, one of which, Comp2, is made
accessible on STM32L4R9I-EVAL. Comp2 has its non-inverting input and its output routed
to I/O ports PB4 and PB5, respectively. The input is accessible on the terminal 3 of the JP5
jumper header. On top of the possibility of routing either the potentiometer or LDR to PB4,
an external source is connectible to it, using the terminal 3 of JP5.
The PB5 output of the comparator is accessible on test point TP6. Refer to the schematic
diagram in
Table 11 shows the configuration elements and their settings allowing to access the Comp2
function.
Figure 30.
R216 in
SB40 open
R216 out
SB40 closed
R215 in
R221 out
R215 out
R221 in
Default setting.
OpAmp1_INM is routed to pin PA1 of STM32L4R9AII6.
PA1 port of STM32L4R9AII6 is routed to motor control signal.
OpAmp1_VOUT is routed to pin PA3 of STM32L4R9AII6.
Default setting.
OpAmp1_VOUT is not routed to pin PA3 of STM32L4R9AII6. PA3
port of STM32L4R9AII6 is routed to OctoSPI1_CLK.
Table 11. Configuration elements related with Comp2
ElementSettingConfiguration
R200 out
R200
SB22
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SB22 closed
R200 in
SB22 open
Default setting.
Comp2_INP is routed to pin PB4 of STM32L4R9AII6.
PB4 port of STM32L4R9AII6 is routed to TRST signal.
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UM2248Hardware layout and configuration
Table 11. Configuration elements related with Comp2 (continued)
ElementSettingConfiguration
R204
SB48
R204 out
SB48 open
R204 in
SB48 closed
Comp2_OUT is routed to pin PB5 of STM32L4R9AII6.
Default setting.
Comp2_OUT is not routed to pin PB4 of STM32L4R9AII6. PB4
port of STM32L4R9AII6 is routed to SAI1_SDB.
9.18.3 Limitations
The OpAmp1 is exclusive with MFX, OctoSPIP1, and MC operation.
The Comp2 is exclusive with Debugging connector and SAI1.
9.19 Analog input, output, VREF
STM32L4R9AII6 provides on-board analog-to-digital converter, ADC and digital-to-analog
converter, DAC. The port PA4 is configurable to operate either as ADC input or as DAC
output. PA4 is routed to the two-way header CN4 allowing to fetch signals to or from PA4 or
to ground it by fitting a jumper into CN4.
Parameters of the ADC input low-pass filter formed with R31 and C21 are adjustable by
replacing these components according to application requirements. Similarly, parameters of
the DAC output low-pass filter formed with R32 and C21 are modifiable by replacing these
components according to application requirements.
The VREF+ terminal of STM32L4R9AII6 is used as reference voltage for both ADC and
DAC. By default, it is routed to VDDA through a jumper fitted into the two-way header CN10.
The jumper is removable and an external voltage applied to the terminal 1 of CN10, for
specific purposes.
9.20 SRAM device
IS61WV102416BLL, a 16-Mbit static RAM (SRAM), 1 M x 16 bit, is fitted on the
STM32L4R9I-EVAL main board, in U17 position. The STM32L4R9I-EVAL main board, as well
as the addressing capabilities of FMC, allow hosting SRAM devices up to 64
the reason why the schematic diagram in
The SRAM device is attached to the 16-bit data bus and accessed with FMC. The base
address is 0x6000
selected with FMC_NE1 chip select. FMC_NBL0 and FMC_NBL1 signals allow selecting
8-bit and 16-bit data word operating modes.
By removal of R134, a zero-ohm resistor, the SRAM is deselected and the STM32L4R9AII6
ports PD7, PE0 and PE1 corresponding to FMC_NE1, FMC_NBL0 and FMC_NBL1 signals,
respectively, are usable for other application purposes.
Mbytes. This is
Figure 26 mentions several SRAM devices.
0000, corresponding to NOR/SRAM1 bank1. The SRAM device is
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.
Table 12. SRAM chip select configuration
ResistorFittingConfiguration
In
R134
Out
Default setting.
SRAM chip select is controlled with FMC_NE1
SRAM is deselected. FMC_NE1 is freed for other application
purposes.
9.20.1 Limitations
The SRAM addressable space is limited if some or all of A21 FMC address lines is shunted to
the CN12 connector for debug trace purposes. In such a case, the disconnected addressing
inputs of the SRAM device are pulled down by resistors.
the associated configuration elements.
9.20.2 Operating voltage
The SRAM device operating voltage is in the range from 2.4 V to 3.6 V.
9.21 NOR Flash memory device
M29W128GL70ZA6E, a 128-Mbit NOR Flash memory, 8 M x16 bit, is fitted on the
STM32L4R9I-EVAL main board, in U11 position. The STM32L4R9I-EVAL main board, as well
as the addressing capabilities of FMC, allow hosting M29W256GL70ZA6E, a 256-Mbit NOR
Flash memory device. This is the reason why the schematic diagram in
both devices.
Section 9.4 provides information on
Figure 26 mentions
The NOR Flash memory device is attached to the 16-bit data bus and accessed with FMC.
The base address is 0x6800
memory device is selected with FMC_NE3 chip select signal. 16-bit data word operation
mode is selected by a pull-up resistor connected to BYTE terminal of NOR Flash memory.
The jumper JP6 is dedicated for write protect configuration.
By default, the FMC_NWAIT signal is not routed to RB port of the NOR Flash memory device,
and, to know its ready status, its status register is polled by the demo software fitted in
STM32L4R9I-EVAL. This is modifiable with configuration elements, as shown in
JumperSettingConfiguration
JP6
9.21.1 Limitations
The NOR Flash memory device’s addressable space is limited if some or all of A21, A22 and
A23 FMC address lines are shunted to the CN12 connector for debug trace purposes. In such
0000, corresponding to NOR/SRAM2 bank1. The NOR Flash
Table 13. NOR Flash memory related jumper
Default setting.
NOR Flash memory write is enabled.
NOR Flash memory write is inhibited. Write protect is
activated.
Ta bl e 13.
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UM2248Hardware layout and configuration
a case, the disconnected addressing inputs of the NOR Flash memory device are pulled down
by resistors.
Section 9.4 provides information on the associated configuration elements.
9.21.2 Operating voltage
NOR Flash memory operating voltage must be in the range from 1.65 V to 3.6 V.
9.22 EEPROM
M24128-DFDW6TP, a 128-Kbit I²C-bus EEPROM device, is fitted on the main board of
STM32L4R9I-EVAL, in U3 position. It is accessed with I²C-bus lines I2C2_SCL and
I2C2_SDA of STM32L4R9AII6. It supports all I²C-bus modes with speeds up to 1
base I²C-bus address is 0xA0. Write-protecting the EEPROM is possible through opening
the SB13 solder bridge. By default, SB13 is closed and writing into the EEPROM enabled.
9.22.1 Operating voltage
The M24128-DFDW6TP EEPROM device’s operating voltage must be in the range from
1.7
V to 3.6 V
MHz. The
9.23 EXT_I2C connector
EXT_I2C CN2 connected to I²C bus daughterboard is possible. MFX_GPIO8 of MFX MCU
provides EXT_RSET signal, and solder bridge SB12 is used to connector +5
supply for daughterboard.
9.24 Octo-SPI Flash memory device
MX25LM51245GXDI00, a 512-Mbit Octo-SPI Flash memory device, is fitted on the
STM32L4R9I-EVAL main board, in U6 position. It allows evaluating STM32L4R9AII6
Octo-SPI interface.
MX25LM51245GXDI00 operates in single transfer rate (STR) or double transfer rate (DTR)
mode.
Ta bl e 14 shows the configuration elements and their settings allowing to access the Octo-SPI
Flash memory device.
.
Table 14. Configuration elements related with Octo-SPI Flash device
ElementSettingConfiguration
R221
R215
R221 in
R215 out
R221 out
R215 in
Default setting.
OctoSPI1_CLK is available at Octo-SPI Flash memory device.
OctoSPI1_CLK is not available at Octo-SPI Flash memory device.
PA3 port of STM32L4R9AII6 is routed to OpAmp1_Vout signal.
V power
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Table 14. Configuration elements related with Octo-SPI Flash device (continued)
ElementSettingConfiguration
Default setting.
OctoSPI1_IO6 data line is available at Octo-SPI Flash memory
device.
OctoSPI1_IO6 is not available at Octo-SPI Flash memory device.
PC3 port of SSTM32L4R9AII6 is routed to motor control signal.
Default setting.
OctoSPI1_IO7 data line is available at Octo-SPI Flash memory
device.
OctoSPI1_IO7 is not available at Octo-SPI Flash memory device.
PC4 port of STM32L4R9AII6 is routed to motor control signal.
R67
SB54
R75
SB55
R67 in
SB54 open
R67 out
SB54 closed
R75 in
SB55 open
R75 out
SB55 closed
9.24.1 Limitations
Octo-SPI Flash memory device operation is exclusive with OpAmp1 and with motor control.
9.24.2 Operating voltage
Voltage of Octo-SPI Flash memory device MX25LM51245GXDI00 is in the range of
2.7 V to 3.6 V.
9.25 Octo-SPI DRAM device
IS66WVH8M8BLL-100BLI, a 64-Mbit self-refresh dynamic RAM (DRAM) device with a
HyperBus interface, is fitted on the STM32L4R9I-EVAL main board, in U5 position. It allows
evaluating STM32L4R9AII6 Octo-SPI interface.
9.25.1 Operating voltage
Voltage of Octo-SPI DRAM device IS66WVH8M8BLL-100BLI is in the range of 2.7 V to
3.6
V.
9.26 Touch-sensing button
The STM32L4R9I-EVAL board supports a touch sensing button based on either RC
charging or on charge-transfer technique. The latter is enabled, by default.
The touch sensing button is connected to PC6 port of STM32L4R9AII6 and the related
charge capacitor is connected to PC7.
An active shield is designed in the layer 2 of the main PCB, under the button footprint. It
allows reducing disturbances from other circuits to prevent from false touch detections.
The active shield is connected to PB6 port of STM32L4R9AII6 through the resistor R22. The
related charge capacitor is connected to PB7.
Ta bl e 15 shows the configuration elements related with the touch sensing function. Some of
them serve to enable or disable its operation. However, most of them serve to optimize the
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touch sensing performance, by isolating copper tracks to avoid disturbances due to their
antenna effect.
.
ElementSettingConfiguration
Table 15. Touch-sensing-related configuration elements
In
R44
Out
Open
SB21
Closed
In
R46
Out
Open
SB19
Closed
Open
SB20
Closed
In
R26
Out
Open
SB14
Closed
SB15Open
Closed
PC6 port is routed to CN6 connector for daughterboard.
This setting is not good for robustness of touch sensing.
Default setting.
PC6 port is cut from CN6.
Default setting.
PC6 is not routed to motor control.
PC6 is routed to motor control.
This setting is not good for robustness of touch sensing.
PC7 port is routed to CN6 connector for daughterboard.
This setting is not good for robustness of touch sensing.
Default setting.
PC7 port is cut from CN6.
Default setting.
PC7 is not routed to motor control.
PC7 is routed to motor control.
This setting is not good for robustness of touch sensing.
PC7 is not routed to sampling capacitor. Touch sensing cannot
operate.
Default setting.
PC7 is routed to sampling capacitor. Touch sensing available.
PB6 port is routed to CN5 connector for daughterboard.
This setting is not good for robustness of touch sensing.
Default setting.
PB6 port is cut from CN5.
Default setting.
PB6 is not routed to motor control.
PB6 is routed to motor control.
This setting is not good for robustness of touch sensing.
PB6 is not routed to active shield under the touch sensing button.
This setting is not good for robustness of touch sensing.
Default setting.
PB6 is routed to active shield under the touch sensing button. This
setting is not good for robustness of touch sensing.
SB16
Open
Closed
Default setting.
PB6 is not routed to CN16 DSI display connector.
PB6 is routed to CN16 DSI display connector.
This setting is not good for robustness of touch sensing.
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Table 15. Touch-sensing-related configuration elements (continued)
ElementSettingConfiguration
R30
SB17
SB18
9.26.1 Limitations
Touch sensing button is exclusive with DSI display connector, motor-control and
daughterboard connector.
In
Out
Open
Closed
Open
Closed
PB7 port is routed to CN5 connector for daughterboard.
This setting is not good for robustness of touch sensing.
Default setting.
PB7 port is cut from CN5.
Default setting.
PB7 is not routed to motor control.
PB7 is routed to motor control.
This setting is not good for robustness of touch sensing.
PB7 is not routed to sampling capacitor of the active shield under the
touch sensing button.
This setting is not good for robustness of touch sensing.
Default setting.
PB6 is routed to sampling capacitor of the active shield under the
touch sensing button.
This setting is not good for robustness of touch sensing.
9.27 MFX MCU
The MFX MCU is used as MFX (multi function expander) and IDD measurement.
The MFX circuit on STM32L4R9I-EVAL board acts as IO-expander. The communication
interface between MFX and STM32L4R9AII6 is I2C2 bus. The signals connected to MFX are
listed in
Pin number
Ta bl e 16.
of MFX
15PA5MFX_GPIO5uS_DetectInputmicroSD
16PA6MFX_GPIO6USB _PSONOutputUSB_FS
17PA7MFX_GPIO7USB_OVRCRInputUSB_FS
18PB0MFX_GPIO0JOY_SELInputJoystick
19PB1MFX_GPIO1JOY_DOWNInputJoystick
20PB2MFX_GPIO2JOY_LEFTInputJoystick
26PB13MFX_GPIO13---
27PB14MFX_GPIO14---
28PB15MFX_GPIO15---
Pin name
of MFX
Table 16. MFX signals
MFX functions
Function of
STM32L4R9AII6
Direction
(for MFX)
Termi nal
device
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Table 16. MFX signals (continued)
Pin number
of MFX
Pin name
of MFX
MFX functions
29PA8MFX_GPIO8 EXT_RESETOutputEXT_I2C
30PA9MFX_GPIO9DSI_RSTOutputDSI LCD
31PA10MFX_GPIO10---
32PA11MFX_GPIO11LCD_DISPOutputTFT LCD
33PA12MFX_GPIO12LCD_RSTOutputTFT LCD
39PB3MFX_GPIO3JOY_RIGHTInputJoystick
40PB4MFX_GPIO4JOY_UPInputJoystick
9.28 IDD measurement
STM32L4R9AII6 has a built-in circuit allowing to measure its own current consumption
(IDD) in Run and Low-power modes, except for Shutdown mode. It is strongly
recommended that the MCU supply voltage (VDD_MCU line) does not exceed 3.3
because there are components on STM32L4R9I-EVAL supplied from 3.3
communicate with the MCU through I/O ports. Voltage exceeding 3.3
port may inject current into 3.3
consumption measurement.
Ta bl e 17 shows settings of jumper associated with the IDD measurement on the board.
s
Table 17. IDD measurement related jumper setting
V-supplied peripheral I/Os and false the MCU current
Function of
STM32L4R9AII6
Direction
(for MFX)
Termi nal
device
V that
V on the MCU output
V. This is
JumperSettingConfiguration
Default setting.
STM32L4R9AII6 has a built-in circuit allowing to measure its
JP4
own current consumption.
IDD measurement is not available, bypass mode only for
STM32L4R9AII6 VDD_MCU power supply.
9.29 DSI display (MIPI) connector
The CN16 connector is designed to connect DSI display daughterboard. MB1314
daughterboard is available to mount on STM32L4R9I-EVAL board.
assignment of CN16 and STM32L4R9AII6 terminals.
The DSI display module connector signal INT is used both for TFT LCD and DSI display
connector.
9.30 TFT LCD (RGB and FMC mode) connector
The 50-pin 1.27 mm-pitch female connector CN20 is designed to connect TFT LCD
daughterboard, supporting RGB and FMC modes. MB1315 daughterboard is available to
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mount on STM32L4R9I-EVAL board with RGB mode. Ta bl e 19 shows the assignment of
CN20 and STM32L4R9AII6 terminals.
.
Table 19. TFT LCD module connector CN20
Pin
No.
RGB mode
description
1GNDGND-2GNDGND-
3R0-PE24G0-PF14
5R1RS(A19)PE36G1-PF15
7R2D12PE158G2D6PE9
9R3D13PD810G3D7PE10
11R4D14PD912G4D8PE11
13R5D15PD1014G5D9PE12
15R6-PD1116G6D10PE13
17R7-PD1218G7D11PE14
19GNDGND-20GNDGND-
21B0-PE422DETEPF11
23B1-PF1324LCD_DSIP-
25B2D0PD1426HSYNC-PE0
27B3D1PD1528VSYNC-PE1
29B4D2PD030GNDGND-
31B5D3PD132PCLK-PD3
FMC mode
description
Pin
connection
Pin
No.
RGB mode
description
FMC mode
description
Pin
connection
MFX_
GPIO11
33B6D4PE734GNDGND-
35B7D5PE836RST#RST#
37GNDGND-38SDASDAPH5
39INTINTPC240SCLSCLPH4
41-RSPE242-NOEPD4
43BL_CTRLBL_CTRLPA544-NWEPD5
45BL+5 VBL+5 V-46-CSPG12
47BLGNDBLGND-48VDDVDD-
49BLGNDBLGND-50+3.3 V+3.3 V-
9.30.1 Limitations
The TFT LCD module connector supports RGB mode or FMC mode only on the same time.
The signal INT is used both for TFT LCD and DSI display connector. When RGB mode TFT
LCD used, STM32L4R9AII6 cannot access SRAM and NOR Flash memory on board.
MFX_
GPIO12
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9.31 PMOD connector
The standard PMOD connector P1 is available on STM32L4R9I-EVAL board to support
flexibility in small form factor application. The PMOD connector is implemented the PMOD
type 2A and 4A on STM32L4R9I-EVAL board.
Pin numberDescriptionPin numberDescription
1SS/CTS (PI0/PB13)7INT (PG13)
2MOSI/TXD (PI3/PG7)8RESET (PB14)
3MISO/RXD (PI2/PG8)9-
4SCK/RTS (PI1/PB12)10-
5GND11GND
63.3 V123.3 V
Table 20. PMOD connector P1
9.32 MB1314 DSI display board
MB1314 is DSI display daughterboard which are available to mount on STM32L4R9I-EVAL
board via connector CN1. GVO IEG1120TB103GF-001 is selected for round LCD with one
data lane, 390x390 resolution, 24 bpp with capacitive touch panel (FocalTech FT3x67 driver).
Ta bl e 21 shows MB1314 board connector CN1 pin function description.
Table 21. MB1314 board connector CN1 pin function description
Pin numberDescriptionPin numberDescription
1GND2 -
3DSI_CK_P4DSI_INT
5DSI_CK_N6GND
7GND8RFU
9DSI_D0_P10RFU
11DSI_D0_N12GND
13GND14RFU
15RFU16RFU
17RFU18GND
19GND20-
21BLVDD (5 V)22RFU
23BLVDD (5 V)24RFU
25-26RFU
27BLGND28RFU
29BLGND30-
31-32-
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Table 21. MB1314 board connector CN1 pin function description (continued)
Pin numberDescriptionPin numberDescription
33-34-
35RFU363.3 V
37RFU38VDD
39RFU40I2C_SDA
41-42-
43SWIRE44I2C_SCL
45RFU46-
47RFU48-
49DSI_TE50-
51-52-
53DSI_BL_CTRL54-
55-56-
57DSI_RST58-
59-60RFU
Warning:Permanent Image sticking may occur if AMOLED displays
same image for an extended period of time.
9.33 MB1315 TFT LCD board
MB1315 is TFT LCD daughterboard supporting RGB mode, available to mount on
STM32L4R9I-EVAL board via connector CN1.
The 4.3” TFT LCD is used LCD RK043FN48H-CT672B with capacitive touch panel which only
supports 3.3
TFT RGB LCD daughterboard to support wide power supply range.
board connector CN1 pin function description.
Pin numberDescriptionPin numberDescription
V power and interface. So a level shifter SN74LVC16T245DGGR is requested on
Table 22. MB1315 board connector CN1 pin function description
1GND2GND
3R04G0
5R16G1
7R28G2
9R310G3
Ta bl e 22 shows MB1315
11R412G4
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Table 22. MB1315 board connector CN1 pin function description (continued)
Pin numberDescriptionPin numberDescription
13R514G5
15R616G6
17R718G7
19GND20GND
21B022DE
23B124LCD_DSIP
25B226HSYNC
27B328VSYNC
29B430GND
31B532PCLK
33B634GND
35B736RST#
37GND38SDA
39INT40SCL
41-42-
43BL_CTRL44-
45BL+5 V46-
47BLGND48VDD
49BLGND50+3.3 V
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UM2248Connectors
06Y9
10 Connectors
10.1 Motor-control connector CN1
Figure 11. Motor-control connector CN1 (top view)
Description
Emergency STOP PI412-GND
PWM_1HPC634-GND
PWM_1LPH1356-GND
PWM_2HPC778-GND
PWM_2LPH14910-GND
PWM_3HPC81112-GND
PWM_3LPH151314PC4BUS VOLTAGE
CURRENT APC01516-GND
CURRENT BPC11718-GND
CURRENT CPC21920-GND
ICL ShutoutPG92122-GND
DISSIPATIVE
BRAKE
+5 V power-2526PA1
PFC SYNCPB142728-3.3 V power
Table 23. Motor-control connector CN1
Pin of
STM32L4R9AII6
PG132324PA0PCD Ind. Current
Pin
number
of CN1
Pin
number
of CN1
Pin of
STM32L4R9AII6
Description
Heatsink
temperature
PFC PWMPB152930PA9PFC Shut Down
Encoder APB63132PC3PFC Vac
Encoder BPB73334PB8Encoder Index
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ConnectorsUM2248
069
10.2 External I2C connector CN2
Figure 12. EXT_I2C connector CN2 (front view)
Pin numberDescriptionPin numberDescription
1I2C1_SDA (PH5)5VDD
2NC6NC
3I2C_SCL (PH4)7GND
4EXT_RESET (MFX_GPIO8)8NC
Table 24. EXT_I2C connector CN2
10.3 USB OTG FS Micro-AB connector CN3
Figure 13. USB OTG FS Micro-AB connector CN3 (Front view)
Pin numberDescriptionPin numberDescription
1VBUS (PA9)4ID (PA10)
2DM (PA11)5GND
3DP (PA12)--
Table 25. USB OTG FS Micro-AB connector CN3
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06Y9
10.4 Analog input-output connector CN4
Figure 14. Analog input-output connector CN4 (top view)
Table 26. Analog input-output connector CN4
Pin numberDescriptionPin numberDescription
1GND2Analog input-output PA4
10.5 Extension connectors CN5, CN6, CN13 and CN14
All GPIO signals from STM32L4R9AII6 are connected to extension connectors CN5, CN6,
CN13 and CN14. Extension connectors CN13 and CN14 is also used for FMC device.
24PB11UART3_RXRemove R171, no connection for the CN11.
DescriptionAlternative functions
How to disconnect alternative functions to
use on the extension connector
Do not use the CN11, CN12, CN15, CN17 for
debug connector.
Do not use the CN11, CN12, CN15, CN17 for
debug connector.
26PD9FMC_D14-
28PD12FMC_A17-
30GND--
32PE13FMC_D10-
34PE8FMC_D5-
36PE11FMC_D8-
38PE9FMC_D6-
40+3V3--
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-36
10.6 RS232 connector CN7
Figure 15. RS232 D-sub male connector (front view)
Pin numberDescription
1NC6NC
2RS232_RX (PG8)7RS232_RTS (PB12)
3RS232_TX (PG7)8RS232_CTS (PB13)
4NC9NC
5GND--
Table 31. RS232 D-sub male connector
10.7 microSD connector CN8
Figure 16. microSD connector CN8 (top view)
Pin
number
Description
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ConnectorsUM2248
Pin
number
Table 32. microSD connector CN8
Description
number
1SDIO_D2 (PC10)6Vss/GND
2SDIO_D3 (PC11)7SDIO_D0 (PC8)
3SDIO_CMD (PD2)8SDIO_D1 (PC9)
4VDD9GND
5SDIO_CLK (PC12)10MicroSDcard_detect (MFX GPIO15)
10.8 MFX programming connector CN9
The connector CN9 is used only for embedded MFX (multi function expander) programming
during board manufacture. It is not populated by default and not for end user.
The connector CN19 is used only for embedded ST-LINK/V2-1 programming during board
manufacturing. It is not populated by default and not for end users.
10.16 TFT LCD connector CN20 (RGB)
A TFT-color LCD board is mounted on CN20. Refer to Section 9.30 for details.
10.17 ST-LINK/V2-1 USB Micro-B connector CN21
The USB connector CN21 is used to connect on board ST-LINK/V2-1 facility to a PC for
programming and debugging purposes.
Figure 21. USB Micro-B connector CN21 (front view)
Pin numberDescriptionPin numberDescription
Table 37. USB Micro-B connector CN21 (front view)
1VBUS (power)4GND
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Table 37. USB Micro-B connector CN21 (front view) (continued)
Pin numberDescriptionPin numberDescription
2DM5Shield
3DP--
10.18 CAN D-type male connector CN22
Figure 22. CAN D-type 9-pin male connector CN22 (front view)
Table 38. CAN D-type 9-pin male connector CN22
Pin numberDescriptionPin numberDescription
1,4,8,9NC7CANH
2CANL3,5,6GND
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11 Electrical schematics
This section provides design schematics for the STM32L4R9I-EVAL key features to help
users to implement these features in application designs.
This section includes:
•Overall schematics for the STM32L4R9I-EVAL, see Figure 23
•STM32L4R9I-EVAL MCU, see Figure 24
•Power supply, see Figure 25
•SRAM and NOR Flash memory devices and TFT LCD, see Figure 26
•Audio codec device, see Figure 27
•DSI display connector, see Figure 28
•Physical control peripherals, microSD card and EEPROM, see Figure 29
•Analog input and output, Touch-sensing device, see Figure 30
•ST-LINK/V2-1, see Figure 31
•IDD measurement, see Figure 32
•JTAG and trace debug connectors, see Figure 33
•Motor control connector, see Figure 34
•USB_OTG_FS port, see Figure 35
•USART and CAN transceiver, PMOD connector, see Figure 36
•Octo-SPI Flash memory device, see Figure 37
•Extension connector, see Figure 38
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MB1313
MB1313B.1
10/18/2017
Title:
Size:R eference:
Date:Sheet: of
A3
Revision:
STM32L4R x-EVALProject:
RevB.1:1.openU4pin5andaddD15
2. update X2 part number
3. C30 and C31 changed to 3. 3pF
4. change H1 and H4 size of footprint to C9D4.5
5. Update U 10, U19 and U 20 ESDA LC6V1W5 with new footprint
6. add D11, D12, D 13 for key and joysti ck button ESD protection
7. update Z1 to D14 E SDA7P60-1U 1M
8. LED remap:
LD1 ----> L D5
LD2 ----> L D6
LD3 ----> L D7
LD4 ----> L D8
LD5 ----> L D4
LD6 ----> L D3
LD7 ----> L D2
LD8 ----> L D1
Added:
STM32L4R9I-EVAL board bottom view in Figure 5
Bootloader limitation in Chapter 9.8.1
Warning on AMOLED display in Chapter 9.32
Updated:
Cover views Figure 3 and Figure 4 moved to Section 9.1
Table 27 and Tab l e 3 9 alternative function removed
Figure 23, Figure 24, and Figure 37 in Electrical schematics
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