The STM3241G-EVAL evaluation board is a complete demonstration and development
platform for the STM32F4 Series and includes an embedded STM32F417IGH6 highperformance ARM
The full range of hardware features provided on the board is described to evaluate all
peripherals (USB-OTG HS, USB-OTG FS, Ethernet, motor control, CAN, microSD™ card,
smartcard, USART, Audio DAC, RS-232, IrDA up to version C07 of the board, SRAM,
ST MEMS, EEPROM etc.) before developing applications. Extension headers are used to
easily connect a daughterboard or a wrapping board for any specific application.
The in-circuit ST-LINK/V2 tool provides easy JTAG and SWD interface debugging and
programming.
•Both ISO/IEC 14443 type A and B smartcard support
•I2C compatible serial interface 8 Kbyte EEPROM, ST MEMS and I/O expander
•IEEE 802.3-2002 compliant Ethernet connector
•Two CAN 2.0 A/B channels on the same DB connector
•RS-232 communication
•IrDA transceiver (only supported up to C07 version of the board, no more supported
from C08 version)
•USB-OTG (HS and FS) with Micro-AB connector
•Inductor motor control connector
•I2S Audio DAC, stereo audio jack for headset
•3.2" 240x320 TFT color LCD with touchscreen
•4 color LEDs
•Camera module and extension connector for ST camera plug-in
•Joystick with 4-direction control and selector
•Reset, wakeup, tamper and user button
•RTC with backup battery
•Extension connector for daughterboard or wrapping board
•JTAG, SWD and trace debug support
•Embedded ST-LINK/V2
•Five 5 V power supply options: Power jack, USB FS connector, USB HS connector,
ST-LINK/V2 or daughterboard
1.2 Demonstration software
Demonstration software is preloaded in the board-mounted Flash memory for easy
demonstration of the device peripherals in standalone mode. For more information and to
download the latest version, please refer to STM3241G-EVAL demonstration software at the
www.st.com/mcu website.
1.3 Ordering information
To order the STM3241G-EVAL evaluation board, refer to Table 1:
Table 1. Ordering information
Order codeT arget STM32
STM3241G-EVALSTM32F417IGH6
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1.4 Delivery recommendations
Several verifications are needed before using the board for the first time to make sure that
nothing has been damaged during shipment and no component is unplugged and lost.
When the board is extracted from its plastic bag, please check that no component remains
in the bag. Main components to verify are:
1.The 25 MHz crystals (X1 and X4) may have been removed by a shock.
2. The camera connected on socket CN15 located on the right side of the board under the
JTAG connector may be unplugged. If this is the case, please refer to the note in
Section 2.18: Camera module to make sure to plug it in the correct position.
3. The microSD card may have been ejected from its connector CN6 (top left corner of the
board).
The plastic protection on the camera should be removed carefully as the connection is very
fragile.
2 Hardware layout and configuration
The STM3241G-EVAL evaluation board is designed around the STM32F417IGH6 in a
UFBGA176 package.
The hardware block diagram Figure 2 illustrates the connections between the
STM32F417IGH6 and peripherals (camera module, LCD, SRAM, EEPROM, ST MEMS,
USART, IrDA up to version C07 of the board, USB-OTG HS, USB-OTG FS, Ethernet, Audio,
CAN bus, smartcard, microSD card and motor control).
Figure 3 locates these features on the board.
Note that for every figure (layouts and schematics) of this user manual, whenever IrDA is
indicated, it is only significant for board version up to C07, since IrDA has not been
populated on later versions of the boards (so IrDA is not present from the C08 board
onwards).
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HS
FS
DTB
PSU
STlk
HS
FS
DTB
PSU
STlk
HS
FS
DTB
PSU
STlk
2.1 Power supply
The STM3241G-EVAL evaluation board is designed to be powered by 5 V DC power supply
and to be protected by PolyZen from a wrong power plug-in event. It is possible to configure
the evaluation board to use any of following five sources for the power supply:
•5 V DC power adapter connected to CN18, the power jack on the board
•5 V DC power with 500 mA limitation from CN8, the USB-OTG FS Micro-AB connector
•5 V DC power with 500 mA limitation from CN9, the USB-OTG HS Micro-AB connector
•5 V DC power with 500 mA limitation from CN21, the ST-LINK/V2 USB connector
•5 V DC power from both CN1 and CN3, the extension connector for daughterboard
(DTB for daughterboard on silkscreen)
The power supply is configured using JP4, JP32, JP18 and JP19 as described in Table 2.
JumperDescription
JP4 should be fitted to enable power down reset (PDR). PDR is disabled when JP4 is not
JP4
JP32
fitted.
Default setting: Fitted.
MCU_VDD is connected to 3.3V power when JP32 is closed and MCU current
consumption measurement can be done manually by multi-meter when JP32 is open.
Default setting: Fitted.
Table 2. Power related jumpers and solder bridges
JP18
JP18 is used to select one of the five possible power supply sources.
To select the ST-LINK/V 2 US B connector (CN21) power supply,
set JP18 as shown:
(Default setting)
To select power supply jack (CN18) power supply, set JP18 as
shown:
To select daughterboard connector (CN1 and CN3)power
supply, set JP18 as shown:
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HS
FS
DTB
PSU
STlk
HS
FS
DTB
PSU
STlk
HS
FS
DTB
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STlk
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Table 2. Power related jumpers and solder bridges (continued)
JumperDescription
To select USB-OTG FS (CN8) power supply, set JP18 as shown:
To select USB-OTG HS (CN9)power supply, set JP18 as shown:
JP18
(cont.)
To select power supply jack (CN18) power supply to both
STM3241G-EVAL and daughterboard connected on CN1 and
CN3, set JP18 as shown (daughterboard must not have its own power supply connected)
To connect Vbat to the battery, set JP19 as shown:
JP19
To connect Vbat to 3.3V power, set JP19 as shown:
(Default setting)
Note:LED LD9 is lit when the STM3241G-EVAL evaluation board is powered by 5 V correctly.
2.2 Boot option
The STM3241G-EVAL evaluation board is able to boot from:
•Embedded user Flash
•System memory with boot loader for ISP
•Embedded SRAM for debugging
The boot option is configured by setting switch SW1 (BOOT1) and SW2 (BOOT0). BOOT0
can also be configured via RS-232 connector CN16.
BOOT 0BOOT 1Boot source
01 or 0STM3241G-EVAL boots from User Flash (Default setting)
11STM3241G-EVAL boots from Embedded SRAM
Table 3. Boot related jumpers
10STM3241G-EVAL boots from System Memory
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2.3 Clock source
Four clock sources are available for the STM32F417IGH6 and RTC embedded:
•X1, 25 MHz crystal for Ethernet PHY with socket. It can be removed when clock is
provided by MCO pin of the MCU.
•X2, 26 MHz crystal for USB-OTG HS PHY
•X3, 32 kHz crystal for embedded RTC
•X4, 25 MHz crystal with socket for the STM32F417IGH6 microcontroller. It can be
removed from socket when internal RC clock is used.
2.4 Reset source
The reset signal of STM3241G-EVAL evaluation board is low active. Reset sources include:
•Reset button B1
•Debugging tools from JTAG connector CN14 and trace connector CN13
•Daughterboard from CN3
•RS-232 connector CN16 for ISP
•ST-LINK/V2
2.5 Audio
The STM3241G-EVAL evaluation board features stereo audio play and microphone
recording by an external headset connected on audio jack CN11.
•An audio DAC CS43L22 is connected to both the I2S2 port and a DAC channel, while a
microphone amplifier is connected to the ADC of the STM32F417IGH6.
•The CS43L22 can be configured via I2C1 and the external PLL (U36) can be used to
provide an external clock which is connected to the I2S_CKIN pin (PC9).
Note:To avoid speaker damage it is mandatory to connect the headphone to the board on CN11
during debug of audio code. When the program is stopped on a breakpoint, a DC voltage
may be applied to the speaker which induces power consumption incompatible with the
speaker.
Warning:Signal I2S_SD (PI3) is close to signal TCK/SWCLK of the
JTAG/SWD interface, so to avoid possible communication
issues on JTAG/SWD when the I2S interface is used the
recommendations are to:
1) Prefer usage of embedded ST-LINK/V2 to external tool
connected on CN14.
2) Configure PI3 GPIO in low speed (2 MHz or 10 MHz).
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JumperDescription
JP16Description of JP16 is in Table 11 on page 16.
JP33The microphone amplifier is disabled when JP33 is fitted. Default setting: Not fitted
2.6 EEPROM
A 64 Kbit EEPROM is connected to the I2C1 bus of the STM32F417IGH6.
JumperDescription
JP24
The EEPROM is in Write Protection mode when JP24 is not fitted.
Default setting: Not fitted
2.7 CAN
The STM3241G-EVAL evaluation board has two channels of CAN2.0A/B compliant CAN
bus communication based on a 3.3 V CAN transceiver on the DB9 connector (CN10). The
two CAN buses can be disconnected by jumpers from relevant STM32F417IGH6 I/Os which
are shared with FSMC and USB-OTG HS. Jumpers JP3 and JP10 must be refitted to
enable CAN1 or CAN2 as listed in T able 6.
Table 4. Audio related jumpers
Table 5. EEPROM related jumper and solder bridge
High-speed, Standby and Slope Control modes are available and can be selected by setting
jumper JP7.
JumperDescription
To connect CAN1_TX to CAN transceiver, set JP3 as shown:
JP3
To connect CAN2_TX to CAN transceiver, set JP3 as shown:
To connect CAN1_RX to CAN transceiver, set JP10 as shown:
JP10
To connect CAN2_RX to CAN transceiver, set JP10 as shown:
PD0 and PB5 are disconnected from the CAN transceiver and used for FSMC and
USB_OTG_HS when jumper JP10 is not fitted (default setting).
Table 6. CAN-related jumpers
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Table 6. CAN-related jumpers (continued)
JumperDescription
To enable the selected CAN transceiver to work in Standby mode, set JP7 as
shown:
JP7
JP9
To enable the selected CAN transceiver to work in High-speed mode, set JP7 as
shown (default setting):
To enable the selected CAN transceiver to work in Slope Control mode, do not fit a jumper
on JP7.
To enable the terminal resistor for the selected CAN, fit a jumper on JP9.
(Default setting: not fitted)
2.8 RS-232 and IrDA
Both RS-232 and IrDA communication is enabled by D-type, 9-pin RS-232 connectors
(CN16) and IrDA transceiver U11 which are connected to USART3 of the STM32F417IGH6
on the STM3241G-EVAL evaluation board.
The IrDA transceiver (TFDU6300) is not populated on STM3241G-EVAL evaluation board
from version C08. The version of the board is written on sticker placed on bottom side of the
board (ex: MB786-C08). For boards version C08 or newer, it is possible to solder manually
the TDFU6300 on U11 footprint to support IRDA feature.
For ISP support, two signals are added on the RS-232 connector CN16:
•Bootloader_RESET (shared with CTS signal)
•Bootloader_BOOT0 (shared with DSR signal)
RS-232 or IrDA can be selected by setting JP22, and ISP can be enabled by setting JP29
and JP34 as shown inTable 7 .
Table 7. RS-232 and IrDA related jumpers
JumperDescription
To connect USART3_RX to IrDA transceiver and enable IrDA communication,
set JP22 as shown (position 2-3 unused from version C08):
JP22
JP29
JP34
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To connect USART3_RX to RS-232 transceiver and enable RS-232
communication, set JP22 as shown (Default setting):
To enable microSD card, which shares I/Os with RS-232, JP22 is not fitted.
Bootloader_BOOT0 is managed by pin 6 of CN16 (RS-232 DSR signal) when JP29 is
closed. This configuration is used for boot loader application only.
Default setting: Not fitted.
Bootloader_RESET is managed by pin 8 of CN16 (RS-232 CTS signal) when JP34 is
fitted. This configuration is used for boot loader application only.
Default setting: Not fitted.
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2.9 Motor control
The STM3241G-EVAL evaluation board enables a three-phase brushless motor control via
a 34-pin connector (CN5), which provides all required control and feedback signals to and
from the motor power-driving board. Available signals on this connector include emergency
stop, motor speed, 3-phase motor current, bus voltage, heatsink temperature coming from
the motor driving board and 6 channels of PWM control signal going to the motor driving
circuit.
The solder bridge (SB18) selects two kinds of synchronization methods for PFCs (Power
Factor Correction) while the SB17 selects different signals on pin 31 of CN5.
The I/O pins used on motor control connector CN5 are multiplexed with some peripherals on
the board; either motor control connector or multiplexed peripherals can be enabled by the
setting of solder bridges SB10, SB11, SB12, SB14, SB15 and SB16.
Table 8. Motor control solder bridges
Solder
bridge
SB18
SB17
SB16
SB10
SB12
SB14
SB15
Description
When closed, SB18 redirects the PFC synchronized signal to the
timer 3 input capture pin 2 in addition to the timer 3 external trigger
input.
Default setting: Open
For CN5 encoder signal input (pin 31), SB17 must be open.
For CN5 special motor analog signal input (pin 31), SB17 must be
closed.
Default setting: Open
To connect MC_EmergencySTOP to PI4, close SB16.
Default setting: Open
To connect MC_EnIndex to PB8, close SB10.
Default setting: Open
To connect MC_CurrentA to PC1, close SB11.
Default setting: Open
To connect MC_CurrentB to PC2, close SB12.
Default setting: Open
To connect MC_EnB to PD13, close SB14.
Default setting: Open
To connect MC_EnA to PD12 close SB15.
Default setting: Open
Multiplexed
peripherals
-
-
Camera module
connected to
CN15
EthernetSB11
FSMC
Note:1Some 0 Ω resistors have to be removed or soldered to enable motor control application
except the solder bridges configurations mentioned above:
– R34, R58 & R51 to be removed
– R66, R204 & R205 to be soldered
2microSD card must be removed from CN6 for motor control application.
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2.10 Smartcard
STMicroelectronics smartcard interface chip ST8024 is used on the STM3241G-EVAL
board for asynchronous 3 V and 5 V smartcards. It performs all supply protection and
control functions based on the connections with the STM32F417IGH6 listed in Table 9 :
ST8024 signalsDescriptionConnect to STM32F417IGH6
5V/3VSmartcard power supply selection pinPH15
I/OUCMCU data I/O linePC6
XTAL1Crystal or external clock inputPG7
Table 9. ST8024 and STM32F417IGH6 connections
OFF
RSTINCard reset input from MCUPF7
CMDVCC
Detect presence of a card, MCU interrupt, share
same pin with motor controller.
Start activation sequence input (Active Low),
share same pin with I2S DAC and motor control.
Smartcard shares some I/Os with I2S bus for audio. Some jumper settings need to be
reconfigured to enable Smartcard as indicated below:
JumperDescription
To connect Smartcard_IO to PC6, JP21must be fitted.
JP21
JP21 must not be fitted for Audio DAC connection to I2S.
Default setting: Not fitted
2.11 microSD card
The 1 Gbyte or more microSD card connected to SDIO of the STM32F417IGH6 is available
on the board. microSD card detection is managed by the standard I/O port PH13. The
microSD card shares I/Os with motor control, RS-232 and audio.
The jumpers JP22 and JP16 must be refit and motor control connector (CN5) must be
disconnected for microSD card function.
PF6
PG12
Table 10. Smartcard related jumper
Table 11. microSD card related jumpers
JumperDescription
JP22Description of JP22 is in Section 2.8: RS-232 and IrDA
PC9 is connected to MicroSDCard_D1 when JP16 is set as shown to the
right: (Default setting):
JP16
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PC9 is connected to I2S_CKIN when JP16 is set as show to the right:
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UM1460Hardware layout and configuration
2.12 ST MEMS
The ST MEMS device LIS302DL is connected to the I2C1 bus of the STM32F417IGH6 on
the board.
2.13 Potentiometer
A 10 kΩ potentiometer RV1 is connected to PF9 of the STM32F417IGH6 on the board.
2.14 ADC
Two test points (TP3 AIN-) and (TP4 AIN+) are placed close to MCU port PC1 allowing
precise measurements on ADC1, ADC2 and ADC3 channel 11. As PC1 is also used as
current A input on the motor control connector it is recommended to remove R219 to
optimize noise immunity on this input.
A potentiometer RV1 is connected to PF9 of the STM32F417IGH6. If needed, a low-pass
filter (R74 and C59) can be placed on this input to reduce the bandwidth of the analog input
PF9.
It is also possible to place the Ethernet PHY (U5) in low-power mode in order to reduce the
noise induced by this high-frequency peripheral. Power down pin (MII_INT in the schematic)
is connected to PB14 of the MCU, so this I/O can be configured as output low during analog
precision measurement.
2.15 USB-OTG FS
The STM3241G-EVAL evaluation board enables USB-OTG full speed communication via a
USB Micro-AB connector (CN8) and USB power switch (U1) connected to VBUS. The board
can be powered by this USB connection at 5 V DC with a 500 mA current limitation.
LED LD6 indicates that either:
•Power switch (U1) is ON and STM3241G-EVAL is working as a USB host or
•VBUS is powered by another USB host while STM3241G-EVAL is working as a USB
device.
LED LD5 indicates an over-current.
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2.16 Ethernet
The STM3241G-EVAL evaluation board enables 10/100M Ethernet communication by a
PHY DP83848CVV (U5) and integrated RJ45 connector (CN7). Both MII and RMII interface
modes can be selected by setting jumpers JP5, JP6 and JP8 as listed in Table 12:
JumperDescription
Table 12. Ethernet related jumpers and solder bridges
JP8
JP6
JP5
SB1
JP8 selects MII or RMII interface mode. To enable RMII interface mode, JP8 is fitted.
To enable MII, JP8 is not fitted. Default setting: Not fitted
To enable MII interface mode, set JP6 as shown (Default setting):
To enable RMII interface mode, set JP6 as shown:
To provide 25 MHz clock for MII or 50 MHz clock for RMII by MCO at PA8, set
JP5 as shown (Default setting):
To provide 25 MHz clock by external crystal X1 (for MII interface mode only) set
JP5 as shown:
When clock is provided by external oscillator U3, JP5 must not be fitted.
SB1 selects clock source only for RMII mode.
To connect the clock from oscillator U3 to RMII_REF_CLK, close SB1.
The resistor R212 has to be removed in this case.
Default setting: Closed.
Note:1A test point (TP2) is available on the board for the PTP_PPS feature test.
2The Ethernet PHY (U5) can be powered down by regulating PB14.
3In RMII mode the 50 MHz clock must be provided to Ethernet PHY by an external oscillator.
This oscillator (ref SM7745HEV-50.0M or equivalent, not provided with the board) must be
soldered on the U3 footprint (located under CN3) and JP5 must be removed.
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2.17 USB-OTG HS
The STM3241G-EVAL evaluation board enables USB-OTG HS communication via USB
micro-AB connector (CN9), USB high-speed PHY (U8) and USB power switch (U4)
connected to VBUS. The STM3241G-EVAL can be powered by CN9 at 5 V DC with a
500 mA current limitation.
LED LD7 indicates that USB power switch (U4) is ON and STM3241G-EVAL is working as a
USB host, or that VBUS is powered by another USB host when STM3241G-EVAL is
working as a USB device. LED LD8 indicates an over-current.
The USB ULPI bus is shared with the CAN2 bus. JP10 and JP3 must be kept open for USBOTG HS.
JumperDescription
Table 13. microSD card related jumper
JP31
To disable USB-OTG PHY U8, JP31 is not fitted.
Default setting: Fitted
Note:On MB786 boards prior to version B03 it is possible that after a board RESET the MCU is no
longer able to control communication with the OTG PHY (U8). When this issue occurs the
only way to recover OTG PHY control is to power the board OFF and ON. This issue is fixed
on MB786 version B03 or newer.
2.18 Camera module
A camera module is connected to the DCMI bus of the STM32F417IGH6 and shares the
same I/Os with the motor control connector. SB16 must be kept open for camera module
application. There are two possible modules and omnivision cameras populated on the
CN15 connector of the board:
•1.3 Megapixel: Module CN01302H1045-C: Camera OV9655
•2 Megapixel: Module CN020VAH2554-C: Camera OV2640
JumperDescription
JP26
SB16Description of SB16 is in Section 2.9: Motor control.
To set power down mode for the camera module, JP26 is fitted.
Default setting: Not fitted
Table 14. Camera module related jumpers
Note:1When the camera demo loaded in Flash is executed, some green pixels may appear in high-
contrast zones, depending on the image captured.
2The camera is not firmly fitted on its connector (CN15). It is possible that during shipment
the camera could be unplugged. In this case the user needs to plug it into the correct
position as shown on the picture below (pin 1 dot on top left corner of the socket).
It is not recommended to remove it, in order to avoid false contact later.
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Figure 4. Pin 1 camera plug
1. Picture is not contractual
The camera extension connector CN23 is available on the board to connect the ST camera
plug-in board.
2.19 SRAM
The 16 Mbit SRAM is connected to the FSMC bus of the STM32F417IGH6 which shares the
same I/Os with the CAN1 bus.
JP3 and JP10 must not be fitted for SRAM and LCD application.
JumperDescription
JP1
JP2
Table 15. SRAM related jumpers
Connect PE4 to SRAM as A20 by setting JP1 as shown
(Default setting):
Connect PE4 to trace connector CN13 as TRACE_D1 by setting JP1 as shown:
Connect PE3 to SRAM as A19 by setting JP2 as shown
(Default setting):
Connect PE3 to trace connector CN13 as TRACE_D0 by setting JP2 as shown:
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2.20 Development and debug support
Version 2 of the ST-LINK, called ST-LINK/V2 is embedded on the board. This tool allows
onboard program loading and debugging of the STM32F using the JTAG or SWD interface.
Third-party debug tools are supported by the JTAG (CN14) or Trace (CN13) connectors
To communicate with the embedded ST-LINK/V2, a specific driver needs to be installed on
the PC. To download and install this driver, refer to the software and development tools page
for the STM32F family on www.st.com (the install shield is ST-LINK_V2_USBdriver.exe).
Note:Due to I/O sharing on the board there is a frequency limitation on ETM trace, so when the
MCU clock is above 120
Third-party toolchains, Atollic TrueSTUDIO, KEIL ARM-MDK, IAR EWARM and Tasking VX-
Toolset, support ST-LINK/V2 according to Table 16.
ManufacturerToolchainVersion
AtollicTrueSTUDIO2.1
IAREWARM6.20.4
KeilMDK-ARM4.20
TaskingVX-Toolset ARM Cortex-M 4.0.1
MHz the ETM trace output is not guaranteed.
Table 16. Third -party toolcha i n su pp o r t
The embedded ST-LINK/V2 connects to the PC via a standard USB cable from connector
CN21. The bicolor LED LD10 (COM) indicates the status of the communication as follows:
•Slow blinking Red/Off: At power-on before USB initialization
•Fast blinking Red/Off: Communication between PC and ST-LINK/V2 (enumeration)
•Red LED On: When initialization between PC and ST-LINK/V2 is successfully finished
•Green LED On: After successful target communication initialization
•Blinking Red/Green: During communication with target
•Green On: Communication finished and OK
•Orange On: Communication failure
Note:1It is possible to power the board via CN21 (embedded ST-LINK/V2 USB connector) even if
an external tool is connected to CN13 (trace) or CN14 (external JTAG and SWD).
2If the I2S interface is used, refer to the warning in Chapter 2.5.
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Hardware layout and configurationUM1460
2.21 Display and input devices
The 3.2” TFT color LCD connected to FSMC bus and 4 general purpose color LEDs (LD 1,
2, 3, 4) are available as display devices. A touchscreen connected to an I/O expander
(U24), 4-direction joystick with selection key, general purpose button (B4), wakeup button
(B2) and tamper detection button (B3) are available as input devices.
Table 17. LCD modules
Pin on
CN19
1CSFSMC_NE3 (PG10)18PD14FSMC_D12
2RSFSMC_A019PD15FSMC_D13
3WR/SCLFSMC_NWE20PD16FSMC_D14
4RDFSMC_NOE21PD17FSMC_D15
5RESETRESET#22BL_GNDGND
6PD1FSMC_D023BL_Control+5V
7PD2FSMC_D124VDD+3V3
8PD3FSMC_D225VCI+3V3
9PD4FSMC_D326GNDGND
10PD5FSMC_D427GNDGND
11PD6FSMC_D528BL_VDD+5V
12PD7FSMC_D629SDONC
13PD8FSMC_D730SDINC
14PD10FSMC_D831XLI/O expander U24
15PD11FSMC_D932XRI/O expander U24
16PD12FSMC_D1033YDI/O expander U24
Pin namePin connection
Pin on
CN19
Pin namePin connection
17PD13FSMC_D1134YUI/O expander U24
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UM1460Connectors
3 Connectors
3.1 Daughterboard extension connectors CN1, 2, 3 and 4
Four male headers, CN1, 2, 3 and 4, can be used to connect with a daughterboard or
standard wrapping board to the STM3241G-EVAL evaluation board. A total number of 140
GPIOs are available on the board.
Each pin on CN1, 2, 3 and 4 can be used by a daughterboard after disconnecting it from the
corresponding function block on the STM3241G-EVAL evaluation board. Please refer to
- As an option, RFU could be tied to VDD or VSS for forward
compatibility with future STM32F products. However, user may leave
RFU pin connected to VDD, or VSS, or NC for STM32F2xx exclusive
use.
- JP4 should be fitted for future backward compatibility
The 34-pin connector to mother board for both
serial & 16bit interface. Compatible with
MB694 with Touch screen signals added on
Pin 31-34.
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Revision historyUM1460
Revision history
DateRevisionChanges
05-Sept-20111Initial release.
09-Oct-20112
06-Jan-20123
12-Apr-20124Added note in Section 2.20.
Table 35. Document revision history
Updated Table 5 JP24 description. Added warning in Chapter 2.5 and
note in Chapter 2.16 and Chapter 2.20.
Added note in Chapter 2.5
Schematics.
Added the following feature update throughout the whole
document, starting with the
27-Oct-20165
only supported up to C07 version of the board (no more
supported from C08 version).
Figure 17 to Figure 37 changed.
and updatedChapter Appendix A:
Introduction
: IrDA transceiver is
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UM1460
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