The STM3210E-EVAL evaluation board is designed as a complete de ve lopment platf orm f or
STMicroelectronic's ARM Cortex-M3 core-based ST M32F103Z microcontroller with full
speed USB2.0, CAN2.0A/B compliant interface, two I
USART channels with smartcard support, three SPI channels, two D AC channels, FSMC
interface, SDIO, internal 64 KB SRAM and 512 KB Flash, JTAG and SWD debug support.
The full range of hardw are features on the board helps you to evaluate all peripherals (USB,
motor control, CAN, MicroSD card, smartcard, USART, NOR Flash, NAND flash, SRAM)
and dev elop your own applications. Extension headers make it po ssible to easily connect a
daughter board or wrapping board for your specific application.
Figure 1.STM3210E-EVAL evaluation board
2
S channels, two I2C channels, five
Order code
To order the STM32F103Z evaluation board, use the order code STM3210E-EVAL.
●Three 5 V power supply options: power jack, USB connector or daughter board
●Boot from user Flash, system memory or SRAM
●I2S Audio DAC, stereo audio jack
●128 Mbyte MicroSD card
●Both A and B type smartcard support
●64 or 128 Mbit serial Flash, 512 Kx16 SRAM, 512 Mbit or 1 Gbit NAND Flash and 128
Mbit NOR Flash
●I2C/SMBus compatible serial interface temperature sensor
●Two RS-232 channels with RTS/CTS handshake support on one channel
●IrDA transceiver
●USB2.0 full speed connection
●CAN2.0A/B compliant connection
●Inductor motor control connector
●JTAG and trace debug support
●240x320 TFT color LCD
●Joystick with 4-dir ection control and selector
●Reset, wakeup, tamper and user buttons
●4 color LEDs
●RTC with backup battery
1.2 Demonstration software
To use the STM3210E-EVAL evaluation board, you must have the demonstration software
version 1.1 or later. If the version installed on your evaluation board is earlier than version
1.1, you must download the latest version from www.st.com.
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UM0488Hardware layout and configuration
2 Hardware layout and configuration
The STM3210E-EVAL evaluation board is designed around the STM32F103Z
microcontroller in a 144-pin TQFP pac kage. The hardware bloc k diagr am Figure 2 illustrates
the connection between the STM32F103Z and peripherals (LCD, SPI Flash, USART, IrDA,
USB, audio, CAN bus, smartcard, MicroSD card, NOR Flash, NAND Flash, SRAM,
temperature sensor, audio DAC and motor control) and Figure 3 will help you locate these
features on the actual evaluation board.
Figure 2.Hardware block diagram
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Hardware layout and configurationUM0488
r
Figure 3.STM3210E-EVAL evaluation board layout
CN10
Extension connector
U1
STM32F103Z
CN1
Motor control
CN11
Extension connector
CN2,3,5
BNC
CN14
USB
CN8
USART2
CN4
CAN
connector
CN6
QST
CN7
Trace
CN9
JTAG
U17
Color LCD
CN12
USART1
CN17
5V power
B1
RESET
B2
WAKEUP
CN18
Smartcard
B3
Tamper
U19
Joystick
CN13
MicroSD card
CN15
Audio jack
U13
IrDA
RV1
Potentiomete
B4
User key
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UM0488Hardware layout and configuration
2.1 Power supply
The STM3210E-EVAL evaluation board is designed to be powered by 5V DC power supply
and to be protected by PolyZen U15 in the event of wrong power plug-in. It is possible to
configure the evaluation board to use any of following three sources for the power supply:
●5V DC power adapter connected to CN17, the power jack on the board (PSU on silk
screen for power supply unit).
●5V DC power with 500 mA limitation from CN14, the type-B USB connector (USB on
silkscreen).
●5V DC power from both CN10 and CN11, the extension connector for daughter board
(DTB for daughter board on silkscreen).
The power supply is configured by setting the related jumpers JP13, JP12 and JP1 as
described in Table 1. The LED LD5 is lit when the STM3210E-EVAL evaluation board is
powered correctly.
Table 1.Power related jumpers
JumperDescription
JP13 is used to select one of the three possible power
PSU
DTB
USB
supply resources.
For power supply jack(CN17) to the STM3210E-EVAL
, JP13 is set as shown (default setting).
only
JP13
JP12
JP1
For power supply from the daughter board
connectors(CN10 and CN11) to STM3210E-EVAL only
,
JP13 is set as shown.
For power supply from USB (CN14) to STM3210E-EVAL
, JP13 is set as shown.
only
For power supply from power supply jack(CN17) to both
STM3210E-EVAL and daughter board connected on CN10
and CN11, JP13 is set as shown (daughter board must not have its own power supply connected).
Enables consumption measurements of both VDD and VDDA.
Default setting: Fitted
is connected to 3.3V power when JP1 is set as shown
V
bat
(default setting).
V
is connected to battery when JP1 is set as shown.
bat
USB
USB
USB
1 2 3
1 2 3
PSU
DTB
PSU
DTB
PSU
DTB
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Hardware layout and configurationUM0488
2.2 Boot option
The STM3210E-EVAL evaluation board can boot from:
●Embedded user Flash
●System memory with boot loader for ISP
●Embedded SRAM for debugging
The boot option is configured by setting the switches BOOT0 and BOOT1.
Table 2.Boot related switches
SwitchBoot from
STM3210E-EVAL boots from User Flash when BOOT0 is set as
shown to the right. BOOT1 is not required in this configuration.
(Default setting)
STM3210E-EVAL boot from Embedded SRAM when BOOT0
BOOT0
and BOOT1 are set as shown to the right.
BOOT1
STM3210E-EVAL boot from System Memory when BOOT0 and
BOOT1 are set as shown to the right.
2.3 Clock source
Two clock sources are available on the STM3210E-EVAL evaluation board for STM32F103
and RTC.
●X2, 32KHz crystal for embedded RTC.
●X1, 8MHz crystal with socket for ST M32F10 3Z micr ocontr oller, it can be removed from
socket when internal RC clock is used.
Switch
configuration
Boot 0
0 <> 1
Boot 0
Boot 1
0 <> 1
Boot 0
Boot 1
0 <> 1
2.4 Reset source
The reset signal of the STM3210E-EVAL evaluation board is low active and the reset
sources include:
●Reset button B1
●Debugging tools from JTAG connector CN7 and trace connector CN9
●Daughter board from CN11
Table 3.Reset related jumper
JumperDescription
Enables reset of the STM32F103Z embedded JTAG TAP controller each time a
JP19
8/48
system reset occurs. JP19 connects the TRST signal from the JTAG connection with
the system reset signal RESET#. Default setting: not fitted
Page 9
UM0488Hardware layout and configuration
2.5 Audio
The STM3210E-EVAL evaluation board supports stereo audio play because it provides an
audio DAC AK4343 connected to both I
STM32F103Z. Either external slave mode or PLL slave mode (reference clock BICK or
LRCK) of audio DAC can be used by setting the jumper JP18.
The I2S_MCK is multiplexed with smartcard and motor control, and can be enabled by
setting the jumper JP15. Refer to Section 2.9: Motor control for details. Audio DAC AK4343
is in power-down mode when PDN pin is pulled-down by PG11.
Table 4.Audio related jumpers
JumperDescription
JP18
2.6 Serial Flash
A 64 or 128 Mbit serial Flash connected to SPI1of STM32F103Z, serial Flash chip select is
managed by IO pin PB2. The SPI1_MISO is multiplexed with motor control, it can be
enabled by setting the jumper JP3. Refer to Section 2.9: Motor control for details.
2
S port and two channels of DAC of microcontroller
External slave mode (MCK from STM32F103Z) is selected
when JP18 is set as shown (default setting).
PLL slave mode (reference clock BICK or LRCK) is selected
when JP18 is set as shown.
1 2 3
1 2 3
2.7 CAN
STM3210E-EVAL evaluation board supports CAN2.0A/B compliant CAN bus
communication based on 3.3V CAN transceiver. The high-speed mode, standby mode and
slope control mode are available and can be selected by setting JP8.
Table 5.CAN related jumpers
JP8
JP6
JumperDescription
CAN transceiver works in standby mode when JP8 is set
as shown.
CAN transceiver works in high-speed mode when JP8 is set
as shown (default setting).
CAN transceiver works in slope control mode when JP8 is open.
CAN terminal resistor is enabled when JP6 is fitted.
Default setting: not fitted
1 2 3
1 2 3
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Hardware layout and configurationUM0488
2.8 RS232 connectors
Two D-type 9-pin connectors CN12 (USART1) and CN8 (USART2) are available on the
STM3210E-EVAL evaluation board.
●USART1 connector is connected to RS232 transceiver U7
●USART2 connector with RTS/CTS handshake signal support is connected to RS-232
transceiver U5. The USART2_CTS is multiplexed with motor control, it can be enabled
by setting the jumper JP4. Refer to Section 2.9: Motor control for details.
2.9 Motor control
The STM3210E-EVAL evaluation board suppo rts three-phase brushless motor control via a
34-pin connector CN1, which prov ides all re quired co ntro l and feedback signals to and from
the motor power driving board. Available signals on this connector include emergency stop,
motor speed, three-phase motor current, bus v oltage , heatsink temper ature coming from the
motor driving board and 6 channels of PWM control signals going to the motor driving
circuit.
JP 20 allows to choose between two synchronization methods for power factor correction
(PFC).
The I/O pins used on the motor control connector CN1 are multiplexed with some
peripherals on the board; either the motor control connector or multiplexed peripherals can
be enabled by setting the jumpers JP3, JP4, JP11, JP15 and JP16 as described in Table 6.
Table 6.Motor control related jumpers
JumperDescription
JP20 allows to have a PFC synchronization signal redirected to the timer 3 input capture 1
JP20
JP2
JP4
JP3
JP11
JP15
JP16
pin, and additionally to the timer 3 external trigger input. JTA G deb ugging is disabled when
JP20 is fitted. Default setting: not fitted
JP2 should be kept on open when encoder signal is input from pin 31 of CN1 while it
should be kept on close when analog signal is from pin 31 of CN1 for special motor.
Default setting: not fitted
MC_EnA is enabled when JP4 is set as shown to the right
(default setting):
USART2_CTS is enabled when JP4 is set as show to the
right:
MC_EmergencySTOP is enabled when JP3 is closed. The pin PA6 is used
as SPI1_MISO when JP3 is open. Default setting: not fitted
MC_PFCpwm is enabled when JP11 is open. The pin PB5 will be used as
interrupt input from temperature sensor when JP11 is closed.
MC_UH or I2S_MCK are enabled when JP15 is open. The pin PC6 is used
as Smartcard_CMDVCC when JP15 is closed.
MC_VH is enabled when JP16 is open. The pin PC7 is used as
Smartcard_OFF when JP16 is closed
1 2 3
1 2 3
Multiplexed
peripherals
USART2
SPI1
Temperature
sensor
2
S and
I
smartcard
Smartcard
10/48
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UM0488Hardware layout and configuration
2.10 Smartcard
STMicroelectronics smartcard interface chip ST8024 is use d on the STM3210E-EVAL board
for asynchronous 3V and 5V smartcards. It performs all supply protection and control
functions based on the connections with STM32F103Z listed in Table 7.
The Smartcard_CMDVCC and Smartcard_OFF are mult iplexed with motor control.
They can be enabled by setting the jumpers JP15 and JP16. Refer to Section 2.9: Motor
control on page 10 for details.
Table 7.Connection between ST8024 and STM32F103Z
Signals of ST8024Description
5V/3VSmartcard power supply selection pinPB0
I/OUCMCU data I/O linePB10
XTAL1Crystal or external clock inputPB12
OFF
RSTINCard reset input from MCUPB11
CMDVCC
Table 8.Smartcard related jumpers
JumperDescription
JP15
JP16
2.11 MicroSD card
Connect to
STM32F10X
Detect presence of a card, interrupt to MCU,
share same pin with motor controller
Start activation sequence input (active low),
share same pin with I
The CMDVCC is connected to PC6 when JP15 is closed. It should be kept on
open, or the SD card needs to be removed from the MicroSD card connector
when PC6 is used by I2S or motor control connector. Default setting: not fitted
The OFF is connected to PC7 when JP16 is closed. It has to be kept on open
when PC7 is used by the motor contro l conn e cto r. Default setting: not fitte d
2
S DAC and motor control
PC7
PC6
The 128 Mbyte MicroSD card conne cted to SDIO of STM32 F103Z is a v ailab le o n the board.
MicroSD card detection is managed by standard IO port PF11.
The MicroSD card_D3 is multiplexed with IrDA. It can be enabled by setting the jumper
JP22, as explained in Section 2.14: IrDA on page 12.
The MicroSD card_D0 and MicroSD card CMD are multiplexed with the motor control
connector. They can be enabled by setting the jumpers JP17 and JP20.
Table 9.MicroSD card related jumpers
JumperDescription
JP17 is used to enable MicroSD card data line D0. MicroSD card D0 is enabled
JP17
JP20
when JP17 is fitted. The JP17 should be kept on open when motor control
connector CN1 is used. Default setting: fitted
JP20 is used by the motor control connector, refer to Table 6 for details. JP20
should be kept on open for MicroSD card operation. JTAG debugging is
disabled when JP20 is fitted.
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Hardware layout and configurationUM0488
2.12 Temperature sensor
One I2C interface temperature sensor STLM75 (–55°C to +125°C) connected to I2C of
STM32F103Z is available on the board.
2.13 Analog input
Three BNC connectors CN2,CN3 and CN5 are connected to PC3, PC2 and PC1 of the
STM32F103Z as external analog input. The 50 ohm terminal resistor can be enabled by
closing the solder bridge JP23, JP24 and JP25 for ea ch BNC connector. A low pass filter
can be implemented for each BNC connector CN5, CN3 and CN2 by rep lacing R5 and C22,
R4 and C13, R3 and C9 with the right resistor and capacitor values, depending on the
requirements of your application.
2.14 IrDA
IrDA communication is supported by the IrDA transceiver U13 connected to USART3 of
STM32F103Z. The IrDA transceiver can be enabled or disabled by setting JP21.
Table 10.IrDA related jumpers
JP21
JP22
2.15 USB
STM3210E-EV A L ev a luation board suppo rt USB2.0 compliant full speed communication via
a USB type B connector (CN14). The evaluation board can be powered by this USB
connection at 5V DC with 500mA current limitation. USB disconnection simulation can be
implemented by disconnecting 1.5 K pull-up register from USB+ line . The USB disconnection
simulation feature is enabled by setting JP14.
Table 11.USB related jumpers
JP14
JumperDescription
JP21 is used to shutdown the IrDA transceiver.
IrDA is enabled when JP21 is fitted while IrDA is disabled when JP21 is not
fitted. Default setting: fitted
IrDA_RX is enabled when JP22 is closed. The IO pin PC11 is used as the data
line 3 of the MicroSD card when JP22 is open. Default setting: not fitted
JumperDescription
The USB 1.5K pull-up register is always connected to USB+
line when JP14 is set as shown.
1 2 3
The USB 1.5K pull-up register can be disconnected by software
from USB+ line when JP14 is set as shown. In this case, the
USB connect/disconnect feature is managed by standard IO
port PB14 (default setting).
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Page 13
UM0488Hardware layout and configuration
2.16 Development and debug support
The two debug connectors available on STM3210E-EVAL evaluation board are:
●CN9, standard 20-pin JTAG interface connector, compliant with ARM7/9 debug tools.
●CN7, SAMTEC 20-pin connector FTSH-110-01-L-DV for both SWD and Trace,
compliant with ARM CoreSight debug tools.
2.17 Display and input devices
The 240x320 TFT color LCD connected to bank1 NOR/PSRAM4 of FSMC interface of
STM32F103Z and four general purpose color LEDs (LD 1,2,3,4) are available as display
devices. A 4-direction joystick with selection key, general purpose button (B4), wakeup
button (B2) and tamper detect ion button (B3) are av ailab le as input de vices. Th e jumper JP4
should be kept on open to enable the wakeup button B2 which shares the same IO with
USART2 and motor control connector.
The STM3210E-EVAL evaluation board also supports a second optional 122x32 graphic
LCD that can be mounted on the U18 connector. By default, the gr aph ic LCD is not pre sent.
19PD15FSMC_D13
20PD16FSMC_D14
21PD17FSMC_D15
22BL_GNDGND
23BL_control3.3V
24VDD3.3V
25VCI3.3V
26GNDGND
27GNDGND
28BL_VDD3.3V
29SDOPA6 via JP26
30SDIPA7 via JP27
2.18 SRAM
512Kx16 SRAM is connected to bank1 NOR/PSRAM3 of the FSMC interface and both 8-bit
and 16-bit access are allowed by BLN0 and BLN1 connected to BLE and BHE of SRAM
respectively.
DescriptionPin connection
Pin on
U18
DescriptionPin connection
2.19 NAND Flash
The 512 Mbit x8 or 1 Gbit x8 NAND Flash is connected to NAND bank2 of the FSMC
interface. The ready/busy signal can be connected to either WAIT signal or FSMC_INT2
signal of STM32F103Z depending on the setting of JP7.
Table 13.NAND Flash related jumpers
JumperDescription
The ready/busy signal is connected to WAIT signal when
JP7 is set as shown (default setting)
JP7
The ready/busy signal is connected to FSMC_INT2 signal
when JP7 is set as shown.
14/48
1 2 3
1 2 3
Page 15
UM0488Hardware layout and configuration
2.20 NOR Flash
128 Mbit NOR Flash is connected to bank1 NOR/PSRAM2 of the FSMC interface. The 16bit operation mode is selected by a pull-up resistor connected to the BYTE pin of the NOR
Flash. Write protection can be enabled or disabled by jumper JP5.
Table 14.NOR Flash related jumpers
JumperDescription
Write protection is enabled when JP5 is fitted while write protection is
JP5
Three different NOR 128- Mbit ref erences can be present on the ev aluation board depending
on component availability.
Table 15.NOR Flash reference
M29W128GL70ZA6ENUMONYX
M29W128GH70ZA6ENUMONYX
S29GL128P90FFIR20SPANSION
disabled when JP5 is not fitted.
Default setting: not fitted
ReferenceManufacturer
These three references are not identical in terms of ID code, speed, timing or block
protection. The demonstration firmware and the software library delivered with the board
support these three NOR Flash references. However, during the development of your
application software, you must verify which NOR reference is implemented on your board
(component referenced as U2 on silkscreen and schema tic), and tak e its char acteristics i nto
account.
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ConnectorsUM0488
3 Connectors
3.1 Motor control connector CN1
Figure 4.Motor control connector CN1 (top view)
33 31 29 27 25 23 21 19 17 15 13 11 9 7 5 3 1
34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2
Table 16.Motor control connector CN1
Description
Emergency stopPA612GND
PWM-UHPC634GND
PWM-ULPA756GND
PWM-VHPC778GND
PWM-VLPB0910GND
PWM-WHPC81112GND
PWM-WLPB11314PC0Bus voltage
Phase A currentPC11516GND
Phase B currentPC21718GND
Phase C currentPC31920GND
NTC bypass relayPB122122GND
Dissipative brake PWM
+5V power+5V2526PC5Heatsink temperature
PFC SYNCPB4 and PD227283.3V power
PFC PWMPB52930GND
Encoder APA03132GND
STM32F103Z
pin
PA3 through
0 ohm resister
unfitted
CN1
pin #
2324GND
CN1
pin #
STM32F103Z
pin
Description
Encoder BPA13334
16/48
PA2
Encoder index
Page 17
UM0488Connectors
3.2 Analog input connectors CN2, CN3 and CN5
Figure 5.Analog input connector CN2, CN3 and CN5 bottom view
12
5
43
Table 17.Analog input connector CN2, CN3 and CN5
Pin numberDescriptionPin numberDescription
1GND4GND
2GND5
3GND
Analog input PC3, PC2 and PC1
for CN2,CN3 and CN5 respectively
3.3 CAN D-type 9-pin male connector CN4
Figure 6.CAN D-type 9-pin male connector CN4 (front view)
Table 18.CAN D-type 9-pins male connector CN4
Pin numberDescriptionPin numberDescription
1,4,8,9NC7CANH
2CANL3,5,6GND
3.4 QST connector CN6
The QST connector is designed to connect the STM3210E-EVAL to the QST evaluation
board to demonstrate the QST function.
3.8 Daughter board extension connectors CN10 and CN11
Two 70-pin male headers CN10 and CN11 can be used to connect a daughter board or
standard wrapping board to the STM3210E- EVAL evaluation board. All total 112 GPI/Os are
available on it. The space between these two connectors and the position of power, GND
and RESET pins (marked in gra y in Table 23 and Table 24) are defined as a stan dard which
allows to develop common daughter boards for several evaluations boards . The standard
width between CN10 pin1 and CN11 pin1 is 2700 mils (68.58 mm). This standard is
implemented on the majority of evaluation boards.
Each pin on CN10 and CN11 can be used by a daughter board after disconnecting it from
the corresponding function b lock on the STM3210E-EV A L e valuation board, as described in
Table 23 and Table 24.
Table 23.Daughter board extension connector CN10
Pin #DescriptionAlternative function
1GND --
3PC7MC/Smartcard
5PC9MicroSD cardRemove SD card from MicroSD card connector.
7PA9UASRT1_TX9P A0MC/Wakeup/USART2_CTSKeep JP4 on open.
11--13PA12USB_DPRemove R82.
15PA14Debug_TCK17PC10IrDA_TX/MicroSDcard_D2Remove SD card from MicroSD card connector.
19GND-21PD0FSMC_D223PE2Trace_CLK/FSMC_A23-
25PD2MicroSDcard_CMD/MC
How to disconnect from function block on
STM3210E-EVAL board
Disconnect STM3210E-EVAL evaluation board from
motor power drive board.
Keep JP16 on open.
Disconnect STM3210E-EVAL evaluation board from
motor power drive board.
A 3.5 mm stereo audio jack CN15 connected to the audio DAC is a vailable on the
STM3210E-EVAL board.
3.13 TFT LCD connector CN16
One 30-pin male header is av ailab le on the boar d to connect the LCD mod ule board MB694
to the FSMC interface of the STM32F103 Z. Ref er to Section 2.17: Display and input devices
on page 13 for details.
3.14 Power connector CN17
Your STM3210E-EVAL evalua tion board can be p owered f rom a DC 5V pow er supply via the
external power supply jack (CN17) shown in Figure 14. The central pin of CN17 must be
positive.
Figure 14. Power supply connector CN17 (front view)
DC +5V
GND
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ConnectorsUM0488
3.15 Smartcard connector CN18
Figure 15. Smartcard connector CN18 (front view)
17 18
5678
Table 28.Smartcard connector CN18
Pin numberDescriptionPin numberDescription
1VCC5GND
2RST6NC
3CLK7I/O
4NC8NC
17Detection pin of card presence18Detection pin of card presence
28/48
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UM0488Schematic diagrams
4 Schematic diagrams
This section provides the design sche matics f or the STM3210E-EVAL board ke y f eatures , to
help you implement these features in your applications. Schematics are provided for:
●Microcontroller connections, see Figure 16
●MCU, see Figure 17
●Peripherals, see Figure 18
●RS232 and IrDA connectors, see Figure 19
●Audio, see Figure 20
●LCD and joystick connections, see Figure 21
●SD card and smartcard, see Figure 22
●Motor control, see Figure 23
●JTAG and trace connectors, see Figure 24
●Power supply, see Figure 25
●SRAM and Flash, see Figure 26
●Color LCD module, see Figure 27
29/48
Page 30
Schematic diagramsUM0488
Figure 16. Microcontroller connections
STM3210E-EVAL
Titl e:
STMicroelectronics
BNC1
BNC2
BNC1
BNC2
BNC3
BNC3
2008-05-21MB672111
Dat e:
D.2(PCB.SCH)
Number:Rev:Sh eet of
Flash_CS
Flash_SCK
Flash_MISO
Flash_MOSI
LED4
LED3
LED1
LED2
USB_DM
USB_DP
USB_Di sconne ct
TemperatureSensor_INT
TemperatureSensor_SCL
TemperatureSensor_SDA
CAN_TX
CAN_RX
MC_EmergencySTOP
MC_Cu rrent A
MC_Cu rrent B
MC_PFCsync1
MC_PFCsync2
MC_WL
MC_VH
MC_VL
MC_UH
MC_UL
MC_WH
MC_NTC
U_Mot orCtrl
MotorCtrl.SchDoc
MC_WL
MC_PFCsync1
MC_PFCsync2
FSMC_NBL1
FSMC_NWAIT
FSMC_INT2
U_MC U
MCU.SchDoc
FSMC_INT2
FSMC_NBL1
FSMC_NWAIT
MC_D issi pative Brake
MC_VL
MC_UL
MC_VH
MC_UH
MC_WH
MC_NTC
MC_DissipativeBrake
FSMC_NE3
D[0 ..1 5]
FSMC_NCE2
FSMC_NE2
FSMC_NWE
FSMC_NOE
FSMC_NBL0
D[0..15]
FSMC_NE3
FSMC_NE2
FSMC_NOE
FSMC_NWE
FSMC_NBL0
FSMC_NCE2
MC_Cu rrent C
MC_PFCpwm
MC_E nA
MC_E nB
MC_HeatsinkTemperature
MC_BusVoltage
MC_E nIndex
MC_EnB
MC_E nI nde x
MC_PFCpwm
MC_BusVoltage
MC_ Heat si nkT emper at ur e
A[0 ..2 3]
A[0..23]
U_LCD&J oystick
MC_E nA
MC_CurrentA
MC_CurrentB
MC_CurrentC
MC_EmergencySTOP
RESET#
LCD_b ackl ight
User _Butt on
FSMC_NE4
D[0..1 5]
A[0..2 3]
FSMC_NWE
FSMC_NOE
LCD&J oysti ck.S chD oc
User _Butt on
FSMC_NE4
LCD_b ackl ight
Audi o_ LIN
Audi o_ RIN
Audi o_ PDN
Audio_ LIN
Audi o_RIN
Audi o_ PDN
JOY_ SEL
JOY_ DOW N
JOY_ LEFT
JOY_ RIGHT
JOY_ UP
LCD_C S
LCD_C LK
Ant i_T ampe r
WAKEUP
JOY_ UP
WAKEU P
Anti _Tamper
MCO
I2 C _S C K
I2 C _S D A
MCO
Audi o_SCK
Audi o_ SDA
LCD_D I
LCD_D O
U_Per iphera ls
Peripherals.SchDoc
LED4
LED3
LED1
LED2
LCD_C S
JOY_ SEL
JOY_ LEFT
JOY_R IGHT
JOY_ DOW N
I2 S _ CM D
I2 S _ D IN
I2 S _ CK
I2 S _ M CK
I2S _ CK
I2S _ D IN
I2S _ CM D
I2S _ M CK
SPI1_CS
SPI1_SCK
SPI1_MOSI
SmartC ard_ 3/5V
SmartCard_IO
SmartCard_RST
SmartCard_CLK
SmartCard_OFF
SmartCard_CMDVCC
SmartCard_IO
SmartCard_RST
SmartCard_OFF
SmartCard_CLK
Smart Card_ 3/5V
SmartCard_CMDVCC
USB_DP
USB_ DM
SPI1_MISO
MicroSDCard_D0
MicroSDCard_D0
USB_Di sconne ct
MicroSDCard_CLK
MicroSDCard_CMD
MicroSDCard_D1
MicroSDCard_D2
MicroSDCard_D3
MicroSDCard_Detect
MicroSDCard_D1
MicroSDCard_D2
MicroSDCard_D3
MicroSDCard_CLK
MicroSDCard_CMD
MicroSDCard_Detect
Potentiometer
TRACE _D3
TRACE _D2
TRACE _D1
TRACE _D0
U_JTAG& SWD
JTAG& SWD .SchD oc
CAN_TX
CAN_RX
TemperatureSensor_INT
TRACE _D3
TRACE _D2
TRACE _D1
Potentiometer
TRACE _D0
TDI
RESET#
TRACE _CK
TRST
TMS/SWDIO
TCK/S WCLK
TDO/SW O
TDO/SW O
TRACE _CK
TCK/S WCLK
U_Pow er
Power.SchDoc
TDI
TRST
RESET#
TMS/ SWDIO
USA RT2_ RX
USA RT2_ TX
USAR T2_R TS
USAR T2_C TS
USA RT1_ TX
USA RT1_ RX
IrD A _ R X
IrD A _ T X
IrD A_ T X
IrD A _ R X
USA RT2_ TX
USA RT1_ TX
USART2_ RX
USART1_ RX
USAR T2_R TS
USAR T2_C TS
U_SRAM &Flas h
SRAM&Flash.SchDoc
U_Au dio
Audio. Sch Doc
U_SD&Smart Card
SD&Smart Card.SchDoc
30/48
U_RS 232&Ir DA
RS232&IrDA.SchDoc
Page 31
UM0488Schematic diagrams
Figure 17. MCU
TP2
Ground
PC15
JP10
+3V3
PA2
PA3PA4
PA5PA6
PB10PB11
PB12PB13
PB14
PB15
PD9PD10
PD11PD12
PD13
PG2PG3
PG4PG5
PG6PG7
PG8
PD14PD15
PE12PE13
PE14PE15
PA7
PC0PC1
PC2PC3
PC5
PF11
PG0
PA8
PA11
PC6
PC12
PE1PE2
PB3
PG9
PC13PC14
PF1
PE3PE4
PE5PE6
TP1
Ground
QST connector
+5V
PA6
PA7
PA5
2008-05-21MB672211
Dat e:
(Right)
12345678910
CN11
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
PA1
PB0
PB1
PB2
PD8
820
820
R14
R11
D5V
PC13
RESET#
PE7PE8
PE9PE10
PE11
PG1
PC4
PF12PF13
PF14PF15
(Left)
67 68
69 70
12345678910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
Header 35X2
CN10
PA0
PA9PA10
PA12PA13
PA14PA15
PC7PC8
PC9
PC10PC11
PD0PD1
PF10
+3V3
PD2PD3
PB4PB5
PB6PB7
PD4PD5
PD6
PB8PB9
PD7
PE0
PG10PG11
PG12PG13
PG14PG15
JP9
D5V
69 70
Header 35X2
PF0
PF2PF3
PF4PF5
PF6PF7
PF8PF9
+3V3
Extension connector
12345678910
CN6
PB6
+5V
11 12
13 14
Header 7X2
PA8
PB1
PF11PB5
PB7
D.2(PCB.SCH)
STM3210E-EVAL MCU
Titl e:
Number:Rev:Sheet of
STMicroelectronics
MCU
MC_PFCsync2
FSMC_NCE2
FSMC_NWE
FSMC_NOE
FSMC_NWAIT
FSMC_NBL0
TRACE _CK
TRACE _D3
TRACE _D2
TRACE _D1
Use r_Bu tt on
JOY_ SEL
JOY_ LEFT
JOY_ RIGHT
JOY_ UP
FSMC_NE2
D[0 ..1 5]
A[0 ..2 3]
A[0..23]
D[0..15]
PG13
PG14
PG15
132
129
128
PG15
PG14
FSMC_INT2
FSMC_NE3
FSMC_NE4
Audi o_PDN
A9
A10
A11
A12
A13
A14
A15
PF15
PG0
PG1
PG2
PG3
PG4
PG5
PG6
PG7
PG8
PG9
PG10
PG11
PG12
124
125
126
127
93
PG9
PG10
PG11
PG12
PG13
56
57
87
PG2
PG388PG489PG590PG691PG792PG8
55
PG0
PG1
LED3
LED1
LED2
LED4
LCD_C S
Micr oS DCar d_ Detec t
A19
A20
A21
A0A1A2A3A4
A5
A6A7A8
D11
D12
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
PF8
PF9
PF10
PF11
PF12
PF13
PF14
21
22
PF10
PF1149PF1250PF1353PF1454PF15
12
PF2
PE14
PE15
68
PF010PF111PF313PF414PF515PF618PF719PF820PF9
A22
D4D5D6D7D8D9D10
PE3
PE4
PE5
PE6
PE7
PE8
PE9
PE10
PE11
PE12
PE13
64
5
60
65
PE758PE859PE9
PE1063PE11
PE12
PE1366PE1467PE15
TRACE _D0
FSMC_NBL1
A17
A18
A23
PE2
PE0
PE1
141
142
1
PE0
PE1
PE2
PE32PE43PE54PE6
A16
D14
D15
D0
D1
PD9
PD10
PD11
PD12
PD13
PD14
PD15
78
86
PD1079PD1180PD1281PD1382PD1485PD15
MicroSDCard_CMD
JOY_ DOW N
D2
D3
D13
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
122
123
114
115
116
117
118
119
PD6
PD7
PD877PD9
PD0
PD1
PD2
PD3
PD4
PD5
Defaul t setting: 2<->3
321
USAR T2_C TS
OSC_ OU T
PA135PA236PA337PA440PA541PA642PA7
PA0-WKUP
U8A
34
PA0
PA1
JP4
MC_E nB
MC_EnA
USA RT2_ TX
USAR T2_R TS
WAKEU P
MC_E nIndex
PA8
PA9
PA10
PA11
PA12
PA13
43
109
100
101
102
103
104
105
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
USB_ DM
Audi o_ RIN
do not fit
R2
R31 0
USA RT2_ RX
MC_D is si pati veB rak e
USB_ DP
USART1_ TX
USART1_ RX
TMS/SWDIO
JP3
Defaul t setting: Open
MC_UL
SPI1_SCK
Audi o_LIN
SPI1_MISO
SPI1_MOSI
MC_EmergencySTOP
PB046PB147PB2
PB3
PB4
PB5
PB6
PB7
PB8
PA14
PA15
110
PA15
TDI
TCK/ SWCLK
MCO
LCD_ba ckl ight
48
PB0
PB1
PB2
MC_WL
TP11
MCO
MC_VL
Smart Card_ 3/5V
+3V3
PB9
PB1069PB1170PB1273PB1374PB14
133
134
135
136
PB3
PB4
PB5
PB6
I2 C _S C K
TDO/S WO
R43
10K
SPI1_CS
2
MC_PFCsync1
3
1
BOOT1
75
137
139
140
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
I2 S _ CK
CAN_RX
I2 C _S D A
SmartCard_IO
SmartCard_RST
USB_Di sconne ct
JP11
Defaul t setting: close
TRST
I2S _ CM D
MC_PFCpwm
SmartCard_CLK
MC_NTC
TemperatureSensor_INTCAN_TX
PC026PC127PC228PC3
PC4
PB15
76
PB15
I2 S _ D IN
PC5
29
44
45
PC0
PC1
PC2
PC3
PC4
PC5
PC6
Pote ntio meter
MC_BusVoltage
MC_Cu rrent A
MC_Cu rrent B
MC_Cu rrent C
MC_H eatsinkT emperat ure
JP16
JP15
MC_UH
I2S _ M CK
SmartCard_CMDVCC
Defaul t setting: close
PC696PC797PC9
98
PC7
PC8
Defa ult se tting: clos e
JP17
MC_VH
SmartCard_OFF
PC13-ANTI_TAMP7PC14-OSC32_IN8PC15-OSC32_OUT
PC8
PC10
PC11
PC12
9
99
111
112
113
PC9
PC10
PC11
PC12
PC13
PC14
PC15
Anti _Tamper
MicroSDCard_CLK
Defa ult se tting: clos e
JP22
Defaul t setting: Open
MC_WH
IrD A_ T X
IrD A _ R X
MicroSDCard_D0MicroSDCard_D1
MicroSDCard_D2
MicroSDCard_D3
OSC_ IN
BOOT0
NC
24
23
138
106
R45
10K
2
8MHz (with socket)
BOOT0
C47
20pF
3
1
+3V3
C44
10pF
R39
0
41
32
X2
C43
10pF
R135
0
MC306-G-06Q-32.768 (manufacturer JFVNY)
NRST
STM32F103ZET6
IC149-144-045-B5
25
RESET#
R40
390
X1
C48
20pF
C94
R119
+3V3
RESET#
100nF
10K
B1
RESET
43
1
2
31/48
Page 32
Schematic diagramsUM0488
Figure 18. Peripherals
10K
PC2
BNC1
2RV1
R126
PC3
BNC2
BNC3
13
C100
10nF
0
1
2
3
4
5
1
2
3
4
5
1
2
3
4
5
SPI Flash
Potentiometer
U6
C14
100nF
+3V3
CN5
VB33 4
6
D5C
HOLD7VCC8S1Q
+3V3
3
4
W
VSS
M25P64 -VME 6G
2
2008-05-21
Date:
D.2(PCB.SCH)
BNC connector
R350R37 0
CN3
VB33 4
CN2
VB33 4
PB2
PA6
PA5
PA7
Flash_CS
Flash_SCK
Flash_MISO
Flash_MOSI
STMicroele ct roni cs
MB52 5311
STM3210E-EVAL Peripherals
Title :
Number:Rev:Sheet of
12
LD1
Green
R96
PF6
LED1
LD2
600
12
LD3
Orang e
R97
600
PF7
LED2
12
Red
LD4
R98
600
PF8
LED3
12
Blue
R99
600
PF9
LED4
LED
R13650
JP2 3
JP2 3-25 De faul t setti ng: open
+3V3
Poten tio meter
PC4
R13750
R13850
JP2 5
JP2 4
PC1
USB
CN4
DB9-m ale CAN connec tor
+3V3
R27
R26
+3V3
162738495
Default setting: Open
JP8
0
Defa ult sett ing : 1<->2
3
2
1
10K
C27
100nF
U4
JP6
7
8
RS
CANH
D1GND2VCC3R
PB9
CAN_ TX
R28
120
6
5
Vref
CANL
SN65 HVD230
4
R32
0
PB8
CAN_ RX
USB_D iscon nec t
USB_D M
USB_D P
PA12
PA11
R82 0
R81 0
U5V
C74
100nF
R69
1.5 K
4
5
6
I/O2
I/O1
Vbus
I/O11GND2I/O2
U11
USBLC6-2P6
T2
3
31
+3V3
R95
1M
U5V
1D-2D+3
4
VCC
GND
CN14
USB-typeB connector
SHELL0SHELL
C78
4.7nF
0
+3V3
T1
R65
36K
31
2
9013
R70
10K
U5V
PB14
321
JP1 4
R66
47K
2
9013
CAN
C49
100nF
+3V3
7
8
A25A16A0
R9
0
+3V3
R10
do not fit
+3V3
R51
VDD
SDA1SCL2OS/IN T3GND
U9
4
4K7
0
R460R440R38
PB6
PB7
PB5
TemperatureSensor_ INT
TemperatureSensor_ SCL
TemperatureSensor_ SDA
Temperature sensor
STLM75M2E
32/48
Page 33
UM0488Schematic diagrams
Figure 19. RS232 and IrDA connectors
CN8
DB9-m ale US ART2
162738495
R33
do not fit
SD5TxD
U13
3
4
R88
10K
+3V3
JP2 1
R89 0
Defa ult sett ing: closePA0
PC10
PC11
IrDA_RX
IrDA_T X
+3V3
connector for USART2
GND
Anode (VCC2)1Cathode2RxD
VCC16Vlogic
8
7
R92
5
R85
47
TFDU 4300
C72
C77
C68
C71
CN12
IrDA
0.1 uF
4.7 uF
0.1 uF
4.7 uF
DB9-m ale US ART1
162738495
R62
do not fit
STMicroelect roni cs
2008-05-21
Date :
D.2(PCB.SCH)
MB67 2411
STM3210E-EVAL RS232&IrDA
Title :
Number:Rev:Sheet of
connector for USART1
C37
100nF
+3V3
16
VCC
V+
U5
2
C28
100nF
C30
5
C2-
C1+1C1-
RS232 _TX2
RS232 _RX2
RS232 _CTS 2
14
PA2
T1out
T1in11R1ou t
USART2 _TX
RS232 _RTS 2
8
13
R1in
12
R29 0
PA3
USART2 _RX
15
7
R2in
GND
T2out
R2ou t
T2in
V-
9
10
R30 0
PA1
USART2 _RTS
USART2 _CTS
ST32 32ECT R
6
C31
100nF
100nF
4
C2+
3
C29
100nF
C52
100nF
+3V3
C40
5
16
C2-
VCC
C1+1C1-
V+
U7
2
C39
100nF
RS232 _RX1
RS232 _TX1
100nF
8
13
4
14
C2+
R1in
T1out
T1in11R1ou t
3
12
C41
100nF
R36 0
PA9
PA10
USART1 _TX
USART1 _RX
15
7
R2in
GND
T2out
R2ou t
T2in
V-
9
10
R34 10K
ST32 32ECT R
6
C42
100nF
33/48
Page 34
Schematic diagramsUM0488
Figure 20. Audio
2008-05-21MB67 251 1
Date :
CN15
ST-225 -02
123
C80
6.8
HPR
HPL
SPN
SPP
47uF
47uF
R87
6.8
C76
0.2 2uF
R86
10
C67
0.2 2uF
R73
10
TP9
RIN
U14
KSS- 1508
1
2
C56
1uF
C70
R84
TP8
TP10
TP13
TP12
Audio_ RIN
Audio_ LIN
STMicroele ct ronics
D.2(PCB.SCH)
STM3210E-EVAL Audio
Title :
Number:Rev:Sheet o f
PA5
PA4
R67 0
R68 0
C55
do not fit
C58
do not fit
C54
100nF
C34
TP6
LIN
C57
1uF
100nF
+3V3
C65
10uF
C53
2.2 uF
Defa ult sett ing : 1<->2PC6
R56 0
I2S_MCK
TP7
321
R57
PA8
MCO
12
29
32
23
24
HPL
HPR
MCKI17MCKO
U10
18
MCKO
JP1 8
do not fit
1
19
20
SPP
SPN
TEST2
TEST1
RIN1/IN 1+
LRCK13BICK
I2S_CMD
14
PB13
I2S_CK
CCLK/SCL9CDTI/SD A
I2C6PDN
CSN/CAD 0
8
+3V3
PB7
PB6
Audio_ SCK
Audio_ SDA
SDTI
11
PB12
PB15
I2S_DIN
27
30
31
5
LIN1 /IN1 -
MIN/LIN328RIN2/IN 2-
LIN2 /IN2 +
LOUT/R CP
VCOC/R IN3
MUTET
7
10
25
C59
1uF
R72
10K
R128 0
PG11
Audio_ PDN
4
26
AVDD
ROUT /RCN
DVD D15DVSS
16
C66
100nF
C73
10uF
R83
10
+3V3
3
AVSS
HVD D21HVSS
+3V3
2
VCOM
Jumper to s elect PLL slave clo ck mode:
1. 1<->2 reference clock MCKI
2. 2<->3 reference clock BICK or LRCK
I2C control interface selected (share with
tempe ratur e sen sor) b y co nnecti ng pin "I2C"
to hi gh, the sla ve addre ss is set to "0 010011 "
EMERGE NCY STO P1MC-UH3MC_UL5MC_VH7MC_VL9MC_WH11MC_WL13CURRENT A15CURRENT C19CURRENT B17NTC BY PA SS R E LAY21DISS IPATI VE BRAKE23+5V POWER25PFC SYNC27PFC PWM29Enco der A31Enco der B
Motor control connector
CN1
PC6
GND16GND18GND20GND22GND
BUS VOLTAGE
PA7
PC7
PB0
PC8
PB1
2008-05-21
STMicroele ct ro ni cs
Date:
D.2(PCB.SCH)
MB67 2811
STM3210E-EVAL Motor Control
Title :
Number:Rev:Sheet of
MC_HeatsinkTemperature
100K
PC5
100nF
R1
0
+3V3
24
26
28
3.3 V Power
Heatsink Temperature
+5V
PA3
PB12
C6
PB5
GND30GND
MC_EnIndex
PA2
100nF
32
PA0
C3
do not fit
34
Encoder Index
do not fit
C4
C1
do not fit
MC_c onnect or
33
Defa ult sett ing: O pen
PA1
C2
JP2
10nF
C5
do not fit
BNC1
BNC2
MC_WL
MC_VH
MC_VL
MC_UH
MC_UL
MC_WH
MC_NTC
MC_Dis sipa tiveBr ake
C8
1nF
R7
3.3 K
+3V3
R8
0
PA6
MC_EmergencySTOP
PC1
R5 0
C22
do not fit
PC2
MC_CurrentA
MC_CurrentB
BNC3
MC_PFCpwm
MC_EnA
MC_EnB
Default setting: Open
C60
do not fit
JP2 0
C51
do not fit
C13
R4 0
R3 0
do not fit
C9
do not fit
PB4
PD2
PC3
MC_PFCs ync1
MC_PFCs ync2
MC_CurrentC
37/48
Page 38
Schematic diagramsUM0488
Figure 24. JTAG and trace connectors
2008-05-21
Date :
D.2(PCB.SCH)
MB67 291 1
STM3210E-EVAL JTAG&Trace
STMicroelect roni cs
Title :
Number:Rev:Sheet of
JP1 9
Default setting: Open
R55
do not fit
R52
+3V3
R64
10K
R59
10K
R53
10K
R58
10K
+3V3
PB4
PB3
PA15
PA14
PA13
+3V3
12345678910111213141516171819
CN9
JTAG
R54
10K
KEY
+3V3
TDI
RESET#
TRST
TMS/SWDIO
TCK/ SWCLK
TDO/S WO
12345678910111213141516171819
CN7
FTSH-110-01-L-DV
10K
R48 10K
R47 10K
20
JTAG connector
PE2
PE3
PE4
PE5
R49 0
R50 do not fit
R60 0
R61 do not fit
20
PE6
TRACE_ D3
TRACE_ D2
TRACE_ D1
TRACE_ D0
TRACE_ CK
Trace connector
38/48
Page 39
UM0488Schematic diagrams
Figure 25. Power supply
+3V3
C11
TP5
3V3
U15
ZEN05 6V13 0A24LS
10 0nF
C69
47uF
2
Vout
GND
1
Vin
U1 2
LD 1086D2 M33
+5V
E5V
U16
3
3
CV
SV1SG
3
1
C61
C81
22 0uF
10uF
CG14CG25CG3
2
6
C85
Z1
SMAJ5. 0A- TR
2
Power regulator
TP16
Grou nd
BNX0 02-0 1
LD 5
red
12
100nF
R127
300
TP4
5V
+5V
123456
JP1 3
Defa ult se tting : 5<->6
Jumper for choice between power connector, USB connector or daughter board
TP3
VREF
+3V3
VREF+
C45
10nF
VDD
131
U8B
71
C18
100nF
C19
10 0nF
C26
100nF
C38
100nF
VDD
C23
100nF
C32
100nF
JP1 2
L1
BEAD
62
17
52
84
95
121
VDD _7
VDD _5
VDD _6
VDD _8
VDD _9
VDD _10
VDD _11
VSS_5
VSS_4
VSS_6
VSS_1
107
VSS_761VSS_10
VSS_2
VSS_3
16
38
51
143
C25
10 0nF
C33
100nF
C35
100nF
VDD
C17
100nF
C36
100nF
C46
10nF
C50
10uF
VDDA
R42
47
VDD A
6
32
39
VDD _4
VSS_8
83
33
72
108
144
VBAT
VDDA
VREF +
VDD _1
VDD _2
VDD _3
VSSA30VREF-
VSS_9
VSS_11
31
94
120
130
R41
0
VREF-
STMicroelectroni cs
BT1
CR 1220 ho lder
321
JP1+3V3
Vbat
STM32F 103ZE T6
2008-05-21
Date :
D.2(PCB.SCH)
MB67 21011
STM3210E-EVAL Power
Title :
Number:Rev:Sheet of
Def ault se tting : 2<->3
MCU power
132
CN17
DC-10 B
D5VU5VE5V
39/48
Page 40
Schematic diagramsUM0488
Figure 26. SRAM and Flash
R25
do not fit
R24
10K
+3V3
C88
100nF
C24
+3V3
12
13
37
VSS
VDD
VDD
I/O029I/O130I/O231I/O3
U3
32
D0D1D2D3D4D5D6
D11
D12
D13
D14
D15
G4
F5
G6
F6
G7
DQ11
DQ12
DQ13
DQ14
DQ15A- 1
36
VSS
I/O441I/O542I/O643I/O7
G3
F4
DQ10
100nF
19
WP
R8E
CL16AL17W
18
44
D7
A16
A17
+3V3
F3
DQ8
DQ9
E4
H4
H5
E5
H6
E6
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
C21
100nF
7
RB
NAND51 2W3 A2BN6E
NAND51 2W3 A2CN6E
9
C15
R22
R23
10K
D0D1D2D3D4D5D6D7D8D9D10
E3
H3
DQ0
DQ1
0
FSMC_N CE2
100nF
C62
100nF
C75
100nF
+3V3
D8
G5
H2
E8
F1
H7
VSS
VSS
VSS
VCC
VCC
VCC
123
Defa ult sett ing: 2 <->3
JP7
Rev D. 2 modi ficat ion : re feren ces of NOR f lash use d for U2 updat ed
Added information on NOR Flash references in Section 2.20.
Updated schematics in Section 4.
Modified cover page. Inserted a newChapter 1.
Modified bank specified in Section 2.17, Section 2.18, Section 2.19
and Section 2.20.
47/48
Page 48
UM0488
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