ST STi7109 User Manual

STi7109

Low-cost HDTV set-top box decoder for H.264 and Microsoft WMA9

Data Brief

Features

■ The STi7109 is a single-chip, high-definition

video decoder including: –Microsoft

support

–Linux

compatible ST40 CPU core: 266 MHz – transport filtering and descrambling – video decoder: VC-1 (including WMA 9),

H.264 (MPEG-4 part 10) and MPEG-2 – SVP compliant – Windows – graphics engine and dual display: standard

and high-definition – audio decoder: including Windows Media

Audio 9 (WMA-9) and WMA-9 Pro – DVD data retrieval and decryption

ST40 core 266 MHz

UDI

MMU

VC-1, WMA9 and H.264

, Windows® CE and OS21

DRM support

5 x 2-ch

PCM out

2-ch

PCM in

Audio decoder

and interfaces

16 K Icache

Int. control

32 K Dcache

Video

LMI

DDR

SDRAM

System

LMI

AudioL AudioR

Audio DACs

ST231

core

S/PDIF

video in

interface

Digital

video input

■ The STi7109 also features the following

embedded interfaces: – USB 2.0 host controller/ PHY interface – DVI/HDMI

™

output – digital audio and video auxiliary inputs – low-cost modem – 100BT ethernet controller with integrated

MAC and MII/ RMII interface for external PHY

– serial ATA (SATA)

Peripheral I/O

and external interrupts

Serial

ATA

USB

2.0

2x I/F

SmCard

6x GPIO

Tx/Rx

ILC

MAFE

interface

UARTs

PWM

SSCs

STBus

3 x GDP

2 x PDES

PTI

TSmerger/router

TSIN1 TS I/O

TSIN0

NRSS-A

PTI

Clock

generator

and system

services

FDMA

Ethernet,

MII/RMII

MII/RMII for 100BT

Ethernet

Video decoder

VC-1 (inc WMV-9)

H264/MPEG-2

ST231

core

DVI-HDCP

HDMI

TMDS main video

output (HD)

2D gamma

blitter

CUR

Output stage

DACs

Main video output (HD)

YPbPr

Display

compositor

DENC

DACs

Aux video

output (SD)

YC/CVBS

DEI

Main video

display

Aux video

display

EMI

EMPI

Flash

or companion chip

December 2006 Rev 2 1/9

For further information contact your local STMicroelectronics sales office.

www.st.com

Description STi7109

1 Description

The STi7109 is a new generation, high-definition set-top box / DVD decoder chip, and provides very high performance for low-cost HD systems. STi7109 includes both Windows Media Video 9 and H.264 video decoders for new, low bit rate applications.

Based on the Omega2 (STBus) architecture, this system-on-chip is a full back-end processor for digital terrestrial, satellite, cable, DSL and IP client high-definition set-top boxes, compliant with ATSC, SMPTE VC-1, DVB, DIRECTV, DCII, OpenCable and ARIB BS4 specifications. It includes all processing for DVD applications.

The STi7109 demultiplexes, decrypts and decodes HD or SD video streams with associated multichannel audio. Video is output to two independently formatted displays: a full resolution display intended for a TV monitor, and a downsampled display intended for a VCR or DVDR. Connection to a TV or display panel can be analog through the DACs, or digital through a copy protected DVI/HDMI. Composite outputs are provided for connection to the VCR with Macrovision protection. Audio is output with optional PCM mixing to an S/PDIF interface, PCM interface, or through integrated stereo audio DACs.

Digitized analog programs can also be input to the STi7109 for reformatting and display.

The STi7109 includes a graphics rendering and display capability with a 2D graphics accelerator, three graphics planes and a cursor plane. A dual display compositor provides mixing of graphics and video with independent composition for each of the TV and VCR/DVD-R outputs.

The STi7109 includes a stream merger to allow seven different transport streams from different sources to be merged and processed concurrently. Applications include DVR timeshifted viewing of a terrestrial program, while acquiring an EPG/data stream from a satellite or cable front end.

The flexible descrambling engine is compatible with required standards including DVB, DES, AES and Multi2.

The STi7109 embeds a 266 MHz ST40-202 CPU for applications and device control. A dual DDR1 SDRAM memory interface is used for higher performance, to allow the video decoder the required memory bandwidth for VC-1/HD H.264 and sufficient bandwidth for the CPU and the rest of the system. A second memory bus is also provided for flash memory, storing resident software, and for connection of peripherals. This bus also has a high speed synchronous mode that can be used to exchange data between two STi7109 devices. This can be used to connect a second STi7109 as a co-decoder for a dual TV STB application.

A hard-disk drive (HDD) can be connected either to the serial ATA interface, or as an expansion drive through the USB 2.0 port.

For IP-TV applications, the integrated 100BT Ethernet controller and MII/RMII interface can be used for generic Ethernet delivery, as shown in Figure 4: Low-cost HD IP-TV set-top box

with HDD on page 4.

The USB or Ethernet interfaces can also be used to connect to a DOCSIS 2.0 CM gateway for interactive cable applications.

The STi7109 is supported by STMicroelectronics’ STAPI software, and is compatible with the STx7100 and STi7710.

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STi7109 Description

Figure 1. Low-cost satellite HD set-top box

IR Tx/Rx

Flash

PTSN

QPSK Rx

STV0299

+STi6000

MAFE

Transport stream in

2 x 128 Mbit

DDR1

Smart

cards

2 x 128 Mbit

DDR1

STi7109

Figure 2. Low-cost cable HD set-top box with return channel

CableCARD™

interface

Flash

2 x 128 Mbit

DDR1

RGB/YPbPr/ HDMI

CVBS/YC

2 x 128 Mbit

DDR1

VCR

Broadcast

IB data/

OOB

Tuner and SAW filter

Duplex filter

Upstream

PGA

STV0498B

Cable

front end

QAM/QPSK

transceiver

Tx/Rx

EMI

STi7109

RGB/YPbPr/ HDMI

CVBS/YC

RS232

Smart cards

VCR

3/9

+ 6 hidden pages