STi5262
Advanced SD STB decoder with
integrated DVB-T/DVB-C demodulator
Data brief
Features
■ Combined DVB-T/-C receiver
– Compatible with low to high IF tuners
– DVB-T demodulation
– DVB-C demodulation
– DVB-CI compliant output
– I²C serial bus interface
■ Advanced standard-definition video decoding
(H264/VC-1/MPEG2/AVS)
■ Advanced multi-channel audio decoding
(MPEG 1, 2, MP 3, DD/DD+, AAC/AAC+, and
WMA9/WMA9pro)
■ Linux, Windows CE, and OS21 compatible
ST40 applications CPU
■ 16-bit DDR1/DDR2 compatible local memory
interface
Resets Analog out
JTAG
Clocks
Modes
PCM I/O
S/PDIF out External interrupts
■ Multi-stream, DVR capable transport stream
processing
■ Connectivity through dual USB 2.0 hosts and
optionally through Ethernet MAC/MII/RMII
Description
The STi5262 uses state-of-the-art process
technology to provide a fully featured SD AVC,
DVB-C, and DVB-T demodulator/decoder IC.
It is a highly integrated system-on-chip, suitable
for STB markets across cable, terrestrial, and
terrestrial/IP hybrid networks worldwide.
STB peripherals I/O
CPU/FPU
ST40
MMU
Interrupts
I cache
D cache
Timer
Debug
Transport
Security
Transport streams
Parallel/serial in/out
Clock Gen
System serv
Dual FDMA
Bdisp Blitter
Video decoder
Demodulator
DVB-T
DVB-C
streams
IF inTransport
Audio I/O
PCM players
PCM reader
DACs
Audio decoder
CPU
STBus
Display
Peripherals
SSC
UART
MAFE
PWM
Infrared
Smartcard
Video I/O
Denc
Teletext
DACs
HDMI
VTGs
DVP
Analog video SD out
System
interfaces
EMI
SPI
LMI
Connectivity
Flash, SFlash
Flash, SFlash
NOR, NAND
NOR, NAND
Serial Flash
DDR1/DDR2
Memory
USB
Ethernet
(option)
DAA
March 2010 Doc ID 17219 Rev 1 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Introduction STi5262
1 Introduction
The STi5262 is targeted at the latest Operator and CE manufacturer requirements for STBs
that use advanced SD decoding (H264/VC-1/MPEG2), and which conform to DVB, ISMA,
ATIS-IIF, SCTE, ATSC, ARIB, CEA, ITU, OpenCable and MSTV specifications.
The STi5262 provides a solution for operators to specify a range of low-cost, high
performance SD STBs including low-cost zappers, IP clients, interactive STBs, DVR
standalone and DVR server/home network-capable STBs, and with content delivery
possible using broadcast or broadband networks, or both (hybrid STBs).
The STi5262 offers current users of ST’s growing family of advanced decoding ICs
enhancements in performance and features, while reducing cost and time-to-market for the
next generation deployments.
Features Benefits
Combines a configurable DVB-C/DVB-T
demodulator with STB decoding and display
functions.
ST40 applications CPU,
32K I cache, 32K D cache.
STMicroelectronics’ video decoding system with
ST231 processor.
Dual USB 2.0 hosts, optional e-SATA,
Ethernet MAC with MII/RMII and TMII,
PCI.
Low-power process, design and architecture. Best-in-class, low-power standby mode, to meet
Advanced 2D graphics and display subsystem
which also supports 3D user interface effects
and 1080p60 display output.
This highly integrated SoC helps to reduce board
area and manufacturing cost, allowing low cost and
small size STBs to be designed for either DVB-C or
DVB-T networks.
Superscalar performance from a single CPU core,
using standard tools and operating systems (Linux,
OS21).
Decoding of advanced high definition standards for
MPEG2, H264, VC-1 broadcast, with the
performance and flexibility for web-based content
decoding such as Flash, DivX, MJPEG and Real.
Extensive high speed connectivity for the widest
range of STB peripherals, such as Flash drives,
external HDDs, home network controllers (for
example MoCA, Wi-Fi), DOCSIS modem and so
on.
emerging energy standards for STBs. Dynamic
configuration of power to individual sub-systems
enables power-efficient active standby modes.
Allows visually appealing user interfaces and video
rich navigation to be offered to consumers, while
high quality progressive output can be watched on
the latest high definition displays.
2/4 Doc ID 17219 Rev 1
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