ST STi5251 User Manual

STi5251
JTAG
STB peripherals I/O
Digital video ED/SD out
Resets Analog out Clocks Modes
PCM I/O S/PDIF out External interrupts
Clock Gen System serv
Peripherals
SSC UART MAFE PWM Infrared Smartcard
Connectivity
Transport Security
Analog video ED/SD out
Audio I/O
Display Video I/O
Transport streams Parallel/serial in/out
Audio decoder
ST231 CPU
Video decoder
EMI
SPI
LMI
System
interfaces
CPU/FPU
STBus
Dual PCM players
S/PDIF player DACs
FDMA
Bdisp Blitter
USB 2.0
SD-MMC/SDIO
Ethernet
Demodulator
DVB-T/
IQ/IF in
Transport streams
DDR1/DDR2
Serial Flash
Memory
Flash, SFlash NOR, NAND
PCM reader
DVB-C/FEC
Advanced SD STB processor with integrated
DVB-T/DVB-C demodulator
Data brief

Features

(H.264/VC-1/MPEG2/AVS)
Advanced multi-channel audio decoding
(MPEG 1, MPEG 2, MP3, DD/DD+, AAC/AAC+, WMA9/WMA9pro)
Linux, Windows CE
ST40 applications CPU (450 MHz)
16-bit DDR1/DDR2 compatible local memory
interface (LMI)
Embedded DVB-C or DVB-T demodulator
Multi-stream, DVR capable, transport stream
processing
Flexible ST231-based audio decoder
Flexible ST231-based advanced video
decoder
Multi-channel flexible DMA controller
Extensive connectivity (dual USB controller,
Ethernet MAC/MII/RMII/TMII and SD­MMC/SDIO)
Advanced security and DRM support including
SVP, MS-DRM, Marlin, DivX and DTCP-IP
®
and OS21 compatible
External memory interface (EMI) with NAND-
Flash, NOR-Flash, peripherals support
Dual smartcard, 4 x UART, 4 x synchronous
serial controllers (SSC), soft modem, IR transmitter and receiver, UHF Rx/SCD
4 x 4 matrix key front panel switch scanner
FSM with key de-bounce
23 mm x 23 mm x 1.7 mm package

Description

The STi5251 is a new, cost-effective SD advanced decoding STB SoC. The STi5251 is ideally suited to cable, terrestrial and terrestrial/IP hybrid networks. The STi5251 integrates in a single IC a versatile DVB-C/DVB-T demodulator/FEC (user mode selectable), multi­stream transport demux, an ST40 applications CPU, A/V decode, video processing, graphics and display, advanced security, STB peripherals, audio/video DACs, digital A/V outputs, USB 2.0 host controller with PHY and ULPI, SDIO SD­MMC controller and Ethernet GMAC controller with /MII/RMII/TMII interface.
August 2011 Doc ID 022143 Rev 1 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Introduction STi5251

1 Introduction

The STi5251 uses ST’s state of the art process technology to provide a cost-effective SD advanced decoding set-top-box SoC. It is a highly integrated solution suitable for DVB-C or DVB-T/IP STB markets worldwide.
The STi5251 provides a solution for operators to specify a range of cost-effective SD STBs including high-volume broadcast-only zapper STBs, interactive STBs and dual-stream DVR and time-shift capable STBs. Content delivery is possible using broadcast and Ethernet connectivity (Hybrid STBs).
The STi5251 is optimized for secure Pay-TV applications with integrated DVB, DES, AES, TDES and ICAM descramblers and smartcard interfaces. It also has advanced security features to further safeguard operator and content investment including secure control words, software integrity checking, JTAG locking and DRM support.
The STi5251 offers high-performance CPU and graphics subsystem, which targets the full range of software/UI platforms from basic OS/program guide to demanding middlewares, such as MHP.
Features Benefits
Combines a DVB-C/DVB-T demodulator with STB decoding and display functions
Serial Flash-based secure boot and code storage, integrated voltage regulator, 23 mm x 23 mm x 1.7 mm PBGA package
ST40-300 applications CPU @450 MHz, 32 K I cache, 32 K D cache
STMicroelectronics' DELTA video decoding system with ST231 processor
Dual USB 2.0 hosts, Ethernet MAC with MII/RMII and TMII, SD-MMC/SDIO
Low power process, design and architecture Best in class, low-power standby mode, to meet
Advanced 2D graphics and display subsystem and 480p/576p display output
This highly integrated SoC helps to reduce board area and manufacturing cost, allowing cost effective and small-size STBs to be designed for DVB-C/DVB-T networks
Enables further BOM optimization and cost reduction of advanced decoding SD STBs
Up to 800 DMIPs superscalar performance from a single CPU core, using standard tools and operating systems (Linux, OS21)
Decoding of advanced standard definition MPEG2, H.264 and VC-1/WMV9 streams, with the performance and flexibility for web-based content decoding such as Flash, DivX, MJPEG, XviD and Real
Extensive high-speed connectivity for the widest range of STB peripherals, such as Flash drives, external HDDs, home network controllers (for example MoCA, Wi-Fi), memory cards
emerging energy standards for STBs. Dynamic configuration of power to individual subsystems enables power-efficient active standby modes
Allows visually appealing user interfaces and video-rich navigation to be offered to consumers, while high-quality progressive output can be watched on the latest displays
2/4 Doc ID 022143 Rev 1
Loading...
+ 2 hidden pages