ST STG3685 User Manual

STG3685

STG3685

LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCH, SINGLE ENABLE WITH BREAK BEFORE MAKE FEATURE

■HIGH SPEED:

tPD = 0.3ns (TYP.) at VCC = 3.0V tPD = 0.4ns (TYP.) at VCC = 2.3V

■ULTRA LOW POWER DISSIPATION: ICC = 0.2µA (MAX.) at TA = 85°C

■LOW "ON" RESISTANCE VI = 0V:

RON = 0.4Ω (MAX. TA = 25°C) at VCC = 4.2V RON = 0.5Ω (MAX. TA = 25°C) at VCC = 3.0V RON = 0.6Ω (MAX. TA = 25°C) at VCC = 2.3V

■WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 1.4V to 4.3V SINGLE SUPPLY

■4.3V TOLERANT AND 1.8V COMPATIBLE THRESHOLD ON DIGITAL CONTROL INPUT at VCC = 2.3 to 4.3V

■LATCH-UP PERFORMANCE EXCEEDS 300mA (JESD 17)

■ESD PERFORM. (ANALOG CHAN. vs GND): HBM > 4KV (MIL STD 883 method 3015)

DESCRIPTION

The STG3685 is an high-speed CMOS DUAL ANALOG S.P.D.T. (Single Pole Dual Throw) SWITCH or DUAL 2:1 Multiplexer/Demultiplexer Bus Switch fabricated in silicon gate C2MOS technology. It is designed to operate from 1.4V to 4.3V, making this device ideal for portable applications.

It offers very low ON-Resistance (<0.5Ω) at VCC=3.0V. The IN input is provided to control the switches. The switches nS1 are ON (they are

PRELIMINARY DATA

Flip-Chip
Table 1: Order Codes
PACKAGE		T & R
Flip-Chip9		STG3685BJR

connected to common Ports Dn) when the IN input is held high and OFF (high impedance state exists between the two ports) when IN is held low; the switches nS2 are ON (they are connected to common Ports Dn) when the IN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, Break Before Make Delay Time and Ultra Low Power Consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. It’s available in the commercial temperature range Flip-chip package with Epoxy Protection.

Figure 1: Pin Connection (Top Through View) And Schematic Circuit

July 2005	Rev. 2
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This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

STG3685

Figure 2: Input Equivalent Circuit		Table 2: Pin Description
		PIN N°	SYMBOL	NAME AND
				FUNCTION
		B2	IN	Control
		A3, A1	2S1, 1S1	Independent Chan-
		C3, C1	2S2, 1S2	nels
		B3, B1	D2, D1	Common Channels
		C2	GND	Ground (0V)
		A2	VCC	Positive Supply
				Voltage
		Table 3: Truth Table
		IN	SWITCH S1	SWITCH S2
		H	ON		OFF(*)
		L	OFF(*)		ON
		(*) High Impedance
Table 4: Absolute Maximum Ratings
Symbol	Parameter		Value		Unit
VCC	Supply Voltage		-0.5 to 4.6		V
VI	DC Input Voltage		-0.5 to VCC + 0.5		V
VIC	DC Control Input Voltage		-0.5 to 4.6		V
VO	DC Output Voltage		-0.5 to VCC + 0.5		V
IIKC	DC Input Diode Current on control pin (VIN < 0V)		− 50		mA
IIK	DC Input Diode Current (VIN < 0V)		± 50		mA
IOK	DC Output Diode Current		± 20		mA
IO	DC Output Current		± 300		mA
IOP	DC Output Current Peak (pulse at 1ms, 10% duty cycle)		± 500		mA
ICC or IGND	DC VCC or Ground Current		± 100		mA
PD	Power Dissipation at Ta=70°C (1)		TBD		mW
Tstg	Storage Temperature		-65 to 150		°C
TL	Lead Temperature (10 sec)		260		°C

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied.

(1) Derate above 70°C: by 18.5mW/°C.

Table 5: Recommended Operating Conditions

Symbol	Parameter		Value	Unit
VCC	Supply Voltage (note 1)		1.4 to 4.3	V
VI	Input Voltage		0 to VCC	V
VIC	Control Input Voltage		0 to 4.3	V
VO	Output Voltage		0 to VCC	V
Top	Operating Temperature		-55 to 125	°C
dt/dv	Input Rise and Fall Time Control Input	VCC= 1.4V to 2.7V	0 to 20	ns/V
		VCC= 3.0V to 3.6V	0 to 10

1) Truth Table guaranteed: 1.2V to 4.3V.

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STG3685

Table 6: DC Specifications

		Test Conditions						Value
Symbol	Parameter	VCC		TA = 25°C				-40 to 85°C		-55 to 125°C		Unit
		(V)		Min.	Typ.		Max.	Min.	Max.	Min.	Max.
VIH	High Level	1.65-1.95		0.65VCC				0.65VCC		0.65VCC
	Input Voltage
		2.3-2.5		1.4				1.4		1.4
		2.7-3.0		1.4				1.4		1.4		V
		3.3		1.5				1.5		1.5
		3.6		1.6				1.6		1.6
		4.3		1.6				1.6		1.6
VIL	Low Level	1.65-1.95					0.40		0.40		0.40
	Input Voltage	2.3-2.5					0.50		0.50		0.50
		2.7-3.6					0.50		0.50		0.50	V
		3.3					0.50		0.50		0.50
		3.6					0.50		0.50		0.50
		4.3					0.50		0.50		0.50
RON	Switch ON	4.3			250		400		500
	Resistance	3.0			300		500		600
	(See Fig. 12)
			VS=0V to VCC
		2.7			300		500		600			mΩ
		2.3	IS=100mA		350		600		800
		1.8			550		2000		4000
		1.4			1200		2500		5000
RFLAT	ON	4.3
	Resistance	3.0	VS=0 to VCC
	FLATNESS											Ω
		2.7			0.07		0.15		0.15
	(1)		IS=100mA
		2.3
		1.65
IOFF	OFF State	4.3	VS=0.3 or 4V				±10		± 100			nA
	Leakage
	Current
	(nSn), (Dn)
IIN	Input	0 - 4.3	VIN=0 to 4.3V				±0.1		± 1			µA
	Leakage
	Current
ICCL	Quiescent	1.65-4.3	VIN=VCC or				±0.05		±0.2		±1	µA
	Supply		GND
	Current
ICCH	Quiescent	4.2	VIN=1.65V		415		500					µA
	Supply
			VIN=1.8V		360		400
	Current
			VIN=2.6V		120		150

Note 1: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges.

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