ST STP9NK80Z, STF9NK80Z User Manual

STF9NK80Z

STP9NK80Z

STF9NK80Z

N-CHANNEL 800V -0.9Ω - 7.5A TO-220/TO-220FP Zener-Protected SuperMESH™MOSFET

Table 1: General Features

Figure 1: Package

TYPE	VDSS	RDS(on)	ID	Pw
STP9NK80Z	800 V	<1.2 Ω	7.5 A	150 W
STF9NK80Z	800 V	<1.2 Ω	7.5 A	35 W

■TYPICAL RDS(on) = 0.9Ω

■EXTREMELY HIGH dv/dt CAPABILITY

■IMPROVED ESD CAPABILITY

■100% AVALANCHE RATED

■GATE CHARGE MINIMIZED

■VERY LOW INTRINSIC CAPACITANCES

■VERY GOOD MANUFACTURING REPEATIBILITY

DESCRIPTION

The SuperMESH™ series is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down, special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOSFETs including revolutionary MDmesh™ products.

APPLICATIONS

■HIGH CURRENT, HIGH SPEED SWITCHING

■IDEAL FOR OFF-LINE POWER SUPPLIES

■SMPS

Table 2: Order Codes

3

2

1

TO-220

TO-220FP

Figure 2: Internal Schematic Diagram

SALES TYPE	MARKING	PACKAGE	PACKAGING
STP9NK80Z	P9NK80Z	TO-220	TUBE
STF9NK80Z	F9NK80Z	TO-220FP	TUBE

Rev. 1

May 2005

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Table 3: Absolute Maximum ratings

Symbol	Parameter		Value		Unit
		TO-220		TO-220FP
VDS	Drain-source Voltage (VGS = 0)		800		V
VDGR	Drain-gate Voltage (RGS = 20 kΩ )		800		V
VGS	Gatesource Voltage		± 30		V
ID	Drain Current (continuous) at TC = 25°C	7.5		7.5 (*)	A
ID	Drain Current (continuous) at TC = 100°C	4.7		4.7 (*)	A
IDM ( )	Drain Current (pulsed)	30		30 (*)	A
PTOT	Total Dissipation at TC = 25°C	150		35	W
	Derating Factor	1.20		0.28	W/°C
VESD(G-S)	Gate source ESD(HBM-C=100pF, R=1.5KΩ)		4000		V
dv/dt (1)	Peak Diode Recovery voltage slope		4.5		V/ns
VISO	Insulation Withstand Voltage (DC)	-		2500	V
Tj	Operating Junction Temperature		-55 to 150		°C
Tstg	Storage Temperature		-55 to 150		°C

( ) Pulse width limited by safe operating area

(1) ISD ≤ 7.5A, di/dt ≤ 200A/µs, VDD = 80% V(BR)DSS

(*) Limited only by maximum temperature allowed

Table 4: Thermal Data

		TO-220		TO-220FP
Rthj-case	Thermal Resistance Junction-case Max	0.83		3.6	°C/W
Rthj-amb	Thermal Resistance Junction-ambient Max		62.5		°C/W
Tl	Maximum Lead Temperature For Soldering		350		°C
	Purpose

Table 5: Avalanche Characteristics

Symbol	Parameter	Max Value	Unit
IAR	Avalanche Current, Repetitive or Not-Repetitive	7.5	A
	(pulse width limited by Tj max)
EAS	Single Pulse Avalanche Energy	350	mJ
	(starting Tj = 25 °C, ID = IAR, VDD = 50 V)

Table 6: Gate-Source Zener Diode

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
BVGSO	Gate-Source	Igs=± 1mA (Open Drain)	30			V
	Breakdown Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES

The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components.

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ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)

Table 7: On/Off

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
V(BR)DSS	Drain-source	ID = 1 mA, VGS = 0	800			V
	Breakdown Voltage
IDSS	Zero Gate Voltage	VDS = Max Rating			1	µA
	Drain Current (VGS = 0)	VDS = Max Rating, TC = 125 °C			50	µA
IGSS	Gate-body Leakage	VGS = ± 20V			±10	µA
	Current (VDS = 0)
VGS(th)	Gate Threshold Voltage	VDS = VGS, ID = 100µA	3	3.75	4.5	V
RDS(on)	Static Drain-source On	VGS = 10V, ID = 3.75 A		0.9	1.2	Ω
	Resistance

Table 8: DYNAMIC

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
gfs (1)	Forward Transconductance	VDS = 15 V, ID = 3.75 A		7.5		S
Ciss	Input Capacitance	VDS = 25V, f = 1 MHz, VGS = 0		1900		pF
Coss	Output Capacitance			180		pF
Crss	Reverse Transfer			38		pF
	Capacitance
Coss eq. (3)	Equivalent Output	VGS = 0V, VDS = 0V to 640V		75		pF
	Capacitance
td(on)	Turn-on Delay Time	VDD = 400 V, ID = 3.75 A		26		ns
	Rise Time	RG = 4.7Ω VGS = 10 V		19		ns
tr
	Turn-off Delay Time	(see Figure 19)		58		ns
td(off)
	Fall Time			18		ns
tf
tr(Voff)	Off-voltage Rise Time	VDD = 640 V, ID = 7.5A,		12		ns
tf	Fall Time	RG = 4.7Ω, VGS = 10V		10		ns
tc	Cross-over Time	(see Figure 20)		24		ns
Qg	Total Gate Charge	VDD = 640V, ID = 7.5 A,		60	84	nC
Qgs	Gate-Source Charge	VGS = 10V		12		nC
Qgd	Gate-Drain Charge	(see Figure 22)		35		nC

Table 9: Source Drain Diode

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
ISD	Source-drain Current					7.5	A
ISDM (2)	Source-drain Current (pulsed)					30	A
VSD (1)	Forward On Voltage	ISD = 7.5	A, VGS = 0			1.6	V
trr	Reverse Recovery Time	ISD = 7.5	A, di/dt = 100A/µs		530		ns
Qrr	Reverse Recovery Charge	VDD = 35V, Tj = 25°C			4.5		µC
IRRM	Reverse Recovery Current	(see Figure 20)			17		A
trr	Reverse Recovery Time	ISD = 7.5	A, di/dt = 100A/µs		690		ns
Qrr	Reverse Recovery Charge	VDD = 35V, Tj = 150°C			6.4		µC
IRRM	Reverse Recovery Current	(see Figure 20)			17		A

Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

2.Pulse width limited by safe operating area.

3.Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

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Figure 3: Safe Operating Area for TO-220

Figure 6: Thermal Impedance for TO-220

Figure 4: Safe Operating Area for TO-220FP

Figure 7: Thermal Impedance for TO-220FP

Figure 5: Output Characteristics			Figure 8: Transfer Characteristics

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