ST STF2NK60Z User Manual

STF2NK60Z - STQ2NK60ZR-AP

STP2NK60Z - STD2NK60Z-1

N-CHANNEL 600V - 7.2 Ω - 1.4A T O-220/TO- 220FP/ TO-92/IP AK

Zener-Protected SuperMESH™ MOSFET

Table 1: Ge neral Features

TYPE V

STF2NK60Z STQ2NK60ZR-AP STP2NK60Z STD2NK60Z-1

■ TYPICAL R

■ EXTREMELY HIGH dv/d t C APABILITY

■ ESD IMPROVED CAPABILITY

■ 100% AVALANCHE TESTED

■ NEW HIGH VOLTAGE BENCHMARK

■ GATE CHARGE MINIMIZED

DSSRDS(on)ID

600 V 600 V 600 V 600 V

(on) = 7.2 Ω

< 8 Ω < 8 Ω < 8 Ω < 8 Ω

1.4 A

0.4 A

1.4 A

3 W 45 W 45 W

DESCRIPTION

The SuperMESH™ s eries is obtained through an extreme optimization of ST’s well established strip-based PowerMESH™ layout. In addition to pushing on-resistance significantly down , special care is taken to ensure a very good dv/dt capability for the most demanding applications. Such series complements ST full range of high voltage MOS FET s including revolutionary MDmesh™ products.

APPLICATIONS

■ LOW POWER BATTERY CHARGERS

■ SWITH MODE LOW POWER

SUPPLIES(SMPS)

■ LOW POWER, BALLAST, CFL (COMPACT

FLUORESCEN T L AMPS)

Figure 1: Package

TO-92 (Ammopack)

TO-220

IPAK

TO-220FP

Figure 2: Internal Schematic Diagram

Table 2: Order Codes

Part Number Marking Package Packaging

STQ2NK60ZR-AP Q2NK60ZR TO-92 AMMOPAK

STP2NK60Z P2NK60Z TO-220 TUBE

STD2NK60Z-1 D2NK60Z IPAK TUBE

STF2NK60Z F2NK60Z TO-220FP TUBE

Rev. 4

1/15November 2004

STQ2NK60ZR-AP - STP2NK60Z - STF2NK60Z - STD2NK60Z-1

Table 3: Absolute Maximum ratings

Symbol Parameter Value Unit

TO-220 /

IPAK

DGR

I I

TOT

D D

Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 kΩ) Gate- source Voltage ± 30 V Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C

()

Drain Current (pulsed) 5.6 1.6 5.6 (*) A Total Dissipation at TC = 25°C

1.4 0.4 1.4 (*) A

0.77 0.25 0.77 (*) A

45 3 20 W

Derating Factor 0.36 0.025 0.16 W/°C

ESD(G-S)

ISO

Gate source ESD (HBM-C= 100pF, R=1.5kΩ) 1500 V Insulation Withstand Voltage (DC) 2500 V

dv/dt (1) Peak Diode Recovery voltage slope 4.5 V/ns

stg

() Pulse wi dt h l i m i ted by safe operating area

≤ 1.4A, di/dt ≤ 200A/µs, VDD ≤ V

(1) I

(*) Limit ed only by maxim um te m perature allowed

Operating Junction Temperature Storage Temperature

, Tj ≤ T

(BR)DSS

JMAX.

TO-92 TO-220FP

600 V 600 V

-55 to 150 °C

Table 4: Thermal Data

TO-220/IPAK TO-220FP TO-92 Unit

Rthj-case Thermal Resistance Junction-case Max 2.77 6.25 -- °C/W

Rthj-amb Thermal Resistance Junction-ambient Max 100 100 120 °C/W Rthj-lead Thermal Resistance Junction-lead Max -- -- 40 °C/W

Maximum Lead Temperature For Soldering

300 260 °C

Purpose

Table 5: Avalanche Characteristics

Symbol Parameter Max Value Unit

Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by T

max)

Single Pulse Avalanche Energy (starting T

= 25 °C, ID = IAR, VDD = 50 V)

1.4 A

90 mJ

Table 6: Gate-Source Zener Diode

Symbol Parameter Test Conditions Min. Typ. Max. Unit

GSO

Gate source

Igs= ± 1 mA (Open Drain) 30 V

Breakdown Voltage

PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES

The built-in back-to-back Zener diodes have sp ecifically been desig ned to enhance not only the dev ice’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an ef ficient and cost-effective intervention to prot ect the device’s integrity. These integrate d Z ener diodes thus avoid the usage of external components.

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STQ2NK60ZR-AP - STP2NK 60Z - STF2NK60Z - STD2NK60Z-1

ELECTRICAL CHARACTERISTICS (T

=25°C UNLESS OTHERWISE SPECIFIED)

CASE

Table 7: On/Off

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(BR)DSS

Drain-source

ID = 1mA, VGS = 0 600 V

Breakdown Voltage

GS(th)

DS(on)

DSS

GSS

Zero Gate Voltage Drain Current (V

= 0)

Gate-body Leaka ge Current (V

= 0) Gate Threshold Voltage Static Drain-source On

= Max Rating

= Max Rating, TC = 125 °C

= ± 20V ±10 µA

= VGS, ID = 50 µA

33.754.5V

VGS = 10V, ID = 0.7 A 7.2 8 Ω

Resistance

Table 8: Dynamic

Symbol Parameter Test Conditions Min. Typ. Max. Unit

oss eq.

d(on)

d(off)

Q Q Q

(1)

iss oss rss

Forward Transconductance Input Capacitance

Output Capacitance Reverse Transfer Capacitance

(3)

Equivalent Outpu t Capacitance Turn-on Delay Time

Rise Ti me Turn-off Delay Time Fall Time

Total Gate Charge Gate-Source Charge Gate-Drain Charge

VDS = 15 V, ID= 0.7 A 1 S VDS = 25V, f = 1 MHz, VGS = 0 170

VGS = 0V, VDS = 0V to 480V 30

= 300 V, ID = 0.65 A,

RG= 4.7 Ω, VGS = 10 V (Resistive Load see, Figure

22) = 480V, ID = 1.5 A,

VGS = 10V (see, Figure 24)

8 30 22 55

7.7

1.7 4

µA µA

pF pF pF

ns ns ns ns

nC nC nC

Table 9: Source Drain Diode

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(2)

SDM

(1)

RRM

(1) Pulsed: Pulse durat ion = 300 µs, duty cycle 1.5 %. (2) Pulse width limite d by safe operatin g area. (3) C

oss eq.

Source-drain Current Source-drain Current (pulsed)

Forward On Voltage Reverse Recovery Time

Reverse Recovery Charge Reverse Recovery Current

Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current

is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS

ISD = 1.5 A, VGS = 0

= 1.3 A, di/dt = 100 A/µs

VDD = 25V, Tj = 25°C (see test circuit, Figure 23)

= 1.3 A, di/dt = 100 A/µs

= 25V, Tj = 150°C

(see test circuit, Figure 23)

250 550

4.4

300 690

4.6

1.5 6

1.6 V

A A

µC

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STQ2NK60ZR-AP - STP2NK60Z - STF2NK60Z - STD2NK60Z-1

Figure 3: .Safe Operating Area For TO-220

Figure 4: Safe Operating Area For IPAK

Figure 6: Thermal Impedance For TO-220

Figure 7: Thermal Impedance For IPAK

Figure 5: Safe Operating Area For TO-92

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Figure 8: Thermal Impedance For TO-92

STQ2NK60ZR-AP - STP2NK 60Z - STF2NK60Z - STD2NK60Z-1

Figure 9: Safe Operating Area For TO-220FP

Figure 10: Output Characteristics

Figure 12: Thermal Impedan ce Fo r TO-220 FP

Figure 13: Transfer Characteristics

Figure 11: Transconductance

Figure 14: Gate Charge vs Gate-source Voltage

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