Datasheet STF16N50U Datasheet (ST)

N-channel 500 V, 0.47 Ω, 15 A TO-220FP

3

Features

@

R

V

DS(on)

DSS

T

jmax.

rr

Type

STF16N50U 550 V < 0.52 Ω 15 A 30 W

■ 100% avalanche tested

■ Outstanding dv/dt capability

■ Gate charge minimized

■ Very low intrinsic capacitance

■ Very low R

■

Extremely low t

Application

■ Switching applications

– High voltage inverters specific for LCD TV
– Lighting full bridge topology
– Motor control

DS(on)

max.

I

D

STF16N50U

UltraFAST MESH™ Power MOSFET

Pw

2

1

TO-220FP

Figure 1. Internal schematic diagram

D(2)

Description

G(1)

The device is an N-channel Ultrafast MESHTM.
This technology associates all advantages of
reduced on-resistance. Zener gate protection and
very high dv/dt capability with an extremely
enhanced fast body-drain recovery diode.

S(3)

AM01476v1

Table 1. Device summary

Order code Marking Package Packaging

STF16N50U 16N50U TO-220FP Tube

September 2010 Doc ID 17923 Rev 1 1/12

www.st.com

12

Contents STF16N50U

Contents

1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2/12 Doc ID 17923 Rev 1

STF16N50U Electrical ratings

1 Electrical ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

V

V

I

I

I

DM

P

TOT

I

AR

E

dv/dt

V

ESD-(G-S)

Drain-source voltage (VGS = 0) 500 V

DS

Gate-source voltage ± 30 V

GS

Drain current (continuous) at TC = 25 °C 15

D

Drain current (continuous) at TC = 100 °C 9

D

(2)

Drain current (pulsed) 60

Total dissipation at TC = 25 °C 30 W

Avalanche current, repetitive or not­repetitive (pulse width limited by T

Single pulse avalanche energy

AS

(starting T

(3)

Peak diode recovery voltage slope 20 V/ns

= 25 °C, ID = IAR, VDD = 50 V)

j

G-S EDS (HBM C=100 pF; R=1.5 kΩ) 4000 V

Insulation withstand voltage (RMS) from all

V

ISO

T

T

1. Current is limited by wire features.

2. Pulse width limited by safe operating area.

3. ISD ≤ 11 A, di/dt ≤ 400 A/µs, VDD = 80% V

three leads to external heat sink
(t = 1 s; T

Storage temperature -55 to 150 °C

stg

Max. operating junction temperature 150 °C

j

C = 25 °C)

max)

j

(BR)DSS.

(1)

(1)

(1)

11 A

250 mJ

2500 V

A

A

A

Table 3. Thermal data

Symbol Parameter Value Unit

R

thj-case

R

thj-amb

Thermal resistance junction-case max 3.29 °C/W

Thermal resistance junction-ambient max 62.5 °C/W

Maximum lead temperature for soldering

T

l

purpose

300 °C

Doc ID 17923 Rev 1 3/12

Electrical characteristics STF16N50U

2 Electrical characteristics

(TC = 25 °C unless otherwise specified).

Table 4. On /off states

Symbol Parameter Test conditions Min. Typ. Max. Unit

V

(BR)DSS

I

DSS

I

GSS

V

GS(th)

R

DS(on

Drain-source
breakdown voltage

Zero gate voltage
drain current (V

GS

Gate-body leakage
current (V

DS

= 0)

= 0)

= 1 mA, VGS = 0 500 V

I

D

V

= Max rating

DS

= Max rating, TC=125 °C

V

DS

1

100µAµA

VGS = ± 20 V ± 10 µA

Gate threshold voltage VDS = VGS, ID = 100 µA 3 3.75 4.5 V

Static drain-source on
resistance

V

= 10 V, ID = 5 A 0.47 0.52 Ω

GS

Table 5. Dynamic

Symbol Parameter Test conditions Min. Typ. Max. Unit

C

C

C

C

C

R

Q

Q

iss

oss

rss

o(tr)

o(er)

G

Q

gs

gd

Input capacitance
Output capacitance
Reverse transfer

capacitance

Equivalent
capacitance time
related

Equivalent
capacitance energy
related

Intrinsic gate
resistance

Total gate charge

g

Gate-source charge
Gate-drain charge

= 25 V, f = 1 MHz, VGS = 0 -

V

DS

= 0, VDS = 0 to 400 V

V

GS

f = 1 MHz open drain - 1.9 - Ω

VDD = 400 V, ID = 10 A,

= 10 V

V

GS

(see Figure 13)

1950

250

-

59

-78-pF

-58-pF

40

-

7

-

22

pF
pF
pF

nC
nC
nC

4/12 Doc ID 17923 Rev 1

STF16N50U Electrical characteristics

Table 6. Switching times

Symbol Parameter Test conditions Min. Typ. Max. Unit

t

d(on)

t

d(off)

Turn-on delay time

t

Rise time

r

Turn-off-delay time

t

Fall time

f

= 250 V, ID = 5.5 A,

V

DD

= 4.7 Ω, V

R

G

GS

(see Figure 12)

= 10 V

16
21

­21

-

15

Table 7. Source drain diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

I

I

SDM

V

SD

Q

I

RRM

Q

I

RRM

1. Pulse width limited by safe operating area.

2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%.

Source-drain current

SD

(1)

Source-drain current (pulsed)

(2)

Forward on voltage ISD = 11 A, VGS = 0 - 1.6 V

t

Reverse recovery time

rr

Reverse recovery charge

rr

Reverse recovery current

Reverse recovery time

t

rr

Reverse recovery charge

rr

Reverse recovery current

ISD = 11 A, di/dt = 100 A/µs

= 35 V (see Figure 17)

V

DD

= 11 A, di/dt = 100 A/µs

I

SD

= 35 V, Tj = 150 °C

V

DD

(see Figure 17)

-

-85280

120

-

490

1144A

7

8

ns
ns
ns
ns

A

ns

nC

A

ns

nC

A

Table 8. Gate-source Zener diode

Symbol Parameter Test conditions Min. Typ. Max. Unit

BV

Gate-source breakdown

GSO

voltage

Igs=± 1 mA (open drain) 30 - V

The built-in back-to-back Zener diodes have specifically been designed to enhance not only
the device’s ESD capability, but also to make them safely absorb possible voltage transients
that may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.

Doc ID 17923 Rev 1 5/12

Electrical characteristics STF16N50U

2.1 Electrical characteristics (curves)

Figure 2. Safe operating area Figure 3. Thermal impedance

I

D

(A)

AM07149v1

10

1

Operation in this area is

Limited by max R

DS(on)

Tj=150°C
Tc=25°C
Single pulse

10µs

100µs

1ms

10ms

0.1

0.01

0.1

Figure 4. Output characteristics Figure 5. Transfer characteristics

I

D

1

10

100

(A)

30

VGS=10V

DS

(V)

V

AM07150v1

I

(A)

D

V

DS

=15V

20

25

6V

20

15

10

5V

5

0

5

0

10

15

20

25

30

4V

V

DS

(V)

15

10

5

0

2

0

4

8

6

10

AM07151v1

V

GS

(V)

Figure 6. Normalized B

BV

DSS

vs temperature Figure 7. Static drain-source on resistance

VDSS

AM07152v1

R

DS(on)

(norm)

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

-100

-50

50

0

100

150

T

J

(°C)

6/12 Doc ID 17923 Rev 1

(Ω)

0.50

0.49

0.48

0.47

0.46

0.45

0.44

AM07153v1

VGS=10V

4

6

8

2

0

10

I

D

(A)

STF16N50U Electrical characteristics

Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations

V

GS

(V)

DS

V

12

VDD=400V

D

=11A

I

10

8

6

4

AM07154v1

V

GS

450

400

350

300

250

200

150

100

2

0

10

0

20

30

40

50

0

Q

g

(nC)

(pF)

1000

100

10

C

1

0.1

1

10

100

AM07155v1

V

DS

Ciss

Coss

Crss

(V)

Figure 10. Normalized gate threshold voltage

V

vs temperature

GS(th)

(norm)

1.1

1.0

0.9

0.8

0.7

0.6

0.5

0.4

-100

-50

AM07156v1

T

J

50

100

150

0

(°C)

Figure 11. Normalized on resistance vs

temperature

R

DS(on)

(norm)

2.5

2.0

1.5

1.0

0.5

0

-100

-50

50

0

100

150

AM07157v1

T

J

(°C)

Doc ID 17923 Rev 1 7/12

Test circuits STF16N50U

3 Test circuits

Figure 12. Switching times test circuit for

PW

resistive load

VGS

VD

RG

RL

D.U.T.

2200

µF

3.3
µF

AM01468v1

V

DD

Figure 14. Test circuit for inductive load

G

25

Ω

switching and diode recovery times

A

D

D.U. T.

S

B

R

FAST
DIODE

G

A

A

L=100µH

B

B

D

G

S

3.3

µF

1000

µF

V

DD

Figure 13. Gate charge test circuit

V

i=20V=VGMAX

PW

2200
µF

1kΩ

12V

IG=CONST

2.7kΩ

47kΩ

47kΩ

100Ω

100nF

D.U.T.

AM01469v1

Figure 15. Unclamped inductive load test

circuit

L

VD

ID

Vi

D.U. T.

2200

µF

3.3
µF

1kΩ

VDD

V

VDD

G

Pw

AM01470v1

Figure 16. Unclamped inductive waveform Figure 17. Switching time waveform

V(BR)DSS

VD

IDM

ID

VDD

VDD

AM01472v1

0

0

10%

tdon

ton

90%

tr

10%

tdoff

VDS

90%

V

GS

8/12 Doc ID 17923 Rev 1

AM01471v1

toff

tf

90%

10%

AM01473v1

STF16N50U Package mechanical data

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com. ECOPACK
is an ST trademark.

®

packages, depending on their level of environmental compliance. ECOPACK®

Doc ID 17923 Rev 1 9/12

Package mechanical data STF16N50U

Table 9. TO-220FP mechanical data

mm

Dim.

Min. Typ. Max.

A4.4 4.6

B2.5 2.7

D 2.5 2.75

E0.45 0.7

F0.75 1

F1 1.15 1.70

F2 1.15 1.70

G4.95 5.2

G1 2.4 2.7

H 10 10.4

L2 16

L3 28.6 30.6

L4 9.8 10.6

L5 2.9 3.6

L6 15.9 16.4

L7 9 9.3

Dia 3 3.2

Figure 18. TO-220FP drawing

L7

A

B

Dia

L6

H

D

L5

F2

F1

E

F

G

G1

L2

L3

10/12 Doc ID 17923 Rev 1

L4

7012510_Rev_K

STF16N50U Revision history

5 Revision history

Table 10. Document revision history

Date Revision Changes

09-Sep-2010 1 First release.

Doc ID 17923 Rev 1 11/12

STF16N50U

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12/12 Doc ID 17923 Rev 1