ST STF16N50U User Manual
N-channel 500 V, 0.47 Ω, 15 A TO-220FP
3
Features
@
R
V
DS(on)
DSS
T
jmax.
rr
Type
STF16N50U 550 V < 0.52 Ω 15 A 30 W
■ 100% avalanche tested
■ Outstanding dv/dt capability
■ Gate charge minimized
■ Very low intrinsic capacitance
■ Very low R
■
Extremely low t
Application
■ Switching applications
– High voltage inverters specific for LCD TV
– Lighting full bridge topology
– Motor control
DS(on)
max.
I
D
STF16N50U
UltraFAST MESH™ Power MOSFET
Pw
2
1
TO-220FP
Figure 1. Internal schematic diagram
D(2)
Description
G(1)
The device is an N-channel Ultrafast MESHTM.
This technology associates all advantages of
reduced on-resistance. Zener gate protection and
very high dv/dt capability with an extremely
enhanced fast body-drain recovery diode.
S(3)
AM01476v1
Table 1. Device summary
Order code Marking Package Packaging
STF16N50U 16N50U TO-220FP Tube
September 2010 Doc ID 17923 Rev 1 1/12
www.st.com
12
Contents STF16N50U
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2/12 Doc ID 17923 Rev 1
STF16N50U Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Symbol Parameter Value Unit
V
V
I
I
I
DM
P
TOT
I
AR
E
dv/dt
V
ESD-(G-S)
Drain-source voltage (VGS = 0) 500 V
DS
Gate-source voltage ± 30 V
GS
Drain current (continuous) at TC = 25 °C 15
D
Drain current (continuous) at TC = 100 °C 9
D
(2)
Drain current (pulsed) 60
Total dissipation at TC = 25 °C 30 W
Avalanche current, repetitive or notrepetitive (pulse width limited by T
Single pulse avalanche energy
AS
(starting T
(3)
Peak diode recovery voltage slope 20 V/ns
= 25 °C, ID = IAR, VDD = 50 V)
j
G-S EDS (HBM C=100 pF; R=1.5 kΩ) 4000 V
Insulation withstand voltage (RMS) from all
V
ISO
T
T
1. Current is limited by wire features.
2. Pulse width limited by safe operating area.
3. ISD ≤ 11 A, di/dt ≤ 400 A/µs, VDD = 80% V
three leads to external heat sink
(t = 1 s; T
Storage temperature -55 to 150 °C
stg
Max. operating junction temperature 150 °C
j
C = 25 °C)
max)
j
(BR)DSS.
(1)
(1)
(1)
11 A
250 mJ
2500 V
A
A
A
Table 3. Thermal data
Symbol Parameter Value Unit
R
thj-case
R
thj-amb
Thermal resistance junction-case max 3.29 °C/W
Thermal resistance junction-ambient max 62.5 °C/W
Maximum lead temperature for soldering
T
l
purpose
300 °C
Doc ID 17923 Rev 1 3/12
Electrical characteristics STF16N50U
2 Electrical characteristics
(TC = 25 °C unless otherwise specified).
Table 4. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on
Drain-source
breakdown voltage
Zero gate voltage
drain current (V
GS
Gate-body leakage
current (V
DS
= 0)
= 0)
= 1 mA, VGS = 0 500 V
I
D
V
= Max rating
DS
= Max rating, TC=125 °C
V
DS
1
100µAµA
VGS = ± 20 V ± 10 µA
Gate threshold voltage VDS = VGS, ID = 100 µA 3 3.75 4.5 V
Static drain-source on
resistance
V
= 10 V, ID = 5 A 0.47 0.52 Ω
GS
Table 5. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
C
C
C
C
C
R
Q
Q
iss
oss
rss
o(tr)
o(er)
G
Q
gs
gd
Input capacitance
Output capacitance
Reverse transfer
capacitance
Equivalent
capacitance time
related
Equivalent
capacitance energy
related
Intrinsic gate
resistance
Total gate charge
g
Gate-source charge
Gate-drain charge
= 25 V, f = 1 MHz, VGS = 0 -
V
DS
= 0, VDS = 0 to 400 V
V
GS
f = 1 MHz open drain - 1.9 - Ω
VDD = 400 V, ID = 10 A,
= 10 V
V
GS
(see Figure 13)
1950
250
-
59
-78-pF
-58-pF
40
-
7
-
22
pF
pF
pF
nC
nC
nC
4/12 Doc ID 17923 Rev 1