ST STEVAL-IPMnM1S User Manual

Page 1

Introduction

The STEVAL-IPMnM1S is a compact motor drive power board based on SLLIMM-nano SMD (small low-loss intelligent molded module) product (STIPNS1M50T-H). It provides an affordable and easy-to-use solution for driving high power motors in a wide range of applications such as power white goods, air conditioning, compressors, power fans and 3-phase inverters for motor drives in general.

The IPM itself consists of six MOSFETs, three high voltage half-bridge gate driver ICs and a wide range of features like undervoltage lockout, smart shutdown, internal temperature sensor and NTC, overcurrent protection and internal op-amp.

The main characteristics of this evaluation board are small size, minimal BOM and high efficiency. It features an interface circuit (BUS and VCC connectors), bootstrap capacitors, snubber capacitor, hardware short-circuit protection, fault event signal and temperature monitoring. It is designed to work in single- or three-shunt configuration and with triple current sensing options: three dedicated on-board op-amps, op-amps embedded on MCU or single internal IPM op-amp. The Hall/Encoder part completes the circuit.

The system is designed to achieve accurate and fast conditioning of current feedback to satisfy the typical requirements for field oriented control (FOC).

The STEVAL-IPMnM1S is compatible with ST’s control board based on STM32, providing a complete platform for motor control.

Figure 1. Motor control board (top view) based on SLLIMM-nano SMD

STEVAL-IPMnM1S motor control power board based on the SLLIMM™-nano

SMD of MOSFET IPMs

UM2467

User manual

UM2467 - Rev 1 - September 2018 For further information contact your local STMicroelectronics sales office.

www.st.com

Page 2

1 General safety instructions

Danger:

The evaluation board works with high voltage which could be deadly for the users. Furthermore all circuits on the board are not isolated from the line input. Due to the high power density, the components on the board as well as the heat sink can be heated to a very high temperature, which can cause a burning risk when touched directly. This board is intended for use by experienced power electronics professionals who understand the precautions that must be taken to ensure that no danger or risk may occur while operating this board.

Caution: After the operation of the evaluation board, the bulk capacitor C1 (if used) may still store a high energy for

several minutes. So it must be first discharged before any direct touching of the board.

Important: To protect the bulk capacitor C1, we strongly recommended using an external brake chopper after C1 (to discharge the high brake current back from the induction motor).

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Page 3

2 Key features

• Input voltage: from 125 to 400 V

• Nominal power: up to 60 W

• Nominal current: up to 0.6 A

• Input auxiliary voltage: up to 20 V

• Single- or three-shunt resistors for current sensing (with sensing network)

• Three options for current sensing: dedicated external op-amps, internal SLLIMM-nano SMD op-amp (single) or via MCU

• Overcurrent hardware protection

• IPM temperature monitoring and protection

• Hall sensor or encoder input

• MOSFETs intelligent power module:

– SLLIMM-nano IPM (STIPNS1M50T-H) - SMD package

• Motor control connector (32 pins) interfacing with ST MCU boards

• Universal design for further evaluation with breadboard and testing pins

• Very compact size

• WEEE compliant

• RoHS compliant

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Key features

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Page 4

3 Circuit schematics

The full schematics for the SLLIMM-nano SMD card for STIPNS1M50T-H IPM products is shown below. This card consists of an interface circuit (BUS and VCC connectors), bootstrap capacitors, snubber capacitor

, short-circuit

protection, fault output circuit, temperature monitoring, single-/three-shunt resistors and filters for input signals. It also includes bypass capacitors for VCC

and bootstrap capacitors. The capacitors are located very close to the

drive IC to avoid malfunction due to noise.

Three current sensing options are provided: three dedicated onboard op-amps, one internal IPM op-amp and the embedded MCU op-amps; selection is performed through three jumpers.

The Hall/Encoder section (powered at 5 V or 3.3 V) completes the circuit.

3.1 Schematic diagrams

Figure 2. STEVAL-IPMnM1S - circuit schematic (1 of 5)

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Figure 3. STEV

AL-IPMnM1S - circuit schematic (2 of 5)

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Schematic diagrams

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Figure 4. STEV

AL-IPMnM1S - circuit schematic (3 of 5)

D2 LED Red

Phase C - input

0 0

R10

Phase B - input

Phase A - input

R8 1k0

R14 1k0

R19 1k0

R13 1k0

R15 1k0

PP6

nano OP+

nano OPOUT

nano OP-

STIPNS1M50T-H

IPM module

D/OD

OP+

OPOUT

OP-

D/OD1

boo

TP19

TP10

TP13

TP18

TP9

TP17

400V

R16

R17

R18

0.68 1W

1_SHUNT

TP16

TP11

phase _A

phase _B

phase _C

3_SHUNT

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Figure 5. STEV

AL-IPMnM1S - circuit schematic (4 of 5)

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Figure 6. STEV

AL-IPMnM1S - circuit schematic (5 of 5)

Hall/Encoder

M_phase_A

M_phase_C

M_phase_B

3.3V

+5V

3.3V

+5V

R42

4k7

R392k4

Encoder/Hall

SW12

C37 10p

SW15

C34 100n

SW13

SW10

R40

4k7

SW9

R34

4k7

R41

4k7

R35

4k7

C33 100n

C35 10p

R372k4

SW14

R382k4

C32 100n

SW16

R36 4k7

SW11

C36 10p

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Schematic diagrams

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Page 9

4 Main characteristics

The board is designed for a 125 VDC to 400 VDC

supply voltage.

An appropriate bulk capacitor for the power level of the application must be mounted at the dedicated position on the board.

The SLLIMM-nano SMD integrates six MOSFET switches with freewheeling diodes and high voltage gate drivers. Thanks to this integrated module, the system of

fers power inversion in a simple and compact design that requires

less PCB area and increases reliability

The board offers the added flexibility of being able to operate in single- or three-shunt configuration by modifying solder bridge jumper settings (see Section 5.3.4 Single- or three-shunt selection).

Figure 7. STEVAL-IPMnM1S architecture

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5 Filters and key parameters

5.1 Input signals

The input signals (LINx and HINx) to drive the internal MOSFETs are active high. A 375 kΩ (typ.) pull-down resistor is built-in for each input signal. T

o prevent input signal oscillation, an RC filter is added on each input as

close as possible to the IPM. The filter is designed using a time constant of 10 ns (1 kΩ and 10 pF).

5.2 Bootstrap capacitor

In the 3-phase inverter

, the emitters of the low side MOSFET

s are connected to the negative DC bus (V

DC-

) as

common reference ground, which allows all low side gate drivers to share the same power supply, while the emitter of the high side MOSFETs is alternatively connected to the positive (V

DC+

) and negative (V

DC-

) DC bus

during running conditions.

A bootstrap method is a simple and cheap solution to supply the high voltage section. This function is normally accomplished by a high voltage fast recovery diode. The SLLIMM-nano SMD MOSFET-based family includes a patented integrated structure that replaces the external diode with a high voltage DMOS functioning as a diode with series resistor

. An internal charge pump provides the DMOS driving voltage.

The value of the C

BOOT

capacitor should be calculated according to the application requirements.

Figure 8. C

BOOT

graph selection shows the behavior of C

BOOT

(calculated) versus switching frequency (fsw), with

different values of ∆V

CBOOT

for a continuous sinusoidal modulation and a duty cycle δ = 50%.

Note: This curve is taken from application note AN4840 (available on www.st.com); calculations are based on the

STGIP5C60T-Hyy device, which represents the worst case scenario for this kind of calculation.

The boot capacitor must be two or three times larger than the C

BOOT

calculated in the graph.

For this design, a value of 2.2 µF was selected.

Figure 8. C

BOOT

graph selection

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5.3 Overcurrent protection

The SLLIMM-nano SMD MOSFET-based integrates a comparator for fault sensing purposes. The comparator has an internal voltage reference V

REF

(540 mV typ.) connected to the inverting input, while the non-inverting input on

the CIN pin can be connected to an external shunt resistor to implement the overcurrent protection function. When the comparator triggers, the device enters the shutdown state.

The comparator output is connected to the SD pin in order to send the fault message to the MCU.

5.3.1 SD pin

The SD is an input/output pin (open drain type if used as output) used for enable and fault; it is shared with NTC thermistor, internally connected to GND.

The pull-up resistor (R10) causes the voltage VSD-GND to decrease as the temperature increases. To maintain the voltage above the high-level logic threshold, the pull-up resistor is sized at 1 kΩ (

3.3 V MCU power supply).

The filter on

SD (R10 and C18) must be sized to obtain the desired re-starting time after a fault event and placed

as close as possible to the pin.

A shutdown event can be managed by the MCU; in which case, the SD functions as the input pin.

Conversely

, the SD functions as an output pin when an overcurrent or undervoltage condition is detected.

5.3.2 Shunt resistor selection

The value of the shunt resistor is calculated by the following equation:

Equation 1

RSH=

ref

(1)

Where V

ref

is the internal comparator (CIN) (0.54 V typ.) and IOC is the overcurrent threshold detection level.

The maximum OC protection level should be set to less than the pulsed collector current in the datasheet. In this design the over current threshold level was fixed at IOC = 1.3 A in order to select a commercial shunt resistor

value.

Equation 2

ref

∙

R15 + R11

+ V

0.54 ∙

1000 + 4700

4700

+ 0.18

1.3

= 0.64

Ω (2)

Where VF is the voltage drop across diodes D3, D4 and D5.

For the power rating of the shunt resistor, the following parameters must be considered:

• Maximum load current of inverter (85% of I

nom [Arms]

): I

load(max)

•

Shunt resistor value at TC = 25 °C.

• Power derating ratio of shunt resistor at TSH =100 °C

• Safety margin.

The power rating is calculated by following equation:

Equation 3

1 2

 ∙ 

loadmax

 ∙ R

H

∙ ma

rgin

Deratingratio

(3)

For the STIPNS1M50T-H, where RSH =

0.68 Ω:

• I

nom

rms

loa

max

= 85%

nom rms

= 0.6A

rms

(4)

• Power derating ratio of shunt resistor at TSH = 100 °C: 80% (from datasheet manufacturer)

•

Safety margin: 30%

Equation 4

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PSH=

1 2

 ∙ 

0.62∙ 0.68 ∙ 1.3

0.8

= 0.2W (5)

Considering available commercial values, a 1 W shunt resistor was selected.

Based on the previous equations and conditions, the minimum shunt resistance and power rating is summarized below

Table 1. Shunt selection

Device

nom (peak)

[A] OCP

(peak)

[A]

load(max)

[Arms]

SHUNT

[Ω] Minimum shunt power rating PSH [W]

STIPNS1M50T-H 1 1.3 0.6 0.68 0.2

5.3.3 CIN RC filter

An RC filter network on the CIN pin is required to prevent short-circuits due to the noise on the shunt resistor. In this design, the R15-C8 RC filter has a constant time of about 1 µs.

5.3.4 Single- or three-shunt selection

Single- or three-shunt resistor circuits can be adopted by setting the solder bridges SW5, SW6, SW7 and SW8.

The figures below illustrate how to set up the two configurations.

Figure 9. One-shunt configuration

Figure 10. Three-shunt configuration

Further details regarding sensing configuration are provided in the next section.

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6 Current sensing amplifying network

The STEVAL-IPMnM1S motor control demonstration board can be configured to run in three-shunt or single-shunt configurations for field oriented control (FOC).

The current can be sensed thanks to the shunt resistor and amplified by using the on-board operational amplifiers or by the MCU (if equipped with op-amp).

Once the shunt configuration is chosen by setting solder bridge on SW5, SW6, SW7 and SW8 (as described in

Section 5.3.4 Single- or three-shunt selection), the user can choose whether to send the voltage shunt to the

MCU amplified or not amplified.

Single-shunt configuration requires a single op amp so the only voltage sent to the MCU to control the sensing is connected to phase V through SW2.

SW1, SW2, SW3 and SW17 can be configured to select which signals are sent to the microcontroller

, as per the

following table.

able 2. Op-amp sensing configuration

Configuration Sensing Bridge (SW1) Bridge (SW2) Bridge (SW3) Bridge (SW17)

Single Shunt

IPM op-amp open 1-2 open 2-3

On board op-amp open 1-2 open 1-2

MCU op-amp open 2-3 open 1-2

Three Shunt

On board op-amp 1-2 1-2 1-2 1-2

MCU op-amp 2-3 2-3 2-3 1-2

The operational amplifier TSV994 used on the amplifying networks has a 20 MHz gain bandwidth from a single positive supply of 3.3 V.

The amplification network must allow bidirectional current sensing, so an output offset VO = +1.65 V represents zero current.

For the STIPNS1M50T

-H (I

OCP

= 1.3 A; R

SHUNT

= 0.68 Ω), the maximum measurable phase current, considering

that the output swings from +1.65 V to +3.3 V (MCU supply voltage) for positive currents and from +1.65 V to 0 for negative currents is:

Equation 5

MaxMeasCurrent = 

∆ V

= 1.3A (6)

rm=



∆ V

Max

MeasCurrent

1.65

1.3

1.27

Ω (7)

The overall trans-resistance of the two-port network is:

rm= R

SHU

∙ AMP = 0.68 ∙ AMP = 1.27Ω (8)

AMP = 

SHUN

1.27

0.68

1.87 (9)

Finally choosing Ra=Rb and Rc=Rd, the differential gain of the circuit is:

P = 

1.9 (10)

An amplification gain of 1.9 was chosen. The same amplification is obtained for all the other devices, taking into account the OCP current and the shunt resistance, as described in Table 1.

The RC filter for output amplification is designed to have a time constant that matches noise parameters in the range of 1.5 µs:

4 ∙

τ =

4 ∙

Re∙ Cc= 1.5μs (11)

Cc= 

1.5µs

4 ∙ 1000

375p

F

330pFselected (12)

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Table 3. Amplifying networks

Phase

Amplifying network RC filter

Ra Rb Rc Rd Re Cc

Phase A (U) R21 R23 R20 R24 R22 C25

Phase B (V) R26 R27 R25 R29 R43 C29

Phase C (W) R30 R32 R28 R33 R31 C31

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7 Temperature monitoring

The SLLIMM-nano SMD MOSFET family integrates an NTC thermistor placed close to the power stage. The board is designed to use it in sharing with the SD pin. Monitoring can be enabled and disabled via the SW4 switch.

7.1 NTC Thermistor

The built-in thermistor (85 kΩ at 25 °C) is inside the IPM and connected on

SD /OD pin2 (shared with the SD

function).

Given the NTC characteristic and the sharing with the SD function, the network is designed to keep the voltage on this pin higher than the minimum voltage required for the pull up voltage on this pin over the whole temperature range.

Considering V

bias

= 3.3 V, a pull up resistor of 1 kΩ (R10) was used.

The figure below shows the typical voltage on this pin as a function of device temperature.

Figure 1

1. NTC voltage vs temperature

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

25 50 75 100 125

VSD [V]

Temperature [°C]

Vdd=3.3V

Rsd=1.0kohm

Isd (SD ON)=2.8mA

From/to m

SD/OD

Smart

shut

down

Bias

SLLIMM

NTC

SD_thL

SD_thH

MCU_thH

MCU_thL

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8 Firmware configuration for STM32 PMSM FOC SDK

The following table summarizes the parameters which customize the latest version of the ST FW motor control library for permanent magnet synchronous motors (PMSM): STM32 PMSM FOC SDK for this

STEV

AL-IPMnM1S.

able 4. ST motor control workbench GUI parameters - STEVAL-IPMnM1S

Block Parameter Value

Over current protection

Comparator threshold

ref

∙

R15 + R11

+ VF= 0.83V (13)

Overcurrent network offset

Overcurrent network gain 0.1 V/A

Bus voltage sensing Bus voltage divider 1/125

Rated bus voltage info

Min rated voltage 125 V

Max rated voltage 400 V

Nominal voltage 325 V

Current sensing

Current reading typology Single- or three-shunt

Shunt resistor value 0.68 Ω

Amplifying network gain 1.9

Command stage

Phase U Driver HS and LS: Active high

Phase V Driver HS and LS: Active high

Phase W Driver HS and LS: Active high

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9 Connectors, jumpers and test pins

Table 5. Connectors

Connector Description / pinout

Supply connector (DC – 125 V to 400 V)

•

Positive +

•

Negative -

Motor control connector

1 - emergency stop

3 - PWM-A-H

5 - PWM-A-L

7 - PWM-B-H

9 - PWM-B-L

1 - PWM-C-H

13 - PWM-C-L

15 - current phase A

17 - current phase B

19 - current phase C

21 - NTC bypass relay

23 - dissipative brake PWM

25 - +V power

27- PFC sync.

29 - PWM VREF

31 - measure phase A

33 - measure phase B

2 - GND

4 - GND

6 - GND

8 - GND

10 - GND

12 - GND

14 - HV bus voltage

16 - GND

18 - GND

20 - GND

22 - GND

24 - GND

26 - heat sink temperature

28 - VDD_m

30 - GND

32 - GND

34 - measure phase C

Motor connector

• phase A (U)

•

phase B (V)

•

phase C (W)

VCC supply (20 VDC max)

•

Positive +

•

Negative -

Hall sensors / encoder input connector

Hall sensors input 1 / encoder A+

2. Hall sensors input 2 / encoder B+

3. Hall sensors input 3 / encoder Z+

4. 3.3 or 5 Vdc

5. GND

Table 6. Jumpers

Jumper Description

SW1

Choose current U to send to control board:

Jumper on 1-2: from amplification

Jumper on 2-3: directly from motor output

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Jumper Description

SW2

Choose current V to send to control board

Jumper on 1-2: from amplification

Jumper on 2-3: directly from motor output

SW3

Choose current W to send to control board:

Jumper on 1-2: from amplification

Jumper on 2-3: directly from motor output

SW4

Enable or disable sending temperature information from NTC to microcontroller

SW5, SW6

SW7, SW8

Choose 1-shunt or 3-shunt configuration.

(through solder bridge)

SW5, SW6 closed

SW7, SW8 open

one shunt

SW5, SW6 open

SW7, SW8 closed

three shunt

SW9, SW16

Choose input power for Hall/Encoder

Jumper on 1-2: 5 V

Jumper on 2-3: 3.3 V

SW10, SW13

Modify phase A hall sensor network

SW11, SW14 Modify phase B hall sensor network

SW12, SW15 Modify phase C hall sensor network

SW17

Choose on-board or IPM op-amp in one shunt configuration

Jumper on 1-2: on-board op-amp

Jumper on 2-3: IPM op-amp

Table 7. Test pins

Test Pin Description

TP1 OUTW

TP2 HINW (high side W control signal input)

TP3 VccW

TP4 SD (shutdown pin)/NTC

TP5 LINW (high side W control signal input)

TP6 OP+

TP7 OPOUT

TP8 OP-

TP9 VbootW

TP10 OUTV

TP11 NV

TP12 HINV (high side V control signal input)

TP13 VbootV

TP14 LINV (high side V control signal input)

TP15 CIN

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Test Pin Description

TP16 NU

TP17 NW

TP18 OUTU

TP19 VbootU

TP20 LINU (high side U control signal input)

TP21 Ground

TP22 Ground

TP23 HinU (high side U control signal input)

TP24 Current_A_amp

TP25 Current_B_amp

TP26 Current_C_amp

TP27 Ground

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10 Bill of materials

Table 8. STEVAL-IPMnM1S bill of materials

Item Q.ty Ref. Part / Value Description

Manufacture

Order code

1 - C1 330µF CPCYL_D1400 EPCOS B43501A9337M000

2 4

C2, C22, C26, C28

10nF 1206 AVX 12065C103KAT2A

3 2 C3, C4 47µF PTH 2-pin any any

4 3 C5, C6, C7 2.2µF 1206 Murata GCM31MR71E225KA57L

5 1 C8 1nF 1206 Kemet C1206C102K5RACTU

6 1 C12 10µF PTH 2-pin any any

7 9

C10, C11, C14, C15, C16, C19, C35, C36, C37

10pF 1206 AVX 12061A100JAT2A

8 1 C17 0.1µF 1812 Murata GRM43DR72J104KW01L

9 1 C18 3.3nF 1206 Kemet C1206C332K5RACTU

10 1 C21 4.7µF PTH 2-pin any any

11 3 C24, C27, C30 100pF 1206 Kemet C1206C101J1GACTU

12 3 C25, C29, C31 330pF 1206 AVX 12065A331JAT2A

13 5

C13, C23, C32, C33, C34

100nF 1206 AVX 12065C104KAZ2A

14 5

D1, D3, D4, D5, D10

Diode BAT48J SOD323 ST BAT48J

15 1 D2 LED Red PTH 2-pin Ledtech L4RR3000G1EP4

16 4 D6, D7, D8, D9 Diode ZENER SOD123

Fairchild SemiconductorMMSZ5250B

17 1 J1

Conector 7.62 mm - 2P

PTH 2-pin p.7,62mm

TE Connectivity AMP Connectors

282845-2

18 1 J2 Connector 34P PTH 34-pin RS -

19 1 J3

Connector 7.62 mm - 3P

PTH 3-pin p.7,62mm

TE Connectivity AMP Connectors

282845-3

20 1 J4

Conector 5 mm 2P

PTH 2-pin p.5mm

Phoenix Contact

1729128

21 1 J5

Connector 2.54 mm - 5P

PTH 5-pin p.2,54mm

RS W81136T3825RC

22 2 R1, R2 470kΩ 1206 any any

23 1 R3 120 Ω 1206 any any

24 1 R4 7.5kΩ 1206 Panasonic ERJP08F7501V

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Page 21

Item Q.ty Ref. Part / Value Description

Manufacture

Order code

25 19

R5, R6, R7, R8, R9, R10, R13, R14, R15, R19, R21, R22, R23, R26, R27, R30, R31, R32, R43

1kΩ 1206 any any

26 1 R12 5.6kΩ 1206 any any

27 3 R16, R17, R18 0.33Ω 2512 Panasonic ERJ1TRQFR33U

28 6

R20, R24, R25, R28, R29, R33

1.91kΩ 1206 Panasonic ERJ8ENF1911V

29 3 R37, R38, R39 2.4kΩ 1206 any any

30 7

R11, R34, R35, R36, R40, R41, R42

4.7kΩ 1206 any any

31 3

RC2, RC5, RC14

0 Ω 0805 any any

32 -

RC1, RC3, RC4, RC6, RC7, RC8, RC9, RC10, RC1

1, RC12,

RC13

- Not mounted - -

2 SW7, SW8 Solder Bridge SMD - -

34 2 SW5, SW6 open SMD - -

35 6

SW1, SW2, SW3, SW9, SW16, SW17

Jumper 2.54 PTH 3-pin RS W81136T3825RC

36 7

SW4, SW10, SW1

1, SW12, SW13, SW14, SW15

Jumper 2.54 PTH 2-pin RS W81

136T3825RC

37 26

TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10, TP11, TP12, TP13, TP14, TP15, TP16, TP17, TP18, TP19, TP20, TP22, TP23, TP24, TP25, TP26, TP27

PCB terminal 1mm

PTH 1-pin KEYSTONE

5001

38 1 TP21

PCB terminal

12.7mm

PTH 2-pin HARWIN D3083B-46

39 10 to close SWxy

Jumper female straight, black, 2-way

, 2.54mm

Jumper

TE Connectivity

881545-2

40 1

U1 TSV994IDT SO14 ST TSV994IDT

41 1 U2

STIPNS1M50TH

PTH 26-pin ST STIPNS1M50T-H

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Page 22

11 PCB design guide

Optimization of PCB layout for high voltage, high current and high switching frequency applications is a critical point. PCB layout is a complex matter as it includes several aspects, such as length and width of track and circuit areas, but also the proper routing of the traces and the optimized reciprocal arrangement of the various system elements in the PCB area.

A good layout can help the application to properly function and achieve expected performance. On the other hand, a PCB without a careful layout can generate EMI issues, provide overvoltage spikes due to parasitic inductance along the PCB traces and produce higher power loss and even malfunction in the control and sensing stages.

In general, these conditions were applied during the design of the board:

•

PCB traces designed as short as possible and the area of the circuit (power or signal) minimized to avoid the sensitivity of such structures to surrounding noise.

•

Good distance between switching lines with high voltage transitions and the signal line sensitive to electrical noise.

•

The shunt resistors were placed as close as possible to the low side pins of the SLLIMM. To decrease the parasitic inductance, a low inductance type resistor (SMD) was used.

• RC filters were placed as close as possible to the SLLIMM pins in order to increase their efficiency.

11.1 Layout of reference board

All the components are inserted on the top of the board.

Figure 12. Silk screen and etch - top side

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Figure 13. Layout bottom side

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Layout of reference board

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12 Recommendations and suggestions

• The BOM list is not provided with a bulk capacitor already inserted in the PCB. However, the necessary space has been included (C1). In order to obtain a stable bus supply voltage, it is advisable to use an adequate bulk capacity

. For general motor control applications, an electrolytic capacitor of at least 100 µF is

suggested.

•

Similarly

, the PCB does not come with a heat sink. In case of need, place an heat sink on top of the PCB

with thermal conductive foil and screws. RTH is an important factor for good thermal performance and depends on certain factors such as current phase, switching frequency, power factor and ambient

temperature.

• The board requires +5 V and +3.3 V to be supplied externally through the 34-pin motor control connector J2. Please refer to the relevant board manuals for information on key connections and supplies.

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A References

Freely available on www.st.com:

1. STIPNS1M50T-H datasheet

2. TSV994 datasheet

3. BAT48 datasheet

4. MMSZ5250B datasheet

5. UM2380 STM32 motor control SDK v5.2 tools

6. AN4043 SLLIMM™-nano small low-loss intelligent molded module

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Revision history

Table 9. Document revision history

Date Version Changes

17-Sep-2018 1 Initial release.

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Contents

1 General safety instructions ........................................................2

2 Key features .......................................................................3

3 Circuit schematics.................................................................4

3.1 Schematic diagrams ............................................................4

4 Main characteristics ...............................................................9

5 Filters and key parameters........................................................10

5.1 Input signals..................................................................10

5.2 Bootstrap capacitor ............................................................10

5.3 Overcurrent protection .........................................................10

5.3.1 SD pin ...............................................................11

5.3.2 Shunt resistor selection...................................................11

5.3.3 CIN RC filter ...........................................................12

5.3.4 Single- or three-shunt selection.............................................12

6 Current sensing amplifying network ..............................................13

7 T

emperature monitoring ..........................................................15

7.1 NTC Thermistor...............................................................15

8 Firmware configuration for STM32 PMSM FOC SDK ...............................16

9 Connectors, jumpers and test pins ................................................17

10 Bill of materials ...................................................................20

11 PCB design guide ................................................................22

11.1 Layout of reference board ......................................................22

12 Recommendations and suggestions ..............................................24

A References .......................................................................25

Revision history .......................................................................26

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List of tables

Table 1. Shunt selection ....................................................................12

Table 2. Op-amp sensing configuration ..........................................................13

able 3. Amplifying networks ................................................................. 14

Table 4. ST motor control workbench GUI parameters - STEVAL-IPMnM1S ................................ 16

Table 5. Connectors .......................................................................17

Table 6. Jumpers .........................................................................17

Table 7. Test pins ......................................................................... 18

Table 8. STEVAL-IPMnM1S bill of materials.......................................................20

Table 9. Document revision history ............................................................. 26

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List of figures

Figure 1. Motor control board (top view) based on SLLIMM-nano SMD ....................................1

Figure 2. STEVAL-IPMnM1S - circuit schematic (1 of 5) ..............................................4

Figure 3. STEV

AL-IPMnM1S - circuit schematic (2 of 5) ..............................................5

Figure 4. STEVAL-IPMnM1S - circuit schematic (3 of 5) ..............................................6

Figure 5. STEVAL-IPMnM1S - circuit schematic (4 of 5) ..............................................7

Figure 6. STEVAL-IPMnM1S - circuit schematic (5 of 5) ..............................................8

Figure 7. STEVAL-IPMnM1S architecture ........................................................9

Figure 8. C

BOOT

graph selection.............................................................. 10

Figure 9. One-shunt configuration.............................................................12

Figure 10. Three-shunt configuration ...........................................................12

Figure 11. NTC voltage vs temperature.......................................................... 15

Figure 12. Silk screen and etch - top side ........................................................22

Figure 13. Layout bottom side ................................................................ 23

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IMPORTANT NOTICE – PLEASE READ CAREFULLY

STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.

Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products.

No license, express or implied, to any intellectual property right is granted by ST herein.

Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.

ST and the ST logo are trademarks of ST

. All other product or service names are the property of their respective owners.

Information in this document supersedes and replaces information previously supplied in any prior versions of this document.

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