ST STEF12 User Manual

This is information on a product in full production.

March 2012 Doc ID 019056 Rev 4 1/20

20

STEF12

Electronic fuse for 12 V line

Datasheet − production data

Features

■ Continuous current (typ): 3.6 A

■ N-channel on-resistance (typ): 53 mΩ

■ Enable/Fault functions

■ Output clamp voltage (typ):15 V

■ Undervoltage lockout

■ Short-circuit limit

■ Overload current limit

■ Controlled output voltage ramp

■ Thermal latch (typ): 165 °C

■ Uses tiny capacitors

■ Operating junction temp. - 40 °C to 125 °C

■ Available in DFN10 (3x3 mm) package

Applications

■ Hard disk drives

■ Solid state drives (SSD)

■ Hard disk and SSD arrays

■ Set-top boxes

■ DVD and Blu-ray disc drivers

Description

The STEF12 is an integrated electronic fuse

optimized for monitoring output current and input

voltage. Connected in series to a 12 V rail, it is

capable of protecting the electronic circuitry on its

output from overcurrent and overvoltage. The

device has a controlled delay and turn-on time.

When an overload condition occurs, the STEF12

limits the output current to a predefined safe

value. If the anomalous overload condition

persists it goes into an open state, disconnecting

the load from the power supply. If a continuous

short-circuit is present on the board, when power

is re-applied the E-fuse initially limits the output

current to a safe value and then again goes into

an open state. The device is equipped with a

thermal protection circuit. The intervention of the

thermal protection is signalled to the board

monitoring circuits through a signal on the Fault

pin. Unlike the mechanical fuses, which must be

physically replaced after a single event, the E-

fuse does not degrade in its performance after

short-circuit/thermal protection interventions and

it is reset either by recycling the supply voltage or

using the Enable pin. The companion chip for the

5 V power rails is also available with part number

STEF05.

DFN10 (3x3 mm)

Table 1. Device summary

Order code Package Packaging

STEF12PUR DFN10 (3x3 mm) Tape and reel

www.st.com

Contents STEF12

2/20 Doc ID 019056 Rev 4

Contents

1 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

5 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.1.1 Turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

5.1.2 Normal operating condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.1.3 Output voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.1.4 Current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.1.5 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.2 R limit calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.3 C

dv/dt

calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

5.4 Enable/Fault pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

STEF12 Device block diagram

Doc ID 019056 Rev 4 3/20

1 Device block diagram

Figure 1. STEF12 block diagram

AM09891v1

Pin configuration STEF12

4/20 Doc ID 019056 Rev 4

2 Pin configuration

Figure 2. Pin configuration (top view)

V

CC

Source

Source

Source

Source

Source

GND

dv/dt

En/fault

I-Limit

N/C

AM09880v1

Table 2. Pin description

Pin n° Symbol Note

1 GND Ground pin

2dv/dt

The internal dv/dt circuit controls the slew rate of the output voltage at turn-on. The

internal capacitor allows a ramp-up time of around 1ms. An external capacitor can be

added to this pin to increase the ramp time. If an additional capacitor is not required, this

pin should be left open.

3 En/Fault

The Enable/Fault pin is a tri-state, bi-directional interface. During normal operation the pin

must be left floating, or it can be used to disable the output of the device by pulling it to

ground using an open drain or open collector device.

If a thermal fault occurs, the voltage on this pin goes into an intermediate state to signal a

monitor circuit that the device is in thermal shutdown. It can be connected to another

device of this family to cause a simultaneous shutdown during thermal events.

4 I-Limit

A resistor between this pin and the Source pin sets the overload and short-circuit current

limit levels.

5 NC Not connected

6 to 10 V

OUT

/Source

Connected to the source of the internal power MOSFET and to the output terminal of the

fuse

11 V

CC

Exposed pad. Positive input voltage must be connected to V

CC

.

STEF12 Maximum ratings

Doc ID 019056 Rev 4 5/20

3 Maximum ratings

Note: Absolute maximum ratings are those values beyond which damage to the device may occur.

Functional operation under these conditions is not implied.

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit

V

CC

Positive power supply voltage (steady state) -0.3 to 18

V

Positive power supply voltage (max 100ms) -0.3 to 25

V

OUT

/source (max 100ms) -0.3 to Vcc+0.3 V

I-Limit (max 100ms) -0.3 to 25 V

En/Fault -0.3 to 7 V

dv/dt -0.3 to 7 V

T

op

Operating junction temperature range

(1)

-40 to 125 °C

T

STG

Storage temperature range -65 to 150 °C

T

LEAD

Lead temperature (soldering) 10 sec 260 °C

1. The thermal limit is set above the maximum thermal rating. It is not recommended to operate the device at temperatures

greater than the maximum ratings for extended periods of time.

Table 4. Thermal data

Symbol Parameter Value Unit

R

thJA

Thermal resistance junction-ambient 52.7 °C/W

R

thJC

Thermal resistance junction-case 17.4 °C/W

Table 5. ESD performance

Symbol Parameter Test conditions Value Unit

ESD ESD protection

HBM 1 kV

MM 200 V

CDM 500 V

Electrical characteristics STEF12

6/20 Doc ID 019056 Rev 4

4 Electrical characteristics

V

CC

= 12 V, V

EN

= 3.3 V, C

I

= 10 µF, C

O

= 47 µF, T

J

= 25 °C (unless otherwise specified).

Table 6. Electrical characteristics for STEF12

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Under/Overvoltage protection

V

Clamp

Output clamping voltage V

CC

= 18 V 13.8 15 16.2 V

V

UVLO

Undervoltage lockout Turn-on, voltage rising 7.7 8.5 9.3 V

V

Hyst

UVLO hysteresis 0.80 V

Power MOSFET

t

dly

Delay time

Enabling of chip to I

D

= 100 mA

with a 1 A resistive load

350 µs

R

DSon

On-resistance

(1)

35 53 70

mΩ

- 40 °C < T

J

< 125 °C

(2)

82

V

OFF

Off state output voltage V

CC

= 18 V, V

GS

= 0, R

L

= infinite 40 100 mV

I

D

Continuous current

0.5in

2

pad, T

A

= 25 °C

(1)

3.6

A

Minimum copper, T

A

= 80 °C 1.7

Current limit

I

Short

Short-circuit current limit R

Limit

= 22 Ω 3.3 4.4 5.5 A

I

Lim

Overload current limit R

Limit

= 22 Ω 4.4 A

dv/dt circuit

dv/dt Output voltage ramp time

Enable to V

OUT

= 11.7 V, No

C

dv/dt

0.5 0.9 2.6 ms

Enable/Fault

V

IL

Low level input voltage Output disabled 0.35 0.58 0.81 V

V

I(INT)

Intermediate level input voltage Thermal fault, output disabled 0.82 1.4 1.95 V

V

IH

High level input voltage Output enabled 1.96 2.64 3.3 V

V

I(MAX)

High state maximum voltage 3.4 4.3 5.4 V

I

IL

Low level input current (sink) V

Enable

= 0 V -10 -30 µA

I

I

High level leakage current for

external switch

V

Enable

= 3.3 V 1 µA

Maximum fan-out for fault signal

Total numbers of chips that can

be connected to this pin for

simultaneous shutdown

3Units

Total device

I

Bias

Bias current

Device operational 1.5 2

mA

Thermal shutdown 1