ST STEF12 User Manual

Features
Continuous current (typ): 3.6 A
Enable/Fault functions
Output clamp voltage (typ):15 V
Undervoltage lockout
Short-circuit limit
Overload current limit
Controlled output voltage ramp
Thermal latch (typ): 165 °C
Uses tiny capacitors
Operating junction temp. - 40 °C to 125 °C
Available in DFN10 (3x3 mm) package
Applications
Hard disk drives
Solid state drives (SSD)
Hard disk and SSD arrays
Set-top boxes
DVD and Blu-ray disc drivers
Description
The STEF12 is an integrated electronic fuse optimized for monitoring output current and input voltage. Connected in series to a 12 V rail, it is capable of protecting the electronic circuitry on its output from overcurrent and overvoltage. The device has a controlled delay and turn-on time. When an overload condition occurs, the STEF12 limits the output current to a predefined safe value. If the anomalous overload condition
STEF12
Electronic fuse for 12 V line
Datasheet production data
DFN10 (3x3 mm)
persists it goes into an open state, disconnecting the load from the power supply. If a continuous short-circuit is present on the board, when power is re-applied the E-fuse initially limits the output current to a safe value and then again goes into an open state. The device is equipped with a thermal protection circuit. The intervention of the thermal protection is signalled to the board monitoring circuits through a signal on the Fault pin. Unlike the mechanical fuses, which must be physically replaced after a single event, the E­fuse does not degrade in its performance after short-circuit/thermal protection interventions and it is reset either by recycling the supply voltage or using the Enable pin. The companion chip for the 5 V power rails is also available with part number STEF05.

Table 1. Device summary

Order code Package Packaging
STEF12PUR DFN10 (3x3 mm) Tape and reel
March 2012 Doc ID 019056 Rev 4 1/20
This is information on a product in full production.
www.st.com
20
Contents STEF12
Contents
1 Device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
5 Typical application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1 Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1.1 Turn-on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5.1.2 Normal operating condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1.3 Output voltage clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1.4 Current limiting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1.5 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.2 R limit calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.3 C
5.4 Enable/Fault pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
dv/dt
6 Typical performance characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
7 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20 Doc ID 019056 Rev 4
STEF12 Device block diagram

1 Device block diagram

Figure 1. STEF12 block diagram

AM09891v1
Doc ID 019056 Rev 4 3/20
Pin configuration STEF12

2 Pin configuration

Figure 2. Pin configuration (top view)

GND dv/dt
V
En/fault
CC
I-Limit
N/C
AM09880v1

Table 2. Pin description

Pin n° Symbol Note
1 GND Ground pin
The internal dv/dt circuit controls the slew rate of the output voltage at turn-on. The
2dv/dt
3 En/Fault
internal capacitor allows a ramp-up time of around 1ms. An external capacitor can be added to this pin to increase the ramp time. If an additional capacitor is not required, this pin should be left open.
The Enable/Fault pin is a tri-state, bi-directional interface. During normal operation the pin must be left floating, or it can be used to disable the output of the device by pulling it to ground using an open drain or open collector device.
If a thermal fault occurs, the voltage on this pin goes into an intermediate state to signal a monitor circuit that the device is in thermal shutdown. It can be connected to another device of this family to cause a simultaneous shutdown during thermal events.
Source Source Source Source Source
4 I-Limit
5 NC Not connected
6 to 10 V
11 V
4/20 Doc ID 019056 Rev 4
OUT
/Source
CC
A resistor between this pin and the Source pin sets the overload and short-circuit current limit levels.
Connected to the source of the internal power MOSFET and to the output terminal of the fuse
Exposed pad. Positive input voltage must be connected to VCC.
STEF12 Maximum ratings

3 Maximum ratings

Table 3. Absolute maximum ratings

Symbol Parameter Value Unit
V
CC
/source (max 100ms) -0.3 to Vcc+0.3 V
V
OUT
Positive power supply voltage (max 100ms) -0.3 to 25
V
I-Limit (max 100ms) -0.3 to 25 V
En/Fault -0.3 to 7 V
dv/dt -0.3 to 7 V
Positive power supply voltage (steady state) -0.3 to 18
T
op
T
STG
T
LEAD
1. The thermal limit is set above the maximum thermal rating. It is not recommended to operate the device at temperatures greater than the maximum ratings for extended periods of time.
Operating junction temperature range
Storage temperature range -65 to 150 °C
Lead temperature (soldering) 10 sec 260 °C
(1)
-40 to 125 °C
Note: Absolute maximum ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.

Table 4. Thermal data

Symbol Parameter Value Unit
R
R
thJA
thJC
Thermal resistance junction-ambient 52.7 °C/W
Thermal resistance junction-case 17.4 °C/W

Table 5. ESD performance

Symbol Parameter Test conditions Value Unit
HBM 1 kV
ESD ESD protection
Doc ID 019056 Rev 4 5/20
MM 200 V
CDM 500 V
Electrical characteristics STEF12

4 Electrical characteristics

VCC = 12 V, V
= 3.3 V, CI = 10 µF, CO = 47 µF, TJ = 25 °C (unless otherwise specified).
EN

Table 6. Electrical characteristics for STEF12

Symbol Parameter Test Conditions Min. Typ. Max. Unit
Under/Overvoltage protection
V
Clamp
V
UVLO
V
Hyst
Power MOSFET
t
dly
R
DSon
V
OFF
I
Current limit
Output clamping voltage VCC = 18 V 13.8 15 16.2 V
Undervoltage lockout Turn-on, voltage rising 7.7 8.5 9.3 V
UVLO hysteresis 0.80 V
Delay time
On-resistance
Off state output voltage VCC = 18 V, V
Continuous current
D
Enabling of chip to I with a 1 A resistive load
(1)
- 40 °C < TJ < 125 °C
GS
2
0.5in
pad, TA = 25 °C
Minimum copper, TA = 80 °C 1.7
= 100 mA
D
350 µs
35 53 70
(2)
= 0, RL = infinite 40 100 mV
(1)
3.6
82
mΩ
A
I
Short
I
Lim
Short-circuit current limit R
Overload current limit R
dv/dt circuit
dv/dt Output voltage ramp time
Enable/Fault
V
V
V
I(MAX)
V
I(INT)
I
Low level input voltage Output disabled 0.35 0.58 0.81 V
IL
Intermediate level input voltage Thermal fault, output disabled 0.82 1.4 1.95 V
High level input voltage Output enabled 1.96 2.64 3.3 V
IH
High state maximum voltage 3.4 4.3 5.4 V
Low level input current (sink) V
IL
High level leakage current for
I
I
external switch
Maximum fan-out for fault signal
Total device
I
Bias
Bias current
= 22 Ω 3.3 4.4 5.5 A
Limit
= 22 Ω 4.4 A
Limit
Enable to V C
dv/dt
= 0 V -10 -30 µA
Enable
V
= 3.3 V 1 µA
Enable
= 11.7 V, No
OUT
0.5 0.9 2.6 ms
Total numbers of chips that can be connected to this pin for simultaneous shutdown
Device operational 1.5 2
Thermal shutdown 1
3Units
mA
6/20 Doc ID 019056 Rev 4
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