STD5NM50
STD5NM50-1
N-CHANNEL 500V - 0.7Ω - 7.5A DPAK/IPAK
MDmesh™Power MOSFET
TYPE V
STD5NM50
STD5NM50- 1
n
TYPICAL RDS(on) = 0.7Ω
n
HIGH dv/dt AND AVALANCHE CAPABILITIES
n
100% AVALANCHE TESTED
n
LOW INPUT CAPACITANCE AND GATE
DSS
500V
500V
R
DS(on)
<0.8Ω
<0.8Ω
I
D
7.5 A
7.5 A
CHARGE
n
LOW GATE INPUT RESIST ANC E
n
TIGHT PROCESS CONTROL AND HIGH
MANUFACTURING YIELDS
DESCRIPTION
The MDmesh™
is a new revolutionary MOSFET
technology that associates the Multiple Drain process with the Company’s PowerMESH™ horizontal
layout. The resulting product has an outstanding low
on-resistance, impressively high dv/dt and excellent
avalanche characteristics. The adoption of the
Company’s proprietary strip technique yields overall
dynamic performance that is significantly better than
that of similar competition’s products.
APPLICATIONS
The MDmesh™ family is very suitable for increasing
power density of high voltage converters allowing
system miniaturization and higher efficiencies.
3
1
DPAK
TO-252
INTERNAL SCHEMATIC DIAGRAM
IPAK
TO-251
(Add Suffix “-1”)
3
2
1
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
D
I
D
I
DM
P
TOT
dv/dt (1) Peak Diode Recovery voltage slope 15 V/ns
T
stg
T
j
(•)Pu l se width limited by safe operating area
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
Gate- source Voltage ±30 V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
(l)
Drain Current (pulsed) 30 A
Total Dissipation at TC = 25°C
Derating Factor 0.8 W/°C
Storage Temperature
Max. Operating Junction Temperature
(1) ISD ≤ 5A, di/dt ≤ 400A/µ s, VDD ≤ V
500 V
500 V
7.5 A
4.7 A
100 W
– 55 to 150 °C
, Tj ≤ T
(BR)DSS
JMAX.
1/10September 2002
STD5NM50/STD5NM50-1
THERMA L D ATA
Rthj-case Thermal Resistance Junction-case Max 1.25 °C/W
Rthj-amb Thermal Resistance Junction-ambient Max 100 °C/W
T
l
AVALANCHE CHARACTERISTICS
Symbol Parameter Max Value Unit
I
AR
E
AS
Maximum Lead Temperature For Soldering Purpose 300 °C
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
max)
j
Single Pulse Avalanche Energy
(starting T
= 25 °C, ID = IAR, VDD = 50 V)
j
2.5 A
300 mJ
ELECTRICAL CHARACTERISTICS (T
= 25 °C UNLESS OTHERWISE SPECIFIED)
CASE
OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
(BR)DSS
Drain-source
ID = 250 µA, VGS = 0 500 V
Breakdown Voltage
ON
I
I
GSS
(1)
DSS
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
V
= Max Rating
DS
V
= Max Rating, TC = 125 °C
DS
V
= ±30V ±100 nA
GS
1µA
10 µA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
V
= VGS, ID = 250µA
DS
VGS = 10V, ID = 2.5A
345V
0.7 0.8 Ω
Resistance
DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(1) Forward Transconductance VDS = 25Vx, ID= 2.5A 3.5 S
g
fs
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance 88 pF
Reverse Transfer
Capacitance
C
(2) Equivalent Output
oss eq.
Capacitance
R
G
1. Pulsed: Pu l se duration = 300 µs, duty c ycle 1.5 %.
2. C
Gate Input Resistance f=1 MHz Gate DC Bias = 0
is defined as a constant equivalent capacitance giving the same charging time as C
oss eq.
.
V
DSS
V
= 25V, f = 1 MHz, VGS = 0
DS
415 pF
12 pF
VGS = 0V, VDS = 0V to 400V 50 pF
3 Ω
Test Signal Level = 20mV
Open Drain
when VDS increase s fr om 0 to 80%
oss
2/10
STD5NM50/STD5NM50-1
ELECTRICAL CHARACTERISTICS (CONTINUED)
SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time 8 ns
Total Gate Charge
Gate-Source Charge 5 nC
Gate-Drain Charge 6 nC
SWITCHING OFF
Symbol Param eter Test Conditions Min. Typ. Max. U nit
t
r(Voff)
t
t
f
c
Off-voltage Rise Time
Fall Time 6 ns
Cross-over Time 13 ns
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
VSD (1)
t
rr
Q
rr
I
RRM
t
rr
Q
rr
I
RRM
Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
2. Pulse width lim i t ed by safe ope rating area.
(2)
Source-drain Current 7.5 A
Source-drain Current (pulsed) 30 A
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charg e 1.1 µC
Reverse Recovery Curren t 11.5 A
Reverse Recovery Time
Reverse Recovery Charg e
Reverse Recovery Curren t
= 250V, ID = 2.5A
DD
RG= 4.7Ω VGS = 10V
(see test circuit, Figure 3)
V
= 400V, ID = 7.5A
DD
VGS = 10V
V
= 400V, ID = 5A,
DD
R
= 4.7Ω, V
G
GS
= 10V
(see test circuit, Figure 5)
ISD = 7.5A, VGS = 0
I
= 5A, di/dt = 100A/µs,
SD
VDD = 100V, Tj = 25°C
(see test circuit, Figure 5)
= 5A, di/dt = 100A/µs,
I
SD
VDD = 100V, Tj = 150°C
(see test circuit, Figure 5)
Thermal Impeda nce Safe Operating Area
16 ns
13 nC
14 ns
1.5 V
185 ns
270
1.6
12
ns
µC
A
3/10
STD5NM50/STD5NM50-1
Output Characteristics
Transconductanc e
Transfer Characteristics
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
4/10
Capacitance Variations
STD5NM50/STD5NM50-1
Normalized Gate Threshold Volta ge vs
Temperature
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
Normalized BVDSS vs Temperature
5/10
STD5NM50/STD5NM50-1
Fig. 2: Unclamped Inductive WaveformFig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/10
TO-252 (DPAK) MECHANICAL DATA
STD5NM50/STD5NM50-1
DIM.
A 2.20 2.40 0.087 0.094
A1 0.90 1.10 0.035 0.043
A2 0.03 0.23 0.001 0.009
B 0.64 0.90 0.025 0.035
B2 5.20 5.40 0.204 0.213
C 0.45 0.60 0.018 0.024
C2 0.48 0.60 0.019 0.024
D 6.00 6.20 0.236 0.244
E 6.40 6.60 0.252 0.260
G 4.40 4.60 0.173 0.181
H 9.35 10.10 0.368 0.398
L2 0.8 0.031
L4 0.60 1.00 0.024 0.039
V2 0
MIN. TYP. MAX. MIN. TYP. MAX.
o
mm inch
o
8
o
0
o
0
P032P_B
7/10
STD5NM50/STD5NM50-1
TO-251 (IPAK) MECHANICAL DAT A
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
mm inch
A 2.2 2.4 0.086 0.094
A1 0.9 1.1 0.035 0.043
A3 0.7 1.3 0.027 0.051
B 0.64 0.9 0.025 0.031
B2 5.2 5.4 0.204 0.212
B3 0.85 0.033
B5 0.3 0.012
B6 0.95 0.037
C 0.45 0.6 0.017 0.023
C2 0.48 0.6 0.019 0.023
D 6 6.2 0.236 0.244
E 6.4 6.6 0.252 0.260
G 4.4 4.6 0.173 0.181
H 15.9 16.3 0.626 0.641
L 9 9.4 0.354 0.370
L1 0.8 1.2 0.031 0.047
L2 0.8 1 0.031 0.039
H
8/10
A
C2
L2
E
B2
= =
= =
D
B3
2
1 3
L1
A1
L
B6
C
A3
B
B5
G
= =
0068771-E
STD5NM50/STD5NM50-1
DPAK FOOTPRINT
All dimensions are in millimeters
TAPE AND REEL SHIPMENT (suffix ”T4”)*
TUBE SHIPMENT (no suffix)*
All dimensions
are in millimeters
REEL MECHANICAL DATA
DIM.
A 330 12.992
B 1.5 0 .059
C 12.8 13.2 0.504 0.520
D 20.2 0.795
G 16.4 18.4 0.645 0.724
N 50 1.968
T 22.4 0.881
mm inch
MIN. MAX. MIN. MAX.
TAPE MECHANICAL DATA
DIM.
A0 6.8 7 0.267 0.275
B0 10.4 10.6 0.409 0.417
B1 12.1 0.476
D 1.5 1.6 0.059 0.063
D1 1.5 0.059
E 1.65 1.85 0.065 0.073
F 7.4 7.6 0.291 0.299
K0 2.55 2.75 0.100 0.108
P0 3.9 4.1 0.153 0.161
P1 7.9 8.1 0.311 0.319
P2 1.9 2.1 0.075 0.082
R 40 1.574
W 15.7 16.3 0.618 0.641
* on sales type
9/10
mm inch
MIN. MAX. MIN. MAX.
BASE QTY BULK QTY
2500 2500
STD5NM50/STD5NM50-1
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibi lity f or the
consequences of use of su ch in formation nor for any in fringement of patents or other rights of third parties w hich may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously suppli ed. STMi croelect ronics pr oducts are not author ized for use as cr itical component s in li fe suppo rt devi ces or
systems without express written approval of STMicroelectronics.
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10/10
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