ST STBP120 User Manual

Overvoltage protection device with thermal shutdown

Features

■ Input overvoltage protection up to 28 V

■ Integrated high voltage N-channel MOSFET

switch

■ Low R

■ Integrated charge pump

■ Thermal shutdown protection

■ Softstart feature to control the inrush current

■ Enable input (EN)

■ Fault indication output (FLT)

■ IN input ESD withstand voltage up to ±15 kV

(air discharge), up to ±8 kV (contact discharge)
in typical application circuit with 1µF input
capacitor (±2 kV HBM for standalone device)

■ Certain overvoltage options compliant with the

China Communications Standard YD/T 1591­2006 (overvoltage protection only)

■ Small, RoHS compliant 2.5 x 2 mm TDFN –

10-lead package.

DS(on)

of 90 mΩ

STBP120

TDFN – 10-lead (2.5 x 2 mm)

Applications

■ Smart phones

■ Digital cameras

■ PDA and palmtop devices

■ MP3 players

■ Low-power handheld devices.

September 2009 Doc ID15492 Rev 5 1/36

www.st.com

1

Contents STBP120

Contents

1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1 Input (IN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.2 Power output (OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.3 Fault indication output (FLT

2.4 Enable input (EN

2.5 No Connect (NC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.6 Ground (GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.1 Power-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.2 Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.3 Undervoltage lockout (UVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

3.4 Overvoltage lockout (OVLO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.5 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.1 Calculating the power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.2 Calculating the junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.3 PCB layout recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

7 Timing diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

8 Typical application performance (STBP120DVDK6F) . . . . . . . . . . . . . 19

9 Typical thermal characteristics (STBP120DVDK6F) . . . . . . . . . . . . . . . 24

10 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2/36 Doc ID 15492 Rev 5

STBP120 Contents

11 Tape and reel specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

12 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

13 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Doc ID 15492 Rev 5 3/36

List of tables STBP120

List of tables

Table 1. Pin description and signal names. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 2. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 3. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 4. Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 5. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Table 6. TDFN – 10-lead, 2.5 x 2.0 x 0.75 mm body, pitch 0.50 mm,

package mechanical data dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Table 7. Carrier tape dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 8. Further tape and reel information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 9. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Table 10. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Table 11. Marking description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Table 12. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

4/36 Doc ID 15492 Rev 5

STBP120 List of figures

List of figures

Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 2. Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 4. Typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Figure 5. Maximum MOSFET current at T

and T

= 125 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

J

Figure 6. Startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 7. Overvoltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 8. Disable (EN
Figure 9. FLT

behavior in disable (EN = high) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 10. Startup delay, t
Figure 11. FLT

indication delay (OK), t
Figure 12. Output turn-off time, t
Figure 13. FLT

indication delay (FAULT), t
Figure 14. Disable time, t

= high). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

on

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

off

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

dis

Figure 15. Startup to overvoltage and startup V

Figure 16. Startup inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 17. Output short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 18. Output short-circuit detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 19. I
Figure 20. I
Figure 21. I
Figure 22. V
Figure 23. V
Figure 24. V
Figure 25. R

vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

CC

CC(STDBY)

CC(UVLO)

OVLO

UVLO

OL(FLT)

DS(on)

vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

at 2.9 V vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

at 1 mA vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

at 1 A vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 26. TDFN – 10-lead, 2.5 x 2.0 x 0.75 mm body, pitch 0.50 mm,

package mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 27. Tape and reel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 28. Reel dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 29. Tape trailer/leader. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Figure 30. Pin 1 orientation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

= 85 °C for various PCB thermal performance

A

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

start

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

stop

delay . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

O(FLT)

Doc ID15492 Rev 5 5/36

Description STBP120

1 Description

The STBP120 device provides overvoltage protection for input voltage up to +28 V. Its low

R

failures of the DC power supplies in accordance with the China MII Communications

Standard YD/T 1591-2006.

In the event of an input overvoltage condition, the device immediately disconnects the DC

power supply by turning off an internal low R

to protected systems.

In addition, the device also monitors its own junction temperature and switches off the

internal MOSFET if the junction temperature exceeds the specified limit.

The device can be controlled by the microcontroller and can also provide status information

about fault conditions.

The STBP120 is offered in a small, RoHS-compliant TDFN – 10-lead (2.5 mm x 2 mm)

package.

Figure 1. Logic diagram

N-channel MOSFET switch protects the systems connected to the OUT pin against

DS(on)

N-channel MOSFET to prevent damage

DS(on)

Figure 2. Pinout

(1)

IN

1

2

3

4

5

STBP120

GND

PAD1

PAD2

10

9

8

7

6

EN

NC

GND NC

FLT

IN OUT

IN

EN

NC

OUT

OUT

OUT

FLT

AM00240

1. Pin 1, PAD1 and PAD2 are No Connect (NC) and may be tied to IN or GND.

6/36 Doc ID 15492 Rev 5

AM00239

STBP120 Pin descriptions

2 Pin descriptions

2.1 Input (IN)

Input voltage pin. This pin is connected to the DC power supply. External low ESR ceramic

capacitor of minimum value 1 µF must be connected between IN and GND. This capacitor is

for decoupling and also protects the IC against dangerous voltage spikes and ESD events.

This capacitor should be located as close to the IN pins as possible.

All IN pins (4, 5) must be hardwired to common supply.

2.2 Power output (OUT)

Output voltage pin. This pin is connected to the input through a low R

MOSFET switch.

If no fault is detected and the STBP120 is not disabled (controlled by the EN

switch is turned on and the output voltage follows the input voltage.

The output is disconnected from the input when the input voltage is under the UVLO

threshold or above the OVLO threshold, when the chip temperature is above the thermal

shutdown threshold or when the chip is disabled by the EN

There is a 50 ms delay, t

specified range and the power output is connected to the input (see Figure 6).

All OUT pins (6, 7) must be hardwired to common supply.

, between input voltage or junction temperature returns to

on

2.3 Fault indication output (FLT)

The fault indication output (active-low - open-drain) provides information on the STBP120

state to the application controller. When FLT

STBP120 is in the undervoltage or overvoltage condition or thermal shutdown mode is

active. When the input voltage and junction temperature is in specified range, the FLT

is in high impedance (Hi-Z) state.

There is an additional 50 ms delay, t

and the FLT

Since the FLT

the controller supply voltage. If there is no need to use this output, it may be left

disconnected. The suitable R

To improve safety and to prevent damage to application circuits in the event of extreme

voltage or current conditions, an optional protective resistor R

the FLT

to 100 kΩ

output is deactivated (i.e. in Hi-Z state) (see Figure 6).

output is of open-drain type, it may be pulled up by an external resistor RP to

resistor value is in range of 10 kΩ to 1 MΩ .

P

output and the controller input. The suitable R

.

, between the power output is connected to the input

start

N-channel

DS(on)

input), this

input.

is active (i.e. driven low), this indicates the

output

can be connected between

FLT

resistor value is in range of 22 kΩ

FLT

The function of the FLT

output is not affected by the EN input state (see Figure 9).

Doc ID 15492 Rev 5 7/36

Pin descriptions STBP120

2.4 Enable input (EN)

This logical input (active-low) can be used to enable or disable the device. When EN input is

driven high, the STBP120 enters the standby mode and the power output is disconnected

from the input. When EN

limits, the power output is connected to the input.

input is driven low and all operating conditions are within specified

Since the EN

input has no internal pull-down resistor, its logical level must be defined by the
controller or by an external resistor. If there is no need to use this input, it should be
connected to the GND.

To improve safety and to prevent damage to application circuits in the event of extreme
voltage or current conditions, an optional protective resistor R
the EN
100 kΩ

The EN

input and the controller output. The suitable resistor value is in range of 22 kΩ to

.

input level has no impact on the functionality of FLT output (see Figure 8 and

Figure 9).

2.5 No Connect (NC)

Pins 1, 8, 9 and exposed pads PAD1, PAD2 are No Connect. Pin 1 and exposed pads PAD1,
PAD2 may be tied to IN or GND if necessary.

2.6 Ground (GND)

Ground. All voltages are referenced to GND.

Table 1. Pin description and signal names

Pin Name Type Function

can be connected between

EN

1, PAD1, PAD2 NC — No Connect. May be tied to IN or GND.

2 GND Supply Ground

3FLT

4, 5 IN Input / supply Input voltage

6, 7 OUT Output Output voltage

8, 9 NC — No Connect

10 EN

8/36 Doc ID 15492 Rev 5

Output Fault indication output (open-drain)

Input Enable input (no internal pull-down resistor)

STBP120 Pin descriptions

Figure 3. Block diagram

IN

ESD

protection

Core

negative

protection

V

REF

Temperature

detector

SUPPLY

REGULATOR

V

VOLTAGE

REFERENCE

Input overvoltage

Input undervoltage

Thermal shutdown

Figure 4. Typical application circuit

CC

(1),(2)

OSCILLATOR

COUNTERS

CONTROL LOGIC

GND

CHARGE PUMP

MOSFET DRIVER

MCU

INTERFACE

protection

ESD

OUT

OFF

FLT

EN

ESD

protection

AM00306

PERIPHERAL

SYSTEM

AC
adapter

POWERED

PERIPHERALS

1. Optional resistors R
required. Low ESR ceramic capacitor C1 is necessary to ensure proper function of the STBP120. Capacitor C2 is not

CONNECTOR

, R

EN

FLT

OR

prevent damage to the controller under extreme voltage or current conditions and are not

SUPPLY CURRENT

CHARGING CURRENT

IN OUT

C1

1 µF

STBP120

FLT

EN

GND

C2
1 µF

CHARGER

R

FLT

R

EN

DC-DC

EN

IC

ENABLE

BATTERY

PA CK

R

SUPPLY

CIRCUITS

PU

CONTROLLER

APPLICATION

AM00314a

necessary for STBP120 but may be required by the charger IC.

2. The STBP120 MOSFET switch topology allows the current to also flow in the reverse direction, from OUT to IN, which can
be useful for powering external peripherals from the system connector. The charger IC should not contain the reverse
diode to prevent the battery pack voltage from appearing on the system connector. If the reverse current (supply current) is
undesirable, it may be prevented by connecting a Schottky diode in series with the OUT pin. The voltage drop between IN
and charger is increased by the voltage drop across the diode.

Doc ID 15492 Rev 5 9/36

Operation STBP120

3 Operation

The STBP120 provides overvoltage protection for positive input voltage up to 28 V using
a built-in low R

3.1 Power-up

At power-up, with EN = low, the MOSFET switch is turned on after a 50 ms delay, ton, after
the input voltage exceeds the UVLO threshold to ensure the input voltage is stabilized. After
an additional 50 ms delay, t

The FLT

output state is valid for VIN input voltage 1.2 V or higher.

3.2 Normal operation

The device continuously monitors the input voltage and its own internal temperature so the
output voltage is kept within the specified range. Internal MOSFET switch is turned on and
the FLT

The STBP120 enters normal operation state if the input voltage returns to the interval
between V
T
conditions have stabilized. Then, after an additional 50 ms delay, t
deactivated (i.e. driven high). This behavior is equivalent to the startup shown on Figure 6.

output is not active.

UVLO

HYS(OFF)

. Internal MOSFET is turned on after the 50 ms delay ton to ensure that the

N-channel MOSFET switch.

DS(on)

, the FLT indication output is deactivated (see Figure 6).

start

and V

OVLO

- V

HYS(OVLO)

and the junction temperature falls below T

, the FLT output is

start

OFF

-

Note: The STBP120 MOSFET switch topology allows the current to also flow in the reverse

direction, i.e. from OUT to IN, which can be useful e.g. for powering external peripherals
from the system connector (see the supply current in Figure 4). At first, the current flows
through the MOSFET body diode. If the voltage that appears on the IN terminal is above the
UVLO threshold, the MOSFET is (after the 50 ms startup delay) turned on so the voltage
drop across STBP120 is significantly reduced. The charger IC should not contain the
reverse diode to prevent the battery pack voltage from appearing on the system connector.
If the reverse current is undesirable, it may be prevented by connecting a properly rated low
drop Schottky diode in series with the OUT pin. The voltage drop between IN and charger is
increased by the voltage drop across the diode.
Due to the MOSFET body diode, thermal shutdown protection is not functional for the
supply current.

3.3 Undervoltage lockout (UVLO)

To ensure proper operation under any conditions, the STBP120 has an undervoltage lockout
(UVLO) threshold. For rising input voltage, the output remains disconnected from input until
V

voltage exceeds the V

IN

as V

is below the UVLO threshold (assuming the input voltage is above 1.2 V). For falling

IN

input voltage, the UVLO circuit has a 50 mV hysteresis, V
immunity under transient conditions.

threshold (3.25 V typ). The FLT output is driven low as long

UVLO

HYS(UVLO)

, to improve noise

10/36 Doc ID 15492 Rev 5

STBP120 Operation

3.4 Overvoltage lockout (OVLO)

If the input voltage VIN rises above the threshold level V
immediately turned off (see Figure 7). At the same time, the fault indication output FLT
activated (i.e. driven low). This device is equipped with hysteresis, V
noise immunity under transient conditions.

For available OVLO thresholds and hystereses, please see the Ta b l e 5 .

3.5 Thermal shutdown

If the STBP120 internal junction temperature exceeds the T
switch is turned off and the fault indication output FLT

To improve thermal stability, this circuit has a 20 °C hysteresis, T

, the MOSFET switch is

OVLO

threshold, internal MOSFET

OFF

is driven low.

HYS(OFF)

HYS(OVLO)

.

is

, to improve

Doc ID 15492 Rev 5 11/36