ST STB7N52K3, STD7N52K3, STF7N52K3, STP7N52K3 User Manual
现货库存、技术资料、百科信息、热点资讯，精彩尽在鼎好!
3
N-channel 525 V, 0.84 Ω, 6.3 A, D2PAK, DPAK, TO-220FP, TO-220
Features
Type V
DSS
R
STB7N52K3 525 V < 0.98 Ω 6.3 A 90 W
STD7N52K3 525 V < 0.98 Ω 6.3 A 90 W
STF7N52K3 525 V < 0.98 Ω 6.3 A
STP7N52K3 525 V < 0.98 Ω 6.3 A 90 W
1. Limited by package
■ 100% avalanche tested
■ Extremely high dv/dt capability
■ Gate charge minimized
■ Very low intrinsic capacitances
■ Improved diode reverse recovery
characteristics
■ Zener-protected
DS(on)
max
I
Pw
D
(1)
25 W
STB7N52K3 - STD7N52K3
STF7N52K3 - STP7N52K3
SuperMESH3™ Power MOSFET
Preliminary Data
3
1
D²PAK
3
2
1
TO-220
Figure 1. Internal schematic diagram
3
1
DPAK
TO-220FP
2
1
Application
■ Switching applications
Description
The new SuperMESH3™ series is obtained
through the combination of a further fine tuning of
ST's well established strip-based PowerMESH™
layout with a new optimization of the vertical
structure. In addition to reducing on-resistance
significantly versus previous generation, special
attention has been taken to ensure a very good
dv/dt capability and higher margin in breakdown
voltage for the most demanding application.
Table 1. Device summary
Order codes Marking Package Packaging
STB7N52K3 7N52K3 D²PAK Tape and reel
STD7N52K3 7N52K3 DPAK Tape and reel
STF7N52K3 7N52K3 TO-220FP Tube
STP7N52K3 7N52K3 TO-220 Tube
July 2008 Rev 1 1/15
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
www.st.com
15
Contents STB7N52K3 - STD7N52K3 - STF7N52K3 - STP7N52K3
Contents
1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/15
STB7N52K3 - STD7N52K3 - STF7N52K3 - STP7N52K3 Electrical ratings
1 Electrical ratings
Table 2. Absolute maximum ratings
Value
Symbol Parameter
TO-220 DPAK D²PAK TO-220FP
Unit
Drain-source voltage (VGS = 0) 525 V
DS
Gate- source voltage ± 30 V
GS
Drain current (continuous) at TC = 25 °C 6.3 6.3
I
D
Drain current (continuous) at TC = 100 °C 4 4
I
D
(2)
Drain current (pulsed) 25 25
Total dissipation at TC = 25 °C 90 25 W
TOT
(1)
(1)
(1)
I
DM
P
V
V
Derating factor 0.72 0.2 W/°C
V
ESD(G-S)
dv/dt
Gate source ESD(HBM-C = 100 pF,
R = 1.5 kΩ)
(3)
Peak diode recovery voltage slope TBD V/ns
2500 V
Insulation withstand voltage (RMS) from all
V
T
1. Limited by package
2. Pulse width limited by safe operating area
3. ISD ≤ 6.3 A, di/dt = TBD, VDD = 80% V
Table 3. Thermal data
three leads to external heat sink
ISO
(t = 1 s; T
Storage temperature -55 to 150 °C
stg
Max. operating junction temperature 150 °C
T
j
C = 25 °C)
(BR)DSS.
-- 2500 V
Symbol Parameter TO-220 DPAK D²PAK TO-220FP Unit
R
thj-case
R
thj-pcb
R
thj-amb
Table 4. Avalanche characteristics
Thermal resistance junction-case max 1.39 5 °C/W
Thermal resistance junction-pcb max -- 50 30 -- °C/W
Thermal resistance junction-ambient max 62.5 -- -- 62.5 °C/W
Maximum lead temperature for soldering
T
l
purpose
300 °C
A
A
A
Symbol Parameter Max value Unit
I
E
Avalanche current, repetitive or not-repetitive
AR
(pulse width limited by Tj max)
Single pulse avalanche energy
AS
(starting Tj = 25°C, ID = IAR, VDD = 50V)
6.3 A
TBD mJ
3/15
Electrical characteristics STB7N52K3 - STD7N52K3 - STF7N52K3 - STP7N52K3
2 Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
(BR)DSS
I
DSS
I
GSS
V
GS(th)
R
DS(on
Drain-source
breakdown voltage
Zero gate voltage
drain current (V
GS
Gate-body leakage
current (V
DS
= 0)
= 0)
= 1 mA, VGS = 0 525 V
I
D
V
= Max rating
DS
= Max rating, TC=125 °C
V
DS
1
50µAµA
VGS = ± 20 V ± 10 µA
Gate threshold voltage VDS = VGS, ID = 50 µA 3 3.75 4.5 V
Static drain-source on
resistance
V
= 10 V, ID = 3.1 A 0.84 0.98 Ω
GS
Table 6. Dynamic
Symbol Parameter Test conditions Min. Typ. Max. Unit
g
C
C
OSS eq
fs
C
C
R
Forward
(1)
transconductance
Input capacitance
iss
Output capacitance
oss
Reverse transfer
rss
capacitance
Equivalent output
(1)
capacitance
Intrinsic gate
G
resistance
VDS = 15 V, ID = 3.1 A TBD S
TBD
= 50 V, f = 1 MHz, VGS = 0
V
DS
TBD
TBD
= 0, VDS = 0 to 420 V TBD pF
V
GS
f = 1 MHz open drain TBD Ω
pF
pF
pF
Q
Q
Q
1. C
oss eq
increases from 0 to 80% V
Total gate charge
g
Gate-source charge
gs
Gate-drain charge
gd
. is defined as a constant equivalent capacitance giving the same charging time as C
DSS
VDD = 420 V, ID = 6.3 A,
VGS = 10 V
(see Figure 3)
Table 7. Switching times
Symbol Parameter Test conditions Min. Typ. Max Unit
t
d(on)
t
d(off)
4/15
Turn-on delay time
t
Rise time
r
Turn-off-delay time
t
Fall time
f
= 262 V, ID = 3.1 A,
V
DD
= 4.7 Ω, V
R
G
(see Figure 2)
GS
= 10 V
TBD
TBD
TBD
TBD
TBD
TBD
TBD
when VDS
oss
nC
nC
nC
ns
ns
ns
ns
STB7N52K3 - STD7N52K3 - STF7N52K3 - STP7N52K3 Electrical characteristics
Table 8. Source drain diode
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
I
SDM
V
SD
Q
I
RRM
Q
I
RRM
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Source-drain current
SD
(1)
Source-drain current (pulsed)
(2)
Forward on voltage ISD = 6.3 A, VGS = 0 1.6 V
Reverse recovery time
t
rr
Reverse recovery charge
rr
Reverse recovery current
Reverse recovery time
t
rr
Reverse recovery charge
rr
Reverse recovery current
= 6.3 A, di/dt = 100 A/µs
I
SD
VDD = 30 V (see Figure 7)
ISD = 6.3 A, di/dt = 100 A/µs
= 30 V, Tj = 150 °C
V
DD
(see Figure 7)
TBD
TBD
TBD
TBD
TBD
TBD
6.325A
Table 9. Gate-source Zener diode
Symbol Parameter Test conditions Min Typ Max Unit
Gate-source breakdown
(1)
BV
GSO
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components
voltage
Igs=± 1 mA (open drain) 30 V
A
ns
nC
A
ns
nC
A
5/15
Loading...