ST STB60NF10, STP60NF10 User Manual
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3
3
N-CHANNEL 100V - 0.019 Ω - 80A D² PAK/TO-220
TYPE
STB60NF10
STP60NF10
■ TYPICAL R
■ EXTREMELY HIGHL dv/dt CAPABILITY
■ 100% AVALANCHE TESTED
■ SURFACE-MOUNTING D²PAK (TO-263)
V
DSS
100 V
100 V
(on) = 0.019 Ω
DS
POWER PACKAGE IN TAPE & REEL
(SUFFIX “T4")
DESCRIPTION
This MOSFET series realized with STMicroelectronics unique STripFET™ process has specifically been designed to minimize input capacitance
and gate charge. It is therefore suitable as primary
switch in advanced high-efficiency, high-frequency
isolated DC-DC converters for Telecom and Computer applications. It is also intended for any applications with low gate drive requirements.
R
DS(on)
< 0.023 Ω
< 0.023 Ω
I
D
80 A
80 A
STB60NF10
STP60NF10
STripFET™ II POWER MOSFET
Figure 1:PackageTable 1: General Features
1
D2PAK
TO-263
(Suffix “T4”)
TO-220
Figure 2: Internal Schematic Diagram
2
APPLICATIONS
■ HIGH EFFICIENCY DC/DC CONVERTERS,
INDUSTRIAL, AND LIGHTING EQUIPMENT.
■ MOTOR CONTROL
Table 2: Ordering Information
STB60NF10T4
STP60NF10
SALES TYPE MARKING PACKAGE PACKAGING
B60NF10
P60NF10
TO-263
TO-220
TAPE & REEL
TUBE
Table 3:ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
V
DGR
V
GS
I
(*) Drain Current (conti nuo us ) at TC = 25°C
D
I
D
I
(•)
DM
P
tot
dv/dt
E
AS
T
stg
(•) Pulse width limited by safe operating area.
(**) Current Limited by Package
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
100 V
100 V
Gate- source Voltage ± 20 V
80 A
Drain Current (conti nuo us ) at TC = 100°C
66 A
Drain Current (pulse d) 320 A
Total Dissipation at TC = 25°C
300 W
Derating Factor 2 W/°C
(1)
Peak Diode Recove ry vo ltag e slo pe 16 V/ns
(2)
Single Pulse Avalanche Energy 485 mJ
Storage Temperature -55 to 175 °C
(1) ISD ≤80A, di/dt ≤300A/µs, VDD ≤ V
(2) Starting Tj = 25 oC, ID = 40A, VDD = 30V
(BR)DSS
, Tj ≤ T
JMAX
Rev. 2.0
1/10May 2005
STB60NF10 STP60NF10
Table 4: THERMAL DATA
Rthj-case
Rthj-amb
T
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
l
Max
Max
0.5
62.5
300
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
Table 5: OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
V
(BR)DSS
Drain-source
= 250 µA, VGS = 0
D
100 V
Breakdown Voltage
V
I
DSS
I
GSS
Table 6: ON
Zero Gate Voltage
Drain Current (V
Gate-body Leakage
Current (V
(*)
DS
= 0)
GS
= 0)
= Max Rating
DS
= Max Rating TC = 125°C
V
DS
= ± 20 V
V
GS
1
10
±100 nA
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
V
= VGS ID = 250 µA
DS
V
= 10 V ID = 40 A
GS
234V
0.019 0.023 Ω
Resistance
Table 7: DYNAMIC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
25 V ID=40 A
DS =
V
= 25V f = 1 MHz VGS = 0
DS
78 S
4270
470
140
µA
µA
pF
pF
pF
2/10
STB60NF10 STP60NF10
ELECTRICAL CHARACTERISTICS (continued)
Table 8: SWITCHING ON
Symbol Parameter Test Conditions Min. Typ. Max. Unit
V
t
d(on)
Q
Q
Q
t
r
g
gs
gd
Turn-on Delay Time
Rise Time
Total Gate Charge
Gate-Source Charg e
Gate-Drain Charge
Table 9: SWITCHING OFF
Symbol Parameter Test Conditions Min. Typ. Max. Unit
t
d(off)
t
f
Turn-off Delay Time
Fall Time
Table 10: SOURCE DRAIN DIODE
Symbol Parameter Test Conditions Min. Typ. Max. Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(
•)Pulse width limited by safe operating area.
Source-drain Curre nt
)
Source-drain Curre nt (pu lse d)
(•
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
= 50 V ID = 40 A
DD
=4.7 Ω VGS = 10 V
R
G
(Resistive Load, Figu re )
V
= 50V ID= 80A VGS= 10V
DD
V
= 50 V ID = 40 A
DD
=4.7Ω, V
R
G
GS
= 10 V
(Resistive Load, Figu re 3)
I
= 80 A VGS = 0
SD
I
= 80 A di/dt = 100A/µs
SD
= 50 V Tj = 150°C
V
DD
(see test circuit, Figure 5)
17
56
104
20
32
82
23
80
320
1.3 V
92
340
7.4
ns
ns
nC
nC
nC
ns
ns
A
A
ns
µC
A
Figure 3: Safe Operating Area
Figure 4: Thermal Impedance
3/10
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