ST STB25NM60N-1, STF25NM60N, STP25NM60N, STW25NM60N, STB25NM60N User Manual

STB25NM60N

STP25NM60N - STF25NM60N STB25NM60N/-1 - STW25NM60N

N-CHANNEL 600V 0.140Ω -20A TO-220/FP/D²/I²PAK/TO-247 SECOND GENERATION MDmesh™ MOSFET

PRODUCT PREVIEW

Table 1: General Features

TYPE	VDSS	RDS(on)	ID
	(@Tjmax)
STB25NM60N-1	650 V	< 0.170 Ω	20 A
STF25NM60N	650 V	< 0.170 Ω	20(*) A
STP25NM60N	650 V	< 0.170 Ω	20 A
STW25NM60N	650 V	< 0.170 Ω	20 A
STB25NM60N	650 V	< 0.170 Ω	20 A

■WORLD’S LOWEST ON RESISTANCE

■TYPICAL RDS(on) = 0.140 Ω

■HIGH dv/dt AND AVALANCHE CAPABILITIES

■100% AVALANCHE TESTED

■LOW INPUT CAPACITANCE AND GATE CHARGE

■LOW GATE INPUT RESISTANCE

DESCRIPTION

Figure 1: Package

3

3	2
2	1

1
TO-220	TO-220FP

3

1

D²PAK

1 2 3

3

I²PAK	2
	1

TO-247

Figure 2: Internal Schematic Diagram

The STP25NM60N is realized with the second generation of MDmesh Technology. This revolutionary MOSFET associates a new vertical structure to the Company's strip layout to yield the world's lowest on-resistance and gate charge. It is therefore suitable for the most demanding high efficiency converters

APPLICATIONS

The MDmesh™ II family is very suitable for increase the power density of high voltage converters allowing system miniaturization and higher efficiencies.

Table 2: Order Code

	SALES TYPE	MARKING	PACKAGE	PACKAGING
	STB25NM60N-1	B25NM60N	I²PAK	TUBE
	STF25NM60N	F25NM60N	TO-220FP	TUBE
	STP25NM60N	P25NM60N	TO-220	TUBE
	STW25NM60N	W25NM60N	TO-247	TUBE
	STB25NM60N	B25NM60N	D²PAK	TAPE & REEL
				Rev. 4
June 2005				1/12

This is preliminary information on a new product now in development. Details are subject to change without notice.

STP25NM60N - STF25NM60N - STB25NM60N/-1 - STW25NM60N

Table 3: Absolute Maximum ratings

Symbol

Parameter

Value

Unit

TO-220/I²PAK

TO-220FP

TO-247/D²PAK

VDS

Drain-source Voltage (VGS = 0)

600

V

VDGR

Drain-gate Voltage (RGS = 20 kΩ )

600

V

VGS

Gatesource Voltage

± 25

V

ID

Drain Current (continuous) at TC = 25°C

20

20 (*)

A

ID

Drain Current (continuous) at TC = 100°C

12.8

12.8 (*)

A

IDM (1)

Drain Current (pulsed)

80

80 (*)

A

PTOT

Total Dissipation at TC = 25°C

160

40

W

Derating Factor

1.28

0.32

W/°C

dv/dt (2)

Peak Diode Recovery voltage slope

TBD

V/ns

Tstg

Storage Temperature

– 55 to 150

°C

Tj

Max. Operating Junction Temperature

150

°C

(*) Limited only by maximum temperature allowed

(1) Pulse width limited by safe operating area

(2) ISD ≤ 20 A, di/dt ≤ 400 A/µs, VDD =80% V(BR)DSS.

Table 4: Thermal Data

TO-220/I²PAK

TO-220FP

TO-247/D²PAK

Rthj-case

Thermal Resistance Junction-case Max

0.78

3.1

°C/W

Rthj-amb

Thermal Resistance Junction-ambient Max

62.5

°C/W

Tl

Maximum Lead Temperature For Soldering Purpose

300

°C

Table 5: Avalanche Characteristics

Symbol

Parameter

Max Value

Unit

IAS

Avalanche Current, Repetitive or Not-Repetitive

TBD

A

(pulse width limited by Tj max)

EAS

Single Pulse Avalanche Energy

TBD

mJ

(starting Tj = 25 °C, ID = IAS, VDD = 50 V)

ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)

Table 6: On /Off

Symbol

Parameter

Test Conditions

Value

Unit

Min.

Typ.

Max.

V(BR)DSS

Drain-source Breakdown

ID = 1 mA, VGS = 0

600

V

Voltage

dv/dt(2)

Drain Source Voltage

Vdd=TBD, Id=TBD, Vgs=TBD

TBD

V/ns

Slope

IDSS

Zero Gate Voltage

VDS = Max Rating

1

µA

Drain Current (VGS = 0)

VDS = Max Rating, TC = 125°C

10

µA

IGSS

Gate-body Leakage

VGS = ± 20 V

100

nA

Current (VDS = 0)

VGS(th)

Gate Threshold Voltage

VDS = VGS, ID = 250 µA

2

3

4

V

RDS(on

Static Drain-source On

VGS = 10 V, ID = 10 A

0.140

0.170

Ω

Resistance

(2) Characteristic value at turn off on inductive load

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STP25NM60N - STF25NM60N - STB25NM60N/-1 - STW25NM60N

ELECTRICAL CHARACTERISTICS (CONTINUED)

Table 7: Dynamic

Symbol	Parameter	Test Conditions	Min.	Typ.	Max.	Unit
gfs (1)	Forward Transconductance	VDS = 15V , ID= 10A		17		S
Ciss	Input Capacitance	VDS = 25 V, f = 1 MHz,		2565		pF
Coss	Output Capacitance	VGS = 0		511		pF
Crss	Reverse Transfer			77		pF
	Capacitance
COSS eq (3).	Equivalent Output	VGS = 0 V, VDS = 0 to 480 V		TBD		pF
	Capacitance
RG	Gate Input Resistance	f=1 MHz Gate DC Bias = 0		2		Ω
		Test Signal Level = 20mV
		Open Drain
td(on)	Turn-on Delay Time	VDD = 300 V, ID = 10 A,		TBD		ns
tr	Rise Time	RG = 4.7 Ω, VGS = 10 V		TBD		ns
td(off)	Turn-off-Delay Time	(see Figure 4)		TBD		ns
tf	Fall Time			TBD		ns
Qg	Total Gate Charge	VDD = 480 V, ID = 20 A,		93		nC
Qgs	Gate-Source Charge	VGS = 10 V		TBD		nC
Qgd	Gate-Drain Charge	(see Figure 7)		TBD		nC

Table 8: Source Drain Diode

Symbol	Parameter	Test Conditions		Min.	Typ.	Max.	Unit
ISD	Source-drain Current					20	A
ISDM (2)	Source-drain Current (pulsed)					80	A
VSD (1)	Forward On Voltage	ISD = 20	A, VGS = 0			1.3	V
trr	Reverse Recovery Time	ISD = 25	A, di/dt = 100 A/µs		TBD		ns
Qrr	Reverse Recovery Charge	VDD = 100V			TBD		µC
IRRM	Reverse Recovery Current	(see Figure 5)			TBD		A
trr	Reverse Recovery Time	ISD = 25	A, di/dt = 100 A/µs		TBD		ns
Qrr	Reverse Recovery Charge	VDD = 100V, Tj = 150°C			TBD		µC
IRRM	Reverse Recovery Current	(see Figure 5)			TBD		A

(1)Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.

(2)Pulse width limited by safe operating area.

(3)Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS.

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STP25NM60N - STF25NM60N - STB25NM60N/-1 - STW25NM60N

Figure 3: Unclamped Inductive Load Test Circuit

Figure 4: Switching Times Test Circuit For Resistive Load

Figure 6: Unclamped Inductive Wafeform

Figure 7: Gate Charge Test Circuit

Figure 5: Test Circuit For Inductive Load Switching and Diode Recovery Times

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