ST STA508 User Manual
STA508
Fi
40V 4.5A QUAD POWER HALF BRIDGE
1FEATURES
■ MULTIPOWER BCD TECHNOLOGY
■ MINIMUM INPUT OUTPUT PULSE WIDTH
DISTORTION
■ 200mΩ R
COMPLEMENTARY DMOS
dsON
OUTPUT STAGE
■ CMOS COMPATIBLE LOGIC INPUTS
■ THERMAL PROTECTION
■ THERMAL WARNING OUTPUT
■ UNDER VOLTAGE PROTECTION
2 DESCRIPTION
STA508 is a monolithic quad half bridge stage in Multipower BCD Technology. The device can be used as
dual bridge or reconfigured, by connecting CONFIG
pin to Vdd pin, as single bridge with double current
capability, and as half bridge (Binary mode) with half
current capability.
Figure 2. Block Diagram
+3.3V
TH_WAR
C58
100nF
IN1A
R57
R59
10K
10K
C58
100nF
IN1B
C53
100nF
C60
100nF
IN2A
IN2B
CONFIG
PWRDNPWRDN
FAULT
TRI-STATE
TH_WAR
IN1B
VCCSIGN
V
SIGN
CC
IN2A
GND-Reg
GND-Clean
IN2B
GNDSUB
23
V
L
24
25
PROTECTIONS
27
&
LOGIC
26
28
30
21
V
DD
V
22
DD
33
V
REGULATORS
SS
34
V
SS
35
36
31
20
19
32
1
29
IN1A
M3
M2
M5
M4
M17
M15
M16
M14
gure 1. Package
PowerSO36
Table 1. Order Codes
Part Number Package
STA508 PowerSO36
The device is particularly designed to make the output stage of a stereo All-Digital High Efficiency
(DDX™) amplifier capable to deliver 80 + 80W @
THD = 10% at V
35V output power on 8Ω load.
cc
In single BTL configuration is also capable to deliver
a peak of 160W @THD = 10% at V
= 35V on 4
CC
load. The input pins have threshold proportional to V
pin voltage.
V
1A
CC
15
C30
1µF
17
OUT1A
16
OUT1A
GND1A
14
1B
12
V
CC
OUT1B
OUT1B
GND1B
V
CC
OUT2A
OUT2A
GND2A
V
CC
OUT2B
OUT2B
GND2B
C31
1µF
2A
C32
1µF
2B
C33
1µF
11
10
13
7
8
9
6
4
3
2
5
L18 22µH
C52
330pF
R63
20
L19 22µH
L113 22µH
C109
330pF
R104
20
L112 22µH
D00AU1148B
C20
100nF
R98
R100
C21
100nF
C110
100nF
R103
R102
C111
100nF
C99
100nF
6
6
6
6
C101
100nF
C107
100nF
C106
100nF
C23
470nF
C108
470nF
+V
CC
C55
1000µF
8Ω
8Ω
Ω
L
February 2006
Rev. 4
1/10
STA508
Table 2. Pin Description
N° Pin Description
1 GND-SUB Substrate Ground
2 ; 3 OUT2B Output Half Bridge 2B
4V
2B Positive Supply
CC
5 GND2B Negative Supply
6 GND2A Negative Supply
7V
2A Positive Supply
CC
8 ; 9 OUT2A Output Half Bridge 2A
10 ; 11 OUT1B Output Half Bridge 1B
12 V
1B Positive Supply
CC
13 GND1B Negative Supply
14 GND1A Negative Supply
15 V
1A Positive Supply
CC
16 ; 17 OUT1A Output Half Bridge 1A
18 NC Not Connected
19 GND-clean Logical Ground
20 GND-Reg Ground for Regulator V
21 ; 22 V
23 V
dd
L
5V Regulator Referred to Ground
High Logical State Setting Voltage
dd
24 CONFIG Configuration pin
25 PWRDN Stand-by pin
26 TRI-STATE Hi-Z pin
27 FAULT Fault pin Advisor
28 TH-WAR Thermal Warning Advisor
29 IN1A Input of Half Bridge 1A
30 IN1B Input of Half Bridge 1B
31 IN2A Input of Half Bridge 2A
32 IN2B Input of Half Bridge 2B
33 ; 34 V
SS
5V Regulator Referred to +V
35 ; 36 VCC Sign Signal Positive Supply
2/10
CC
Table 3. FUNCTIONAL PIN STATUS
PIN NAME Logical value IC -STATUS
FAULT 0 Fault detected (Short circuit, or Thermal ..)
FAULT
(*)
1 Normal Operation
TRI-STATE 0 All powers in Hi-Z state
TRI-STATE 1 Normal operation
PWRDN 0 Low absorpion
PWRDN 1 Normal operation
THWAR 0 Temperature of the IC =130°C
THWAR
(*)
1 Normal operation
CONFIG 0 Normal Operation
CONFIG
(**)
(*) : The pin is open collector. To have the high logic value, it needs to be pulled up by a resistor.
(**): To put CONFIG = 1 means connect Pin 24 (CONFIG) to Pins 21, 22 (Vdd)
1 OUT1A = OUT1B ; OUT2A=OUT2B
(IF IN1A = IN1B; IN2A = IN2B)
Figure 3. PIN CONNECTION
STA508
TRI-STATE
Table 4. THERMAL DATA
V
Sign
CC
VCCSign
V
V
IN2B
IN1B
IN1A
FAULT
PWRDN
CONFIG
V
V
DD
V
DD
36
35
SS
SS
L
34
33
32
31
30
29
28
26
25
23
22
21
20
19
D01AU1273
1
2
3
4
5
6
7
8
9
1027
11
12
1324
14
15
16
17
18
GND-SUB
OUT2B
OUT2B
2B
V
CC
GND2B
GND2AIN2A
V
2A
CC
OUT2A
OUT2ATH_WAR
OUT1B
OUT1B
V
1B
CC
GND1B
GND1A
V
1A
CC
OUT1A
OUT1AGND-Reg
N.C.GND-Clean
Symbol Description Value Unit
R
th j-case
Thermal Resistance Junction-case max 1.5 °C/W
3/10
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