DiSEqC-ST data receive input and DiSEqC- 1.0 with 13 to 18V
transition (if a DiSEqC- command is sent before on DRX1)
(4)
2
C data line 4 / legacy matrix control line 4
(5)
I2C clock line 4 / legacy matrix control line 3
2
C data line 3 / legacy matrix control line 2
2
C clock line 3 / legacy matrix control line 1
2
C data line 2
2
C clock line 2
2
C data line 1
2
C clock line 1
SCL1
16
15
SDA1
SCL2
14
13
SDA2
12
SCL3 / MAT1
11
SDA3 / MAT2
10
SCL4 / MAT3
9
SDA4 / MAT4
Function description
(3)
1.0 data receive input
1. If only one input is required by the application, DRX1 must be used by default.
2. DiSEqC-ST: special DiSEqC command set for SaTCRs control (refer to Section 3.2 for more details).
3. DiSEqC 1.0: refer to Section 3.3.
4. Unused pins must be tied to ground.
5. During normal operation this pin must not be pulled-down.
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ST7LNB1Y0Implementation
2 Implementation
2.1 SaTCRs mapping
The ST7LNB1Y0 could communicate through I2C with up to 8 SaTCRs (refer to Table 3).
The following hardware implementation of SaTCRs must be respected:
Table 3.SaTCRs implementation
SaTCR
number
0SaTCR
1SaTCR
2SaTCR
3SaTCR
4SaTCR
5SaTCR
6SaTCR
7
1. As a convention, SaTCR1 must be associated to the BPF having the lowest center frequency of the
application, SaTCR2 to the BPF having the next higher center frequency and so on.
SaTCR
/ legacy SaTCR (for wide RF band
8
applications)
SaTCR
(1)
SaTCR addressI²C line
1
2
3
4
5
6
7
C8h
CAh
C8h
CAh
C8h
CAh
C8h
CAh
I2C 1
2
C 2
I
2
C 3
I
2
I
C 4
7/36
ImplementationST7LNB1Y0
2.2 Application example
Figure 3 and Figure 4 show example application circuits for the ST7LNB1Y0 with and
without legacy signal.
Figure 3.ST7LNB1Y0 in the Twin SaTCR and legacy (standard RF band) application
180 F
0.01µF
180 pF
OPTIONAL
220
BC547
33
100 nF
(6)
V
CC
ST7LNB1Y0
VSS
VDD
RESET
DTX
DRX1
DRX2
NC
NC
SCL1
SDA1
SCL2
SDA2
SCL3
SDA3
SCL4
SDA4
V
(5)
CC
SaTCR
12 K12 K12 K12 K
Legacy
matrix control
SaTCR
1
2
Legacy or RTA-STB input
RTA-STB input
(3)
100 nF
330 K
100 K
100 nF
330 K
100 K
1. The divider chain connected to the DRX1 and DRX2 pins must have the following resistance values: 330KΩ and 100 KΩ.
2
2. Unused I
C lines (14,13) have to be linked to VCC through 12 KΩ resistors.
4. The transistor is optional, it is used for EEPROM parameters bytes reading using DiSEqC.
5. During normal operation this pin must not be pulled-down.
6. When the LVD is enabled (default state), it is mandatory not to connect a pull-up resistor. A 10 nF pull-down capacitor is
recommended to filter noise on the reset line.
8/36
ST7LNB1Y0Implementation
Figure 4.ST7LNB1Y0 in the Twin SaTCR application with one input only
180 pF
OPTIONAL
220
BC547
33
(7)
100 nF
V
CC
ST7LNB1Y0
NC
VSS
VDD
RESET
DTX
DRX1
DRX2
NC
NC
SCL1
SDA1
SCL2
SDA2
SCL3
SDA3
SCL4
SDA4
V
CC
SaTCR
12 K12 K12 K12 K
SaTCR
1
2
NC
NC
(6)
NC
NC
RTA-STB input
(4)
100 nF
330 K
100 K
0.01µF
1. NC = Not Connected.
2. The divider chain connected to the DRX1 pins must have the following resistance values: 330 KΩ and 100 KΩ.
2
3. Unused I
C lines (SCL2,SDA2) have to be linked to VCC through 12 KΩ resistors.
4. RTA-STB: Remote Tuning Able Set Top Box (STB supporting SaTCR control).
5. The transistor is optional, it is used for EEPROM parameters bytes reading using DiSEqC.
6. During normal operation this pin must not be pulled-down.
7. When the LVD is enabled (default state), it is mandatory not to connect a pull-up resistor. A 10 nF pull-down capacitor is
recommended to filter noise on the reset line.
9/36
Functional descriptionST7LNB1Y0
3 Functional description
3.1 ST7LNB1Y0 applications
The ST7LNB1Y0 is intended to be used in different LNB switcher applications supporting
SaTCRs.
Three main types of applications could be distinguished (see Table 4).
Table 4.Application types
NumApplication typeDescription
(1)
0SaTCR control
SaTCR and legacy (standard RF band)
1
2
1. This application could support up to 8 RF feeds. (applications 1 and 2 are limited to 4 RF feeds).
SaTCR and legacy (wide RF band)
(see Figure 6)
(see Figure 7)
(see Figure 5)
– Control through I2C of up to 8 SaTCRs
2
– The ST7LNB1Y0 controls through I
C up to 4
SaTCRs
– Control of a legacy matrix using up to 4 pins
– Control though I
2
C of up to 6 SaTCRs + legacy
– Control of a dedicated SaTCR for the legacy
support
An EEPROM parameter will be used for configuring the ST7LNB1Y0 for a particular
application type (refer to Section 4 for more details on how to program the EEPROM
parameter).
Figure 5.SaTCR control block diagram
SaTCR
1
Matrix
SaTCR
SaTCR
x
8
ST7LNB1Y0
DRX2
DiSEqC-ST
DRX1
DiSEqC-ST
Figure 6.SaTCR control and legacy (standard RF band)
SaTCR
1
ST7LNB1Y0
DRX2
DiSEqC-ST
DRX1
DiSEqC 1.0
Matrix
SaTCR
4
MAT[1 to 4]
10/36
ST7LNB1Y0Functional description
Figure 7.SaTCR control and legacy (wide RF band)
SaTCR
1
Matrix
SaTCR
6
Legacy SaTCR
ST7LNB1Y0
DRX2
DiSEqC-ST
DRX1
DiSEqC 1.0
3.2 DiSEqC-ST commands
To control SaTCR based LNBs and switchers, two new DiSEqC commands are used:
●ODU_SatCR_Op (5Ah): this command is used during LNB or switcher normal
operation.
●ODU_SatCR_Inst (5Bh): this command is used only during the LNB or switcher
installation.
Both commands frames must have the following DiSEqC format:
Table 5.DiSEqC-ST command format
E0h / E2h
1. All commands accept E0h or E2h framing. Whatever the command, if E2h framing is used, then the MCU sends at least
the response E4h (refer to Section 4.2).
(1)
DiSEqC
Slave address
5Ah /5BhDATA1DATA2
Different subcommands are defined, depending on the data bytes which are sent (refer to
Table 6 and Table 7).
Table 6.ODU_SaTCR_Op (5Ah)
Sub-command
ODU_ChangeChannelSaTCR
ODU_PowerOffSaTCR000h
1. SaTCR: SaTCR number [0 to 7] (refer to Table 3).
2. Feed: matrix RF input [0 to 7] (refer to Table 9).
3. Tun[9:0]: tuning word.
DAT A1
765 4:210
(1)
Feed
(2)
Tun[9]
(3)
Tun[8]Tun[7:0]
DATA2Command Description
This command is used for the
channel selection.
This command is used to put a
SaTCR in low power mode.
11/36
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