ST ST7066 User Manual
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ST
Sitronix
Features
!" 5 x 8 and 5 x 10 dot matrix possible
!" Low power operation support:
-- 2.7 to 5.5V
!" Wide range of LCD driver power
-- 3.0 to 11V
!" Correspond to high speed MPU bus interface
-- 2 MHz (when V
!" 4-bit or 8-bit MPU interface enabled
!" 80 x 8-bit display RAM (80 characters max.)
!" 9,920-bit character generator ROM for a total of
-- 208 character fonts (5 x 8 dot)
-- 32 character fonts (5 x 10 dot)
!" 64 x 8-bit character generator RAM
-- 8 character fonts (5 x 8 dot)
-- 4 character fonts (5 x 10 dot)
CC
240 character fonts
= 5V)
Dot Matrix LCD Controller/Driver
Description
The ST7066 dot-matrix liquid crystal display
controller and driver LSI displays alphanumeric,
Japanese kana characters, and symbols. It can be
configured to drive a dot-m atrix liquid crystal display
under the control of a 4- or 8-bit microprocessor.
Since all the functions such as display RAM,
character generator, and liquid crystal driver, required
for driving a dot-matrix liquid crystal display are
internally provided on one chip, a minimal system can
be interfaced with this controller/driver.
The ST7066 has pin function compatibility with the
HD44780, KS0066U and SED1278 that allows the
user to easily replace it with an ST7066. The ST7066
character generator ROM is extended to generate
Product Name Support Character
ST7066
!" 16-common x 40-segment liquid crystal display
driver
!" Programmable duty cycles
-- 1/8 for one line of 5 x 8 dots with cursor
-- 1/11 for one line of 5 x 10 dots & cursor
-- 1/16 for two lines of 5 x 8 dots & cursor
!" Wide range of instruction functions:
Display clear, cursor home, display on/off,
cursor on/off, display character blink, cursor
shift, display shift
!" Pin function compatibility with HD44780,
KS0066 and SED1278
!" Automatic reset circuit that initializes the
controller/driver after power on
!" Internal oscillator with external resistors
!" Low power consumption
!" QFP80 and Bare Chip available
208 5 x 8 dot character fonts and 32 5 x 10 dot
character fonts for a total of 240 different character
fonts. The low power supply (2.7V to 5.5V) of the
ST7066 is suitable for any portable battery-driven
product requiring low power dissipation.
The ST7066 LCD driver consists of 16 common
signal drivers and 40 segment signal drivers which
can extend display size by cascading segment driver
ST7065 or ST7063. The m aximum display size can
be either 80 characters in 1-line display or 40
characters in 2-line display. A single ST7066 can
display up to one 8-character line or two 8-character
lines.
ST7066-0A
ST7066-0B English / European
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English / Japan
ST7066
Block Diagram
RS
RW
E
DB4 to
DB7
DB0 to
DB3
MPU
Interface
Input/
Output
Buffer
Reset
Circuit
OSC1
Instruction
Register (IR)
Instruction
Decoder
Address
Counter
Data
Register
(DR)
Busy
Flag
CPG
OSC2
Display
data RAM
(DDRAM)
80x8 bits
Timing
Generator
40-bit
shift
registe
16-bit
shift
registe
40-bit
latch
circuit
Common
Segment
CL1
CL2
Signal
Driver
Signal
Driver
LCD Drive
Voltage
Selector
M
D
COM1 to
COM16
SEG1 to
SEG40
GND
Vcc
Character
generator
RAM
(CGRAM)
64 bits
Character
generator
ROM
(CGROM)
9,920 bits
Parallel/Serial convert er
V1 V2 V3 V4 V5
and
Attribute Circuit
Cursor
and
Blink
controller
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ST7066
Pad Arrangement
1
80
64
ST7066
"ST7066" Marking : easy to find the PAD
(0,0)
Chip Size : 2300x3000
Coordinate : Pad Center
Origin : Chip Center
Pad Size : 90x90
Unit : um
24
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ST7066
Pad Location Coordinates
Pad No.
Pad No. Function
Pad No.Pad No.
Function X
FunctionFunction
Y
XXX
YYY
Pad No.
Pad No. Function
Pad No.Pad No.
Function X
FunctionFunction
Y
XXX
YYY
1 SEG22 -1040 1400
2 SEG21 -1040 1270
3 SEG20 -1040 1140
4 SEG19 -1040 1020
5 SEG18 -1040 900
6 SEG17 -1040 780
7 SEG16 -1040 660
8 SEG15 -1040 540
9 SEG14 -1040 420
10 SEG13 -1040 300
11 SEG12 -1040 180
12 SEG11 -1040 60
13 SEG10 -1040 -60
14 SEG9 -1040 -180
15 SEG8 -1040 -300
16 SEG7 -1040 -420
17 SEG6 -1040 -540
18 SEG5 -1040 -660
19 SEG4 -1040 -780
20 SEG3 -1040 -900
21 SEG2 -1040 -1020
22 SEG1 -1040 -1140
23 GND -1040 -1270
24 OSC1 -1040 -1400
25 OSC2 -910 -1400
26 V1 -780 -1400
27 V2 -660 -1400
28 V3 -540 -1400
29 V4 -420 -1400
30 V5 -300 -1400
31 CL1 -180 -1400
32 CL2 -60 -1400
33 Vcc 60 -1400
34 M 180 -1400
35 D 300 -1400
36 RS 420 -1400
37 RW 540 -1400
38 E 660 -1400
39 DB0 780 -1400
40 DB1 910 -1400
41 DB2 1040 -1400
42 DB3 1040 -1270
43 DB4 1040 -1140
44 DB5 1040 -1020
45 DB6 1040 -900
46 DB7 1040 -780
47 COM1 1040 -660
48 COM2 1040 -540
49 COM3 1040 -420
50 COM4 1040 -300
51 COM5 1040 -180
52 COM6 1040 -60
53 COM7 1040 60
54 COM8 1040 180
55 COM9 1040 300
56 COM10 1040 420
57 COM11 1040 540
58 COM12 1040 660
59 COM13 1040 780
60 COM14 1040 900
61 COM15 1040 1020
62 COM16 1040 1140
63 SEG40 1040 1270
64 SEG39 1040 1400
65 SEG38 910 1400
66 SEG37 780 1400
67 SEG36 660 1400
68 SEG35 540 1400
69 SEG34 420 1400
70 SEG33 300 1400
71 SEG32 180 1400
72 SEG31 60 1400
73 SEG30 -60 1400
74 SEG29 -180 1400
75 SEG28 -300 1400
76 SEG27 -420 1400
77 SEG26 -540 1400
78 SEG25 -660 1400
79 SEG24 -780 1400
80 SEG23 -910 1400
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ST7066
Pin Functions
NAME NUMBER I/O INTERFACED WITH FUNCTION
Select registers.
RS 1 I MPU
R/W 1 I MPU
E 1 I MPU Starts data read/write.
DB4 to DB7 4 I/O MPU
DB0 to DB3 4 I/O MPU
CL1 1 O Extension driver
CL2 1 O Extension driver Clock to shift serial data D
M
1 O Extension driver
D 1 O Extension driver
COM1 to COM16 16
O
LCD
SEG1 to SEG40 40 O LCD Segment signals
V1 to V5 5 - Power supply
CC
V
, GND 2 - Power supply V
OSC1, OSC2 2
Note:
1. Vcc>=V1>=V2>=V3>=V4>=V5 must be maintained
2. Two clock options:
R=91K
(Vcc=5V)
R=75K
OSC1
Oscillation
resistor clock
OSC2
0: Instruction register (for write) Busy flag:
address counter (for read)
1: Data register (for write and read)
Select read or write.
0: Write
1: Read
Four high order bi-directional tristate data bus
pins. Used for data transfer and receive
between the MPU and the ST7066. DB7 can
be used as a busy flag.
Four low order bi-directional tristate data bus
pins. Used for data transfer and receive
between the MPU and the ST7066.
These pins are not used during 4-bit oper ation.
Clock to latch serial data D sent to the
extension driver
Switch signal for conv erting the liquid crystal
drive waveform to AC
Character pattern data corresponding to each
segment signal
Common signals that are not used are changed
to non-selection waveform. COM9 to COM16
are non-selection wav eforms at 1/8 duty factor
and COM12 to COM16 are non-selection
waveforms at 1/11 duty factor.
Power supply for LCD drive
CC
- V5 = 11 V (Max)
V
CC
: 2.7V to 5.5V, GND: 0V
When crystal oscillation is performed, a resistor
must be connected externally. When the pin
input is an external clock, it must be input to OSC1.
OSC1
OSC2
R
Clock
input
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ST7066
FUNCTION DESCRIPTION
System Interface
This chip has all two kinds of interface ty pe with MPU : 4 -bit bus and 8 -bit bus. 4-bit bus or 8-bi t bus is selected by DL
bit in the instruction register.
During read or write operation, two 8-bit registers are used. One is data register (DR), the other is instruction
register(IR).
The data register(DR) is used as temporary data storage place for being written into or read from DDRAM/CGRAM,
target RAM is selected by RA M address setti ng instruction. Each internal operation, reading from or writing into
RAM, is done automatically. So to speak, after MPU reads DR data, the data in the next DDRAM/CGRAM address is
transferred into DR automatically. Also after MPU writes data to DR, the data in DR is transferred into
DDRAM/CGRAM automatically.
The Instruction register(IR) is used only to store instruction code transferred from MPU. MPU cannot use it to read
instruction data.
To select register, use RS input pin in 4-bit/8-bit bus mode.
Table 1. Various kinds of operations according to RS and R/W bits.
RS RW Operation
L L Instruction Write operation (MPU writes Instruction code
L H Read Busy Flag(DB7) and address counter (DB0 ~ DB6)
H L Data Write operation (MPU wr ites data into DR)
H H Data Read operation (MPU reads data from DR)
Busy Flag ( B F)
When BF = "High”, it indicates that the internal operation is being processed. So du ring this time the next instruction
cannot be accepted. BF can be read, when RS = Low and R/W = High (Read Instruction Operation), through DB7
port. Before executing the next instruction, be sure that BF is not High.
Address Counter (AC)
Address Counter(AC) stores DDRAM/CGRAM address, transferred from IR.
After writing into (reading from) DDRAM/CGRAM, AC is automatically increased (decreased) by 1.
When RS = "Low" and R/W = "High", AC can be read through DB0 ~ DB6 ports.
into IR)
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ST7066
Display Data RAM (DDRAM)
Display data RAM (DDRAM) stores display data represented in 8-bit character codes. Its extended capacity is 80 x 8
bits, or 80 characters. The area in display data RAM (DDRAM) that is not used for display can be used as general
data RAM. See Fig ure 1 for th e relationsh ips betw een DDRAM ad dresses and positions on the li quid cry stal display .
DD
The DDRAM address (A
!"
1-line display (N = 0) (Figure 2)
When there are fewer than 80 display characters, the display begins at the head position. For
example, if using only the ST7066, 8 characters are displayed. See Figure 3.
When the display shift operation is performed, the DDRAM address shifts. See Figure 3.
) is set in the address counter (AC) as hexadecimal.
AC
DDRAM Address
High Order
bits
AC6 AC5 AC4 AC3 AC2 AC1 AC0
Display
Position
(Digit)
Low Order
bits
Figure 1 DDRAM Address
Figure 1 DDRAM Address
Figure 1 DDRAM AddressFigure 1 DDRAM Address
1 2 3 4 5 6
00 01 02 03 04 05
Figure 2 1
Figure 2 1----Line Display
Figure 2 1Figure 2 1
Display
Position
DDRAM
Address
For
Shift Left
1 2 3 4 5 6
00 01 02 03 04 05 06 07
01 02 03 04 05 06 07
Example: DDRAM Address 4F
1 0 0 1 1 1 1
80
………………..
Line Display
Line DisplayLine Display
79
78
4D 4E 4F
8
7
08
For
Shift Right
00 01 02 03 04 05 06
4F
Figure 3 1
Figure 3 1----Line by 8
Figure 3 1Figure 3 1
Line by 8----Character D isplay Exampl e
Line by 8Line by 8
Character Display Ex ample
Character Display Ex ampleCharacter Display Ex ample
!"
2-line display (N = 1) (Figure 4)
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ST7066
Case 1: When the number of display characters is less than 40
the first line end address and th
×
used, 8 characters
2 lines are displayed.
e second line start address are not consecutive. For
See Figure 5.
×
2 lines, the two lines are
displaye d from t he head. Note that
example, when just the ST7066 is
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ST7066
When display shift operation is performed, the DDRAM address shifts. See Figure 5.
Display
Position
DDRAM
Address
(hexadecimal)
Position
Shift Left
Shift Right
1 2 3 4 5 6
00 01 02 03 04 05
40 41 42 43 44 45
Figure 4 2
Figure 4 2----Line Display
Figure 4 2Figure 4 2
Display
DDRAM
Address
For
For
1 2 3 4 5 6
00 01 02 03 04 05 06 07
40 41 42 43 44 45 46 47
01 02 03 04 05 06 07
41 42 43 44 45 46 47
00 01 02 03 04 05 06
27
40 41 42 43 44 45 46
67
Line Display
Line DisplayLine Display
………………..
………………..
38
25 26 27
65 66 67
8
7
40
39
08
48
Figure 5 2
Figure 5 2----Line by 8
Figure 5 2Figure 5 2
Line by 8----Character D isplay Exampl e
Line by 8Line by 8
Character Display Ex ample
Character Display Ex ampleCharacter Display Ex ample
Case 2: For a 16-character × 2-line display, the ST7066 can be extended using one 40-output
extension driver. See Figure 6.
When display shift operation is performed, the DDRAM address shifts. See Figure 6.
Display
Position
DDRAM
Address
For
Shift
Left
For
Shift
Right
1 2 3 4 5 6
00 01 02 03 04 05 06 07
40 41 42 43 44 45 46 47
01 02 03 04 05 06 07
41 42 43 44 45 46 47
00 01 02 03 04 05 06
27
40 41 42 43 44 45 46
67
Figure 6 2
Figure 6 2----Line by 16
Figure 6 2Figure 6 2
Line by 16----Character Disp lay Exam ple
Line by 16Line by 16
8
9 10 11 12 13 14
7
08 09 0A 0B 0C 0D 0E 0F
48 49 4A 4B 4C 4D 4E 4F
08
09 0A 0B 0C 0D 0E 0F
48
49 4A 4B 4C 4D 4E 4F
08 09 0A 0B 0C 0D 0E
07
48 49 4A 4B 4C 4D 4E
47
Character Display Ex ample
Character Display Ex ampleCharacter Display Ex ample
16
15
10
50
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