ST ST3DV520E User Manual

Features

ST3DV520E

MUX/DEMUX for 4 differential channel LVDS and DDC

■ Low R

■ V

CC

■ Enhanced ESD protection: > 8 kV (contact) and

: 4.0 Ω typical

ON

operating range: 3.0 to 3.6 V

15 kV (HBM)

■ Channel on capacitance: 9.5 pF typical

■ Switching time speed: 9 ns

■ Near to zero propagation delay: 250 ps

■ Very low crosstalk: -45 dB at 250 MHz

■ Bit-to-bit skew: 200 ps

■ > 600 MHz -3 dB typical bandwidth (or data

frequency)

■ Support up to 4 differential LVDS channel

■ Support 2 channel for DDC

■ Independent SEL control for LVDS and DDC

channels

■ Package: QFN56

Applications

■ Audio/video switching

■ High bandwidth physical layer signals routing

QFN56

Description

The ST3DV520E is a 4 differential channel LVDS
multiplexer/demultiplexer low R
switch used to switch between multiple LVDS
sources. It is designed for very low crosstalk, low
bit-to-bit skew and low I/O capacitance, to
maintain high signal integrity.

bidirectional

ON

The differential signal from the LVDS transceiver
is multiplexed into one of two selected outputs
while the unselected switch goes to Hi-Z status.

The device integrates 2 SPDT (single pole dual
throw) switches, for DDC channel.

SEL for LVDS and DDC channel is controlled
independently.

Table 1. Device summary

Order code Package Packing

ST3DV520EQTR QFN56 Tape and reel

December 2010 Doc ID 18318 Rev 1 1/19

www.st.com

19

Contents ST3DV520E

Contents

1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

2/19 Doc ID 18318 Rev 1

ST3DV520E Pin description

1 Pin description

Figure 1. Pin connection (top through view)

SEL1

6$$

DDC1

DDC2

'.$('

'.$&%

6$$

'.$$#

'.$

NC

6$$"!

'.$

'.$

DDC1_0

DDC2_0

'.$

DDC1_1

DDC2_1

6$$

'.$

&

&

('(

'

'.$

%

%

6$$

$#$

'.$

#

'.$

"

!

"

Table 2. Pin description

Pin Symbol Name and function

2, 3, 7, 8, 11, 12, 14, 15 A, B, C, D, E, F, G, H 8-bit bus

48, 47, 43, 42, 37, 36, 32, 31 A0, B0, C0, D0, E0, F0, G0, H0 8-bit multiplexed to bus 0

46, 45, 41, 40, 35, 34, 30, 29 A1, B1, C1, D1, E1, F1, G1, H1 8-bit multiplexed to bus 1

17 SEL1 LVDS channel selection

54 SEL2 DDC channel selection

6$$

'.$

SEL2

'.$

NC

NC

6$$

'.$

!

19, 20 DDC1, DDC2 DDC switch input

22, 23, 25, 26

DDC1_0, DDC2_0, DDC1_1,

4, 10, 18, 27, 38, 50, 56 V

1, 6, 9, 13, 16, 21, 24, 28, 33,

39, 44, 49, 53, 55

5, 51, 52 NC No internal connection

Doc ID 18318 Rev 1 3/19

DDC2_1

DD

DDC switch output

Supply voltage

GND Ground

Pin description ST3DV520E

Figure 2. Input equivalent circuit

SEL

A

B

A0

B0

A1

B1

C

D

C0

D0

C1

D1

E

F

E0

F0

E1

C

F1

G

H

G0

H0

G1

H1

DDC1

DDC2

SEL2

Table 3. LVDS switch function table

SEL1 Function

L 8-bit bus to 8-bit multiplexed bus 0

H 8-bit bus to 8-bit multiplexed bus 1

Table 4. DDC switch function table

SEL2 Function

L DDC switch input connected to DDC switch output X_0

H DDC switch input connected to DDC switch output X_1

DDC1_0

DDC1_1

DDC2_0

DDC2_1

AM08682V1

4/19 Doc ID 18318 Rev 1

ST3DV520E Maximum rating

2 Maximum rating

Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.

Table 5. Absolute maximum ratings

Symbol Parameter Value Unit

V

CC

V

V

I

O

P

T

stg

T

1. If VIO x IO does not exceed the maximum limit of PD.

Supply voltage to ground -0.5 to 4.6 V

DC input output voltage -0.5 to 4.6 V

IO

DC control input voltage -0.5 to 4.6 V

IC

DC output current

Power dissipation 0.5 W

D

(1)

Storage temperature -65 to 150 °C

Lead temperature (10 sec) 300 °C

L

2.1 Recommended operating conditions

Table 6. Recommended operating conditions

Symbol Parameter

V

V

V

T

Supply voltage to ground 3 - 3.6 V

CC

DC control input voltage (SEL1, 2) 0 - V

IC

DC input/output voltage 0 - V

IO

Operating temperature -40 - 85 ° C

A

120 mA

Val ue

Min Typ Max

CC

CC

Unit

V

V

Doc ID 18318 Rev 1 5/19

Electrical characteristics ST3DV520E

3 Electrical characteristics

Table 7. DC electrical characteristics

Symbol Parameter Test condition

Voltage input high (SEL1,

2)

Voltage input low
(SEL1, 2)

Clamp diode voltage
(SEL1, 2)

Input high current
(SEL1, 2)

Input low current
(SEL1, 2)

Leakage current through
the switch common

(1)

terminals (A to H)
(DDC1 to DDC2)

High level guaranteed 2.4 - - V

Low level guaranteed -0.5 - 0.8 V

VCC = 3.6 V

= -18 mA

I

IN

VCC = 3.6 V

= V

V

IN

CC

V

= 3.6 V

CC

= GND

V

IN

= 3.6 V

V

CC

A to H = V

CC

DDC1 to DDC2 = V
A0 to H0 = 0 V
A1 to H1 = floating
DDCx_0=0V

IOFF

V

V

V

I

I

IH

IL

IK

IH

IL

(SW)

DDCx1 = floating

IOFF

(SEL1)

SEL1 pin leakage current

SEL1 = V

V

CC

SEL1, 2 = 0 to 3.6 V

= 0 V

, SEL2 = V

CC

VCC = 3.0 V

R

ON

Switch ON resistance

(2)

= 1.5 to V

V

IN

IIN = -40 mA

VCC = 3.0 V

R

ΔR

FLAT

ON

ON resistance flatness

(3)

ON resistance match
between channel

ΔR

= R

ON

(2)(4)

ONMAX-RONMIN

(2)

at 1.5 and VCC

V

IN

= -40 mA

I

IN

VCC = 3.0 V
VIN = 1.5 to V
IIN = -40 mA

CC

CC

CC

CC

Val ue

Min Typ Max

- -0.8 -1.2 V

--±5µA

--±5µA

--±1µA

--±1

-4.06.5Ω

-0.5-Ω

-0.41Ω

Unit-40 to 85 °C

µA

1. Refer to Figure 4: Test circuit for leakage current (IOFF) on page 9

2. Measured by voltage drop between channels at indicated current through the switch. ON resistance is determined by the
lower of the voltages.

3. Flatness is defined as the difference between the R

ΔR

4.

measured at same VCC, temperature and voltage level.

ON

ONMAX

and R

of ON resistance over the specified range.

ONMIN

6/19 Doc ID 18318 Rev 1

ST3DV520E Electrical characteristics

Table 8. Capacitance (TA = 25 °C, f = 1 MHz)

Val ue

Symbol Parameter Test condition

Min Typ Max

Unit

C

C

C

1. Refer to Figure 5 on page 10

2. Refer to Figure 6 on page 10

3. Refer to Figure 7 on page 11

SEL1, 2 pin input

IN

capacitance

Switch off

OFF

capacitance

Switch on

ON

capacitance

(1)

(2)

(3)

DC = 0.25 V
AC = 0.5 V
f=1MHz

DC = 0.25 V
AC = 0.5 V
f=1MHz

DC = 0.25 V
AC = 0.5 V
f=1MHz

PP

PP

PP

Table 9. Power supply characteristics

Symbol Parameter Test condition

I

Active mode power

CC

supply current

VCC = 3.6 V, VIN = VCC or
GND

-23pF

-45pF

- 9.5 11 pF

Val ue

Unit-40 to 85 °C

Min Typ Max

- 150 500

µA

Table 10. Dynamic electrical characteristics (V

Symbol Parameter Test condition

(3)

RL= 100 Ω
f = 250 MHz

RL= 100 Ω
f = 250 MHz

RL= 100 Ω

< V

≤ 3.6 V

0

IN

X

O

talk

IRR

Crosstalk

Off isolation

(1)

(2)

BW -3 dB bandwidth

1. Refer to Figure 9 on page 12

2. Refer to Figure 10 on page 13

3. Refer to Figure 8 on page 11

= 3.3 V ±10%)

CC

Val ue

Min Typ Max

--45-dB

--37-dB

- 600 - MHz

Unit-40 to 85 °C

Doc ID 18318 Rev 1 7/19

Electrical characteristics ST3DV520E

Table 11. Switching characteristics (TA = 25 °C, VCC = 3.3 V ±10%)

Val ue

Symbol Parameter Test condition

Min Typ Max

Unit

t

t

PZH

t

PZL

t

PHZ

t

PLZ

Propagation delay VCC = 3 to 3.6 V - 0.25 - ns

PD

Line enable time,

,

SEL to x to x0 or x to x1VCC = 3 to 3.6 V 0.5 6.5 15 ns

Line disable time,

,

SEL to x to x0 or x to x1VCC = 3 to 3.6 V 0.5 6.5 8.5 ns

Output skew

t

SK(O)

between center port

VCC = 3 to 3.6 V - 0.1 0.2 ns

to any other port

Skew between

t

SK(P)

opposite transition of
the same output

, t

PLH

)

(t

PHL

V

CC

Table 12. ESD performance

Symbol Test condition

Contact discharge
IEC61000-4-2

ESD

Human body model
(MIL-STD-883)

(1)

= 3 to 3.6 V - 0.1 0.2 ns

Val ue

Unit

Min Typ Max

-±8-kV

-±15-kV

1. Refer to Figure 3: Diagram for suggested VDD decoupling on page 9.

8/19 Doc ID 18318 Rev 1

ST3DV520E Electrical characteristics

Figure 3. Diagram for suggested VDD decoupling

VDD

GND

GND

GND

1

VDD

4

GND

6

GND

9

DUT

10

21 24 27 28

GND

GND

C=2uF or

4.7uF

VDD

GND

13

GND

16

VDD

18

Note: 100nF Capacitors must be used as local bypass capacitors between the adjacent VDD and GND pairs (t otal 7)

1. Applicable for system level ESD test

Figure 4. Test circuit for leakage current (I

VDD

VDD

OFF

GND

4950535556

44

39
38

33

GND

)

GND

GND
VDD

GND

11

Doc ID 18318 Rev 1 9/19

Electrical characteristics ST3DV520E

Figure 5. Test circuit for SEL pin input capacitance (CIN)

1, 21, 2

Figure 6. Test circuit for switch off capacitance (C

11

OFF

)

10/19 Doc ID 18318 Rev 1

ST3DV520E Electrical characteristics

Figure 7. Test circuit for switch on capacitance (CON)

11

Figure 8. Test circuit for bandwidth measurement (BW)

1. CL includes proble and jig capacitance.

Doc ID 18318 Rev 1 11/19

A

A0

(See Note 1)

Electrical characteristics ST3DV520E

Frequency response is measured at the output of the ON channel. For example, when
V

= 0 and A is the input, the output is measured at A0. All unused analog I/O ports are

SEL1

left open.

HP8753ES setup:

Average = 4

R

= 3 kHz

BW

V

= 0.35 V

BIAS

ST = 2 s

P1 = 0 dBm

Figure 9. Test circuit for crosstalk measurement (x

A

B

C

talk

A0

B0

A1

B1

D0

)

D

SEL1 D1

1. CL includes proble and jig capacitance.

2. A 50 Ω termination resistor is needed to match the loading of the network analyzer.

12/19 Doc ID 18318 Rev 1

C1

AM08683V1

ST3DV520E Electrical characteristics

Crosstalk is measured at the output of the non-adjacent ON channel. For example, when
V

= 0, and B is the input, the output is measured at D. All unused analog input ports are

SEL1

connected to GND and output ports are left open.

HP8753ES setup:

Average = 4

R

= 3 kHz

BW

V

= 0.35 V

BIAS

ST = 2 s

P1 = 0 dBm

Figure 10. Test circuit for off isolation measurement (O

A

B

1

A0

B0

A1

B1

Off isolation is measured at the output of the OFF channel. For example, when V

IRR

)

SEL1

and B is the input, the output is measured at B1. All unused analog input ports are
connected to GND and output ports are left open.

=0,

HP8753ES setup:

Average = 4

R

= 3 kHz

BW

V

= 0.35 V

BIAS

ST = 2 s

P1 = 0 dBm

Doc ID 18318 Rev 1 13/19

Package mechanical data ST3DV520E

4 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK

®

packages, depending on their level of environmental compliance. ECOPACK®

®

is an ST trademark.

Figure 11. Package outline for QFN56 (11 x 5 mm) pit ch 0.5 mm

14/19 Doc ID 18318 Rev 1

7576329-A

ST3DV520E Package mechanical data

Table 13. Mechanical data for QFN56 (11 x 5 mm) pitch 0.5 mm

Millimeters

Symbol

Min Typ Max

A 0.700.750.80

A1 – – 0.05

A3 –0.20–

b 0.200.250.30

D 10.90 11.00 11.10

D2 8.30 8.40 8.50

D3 –9.50–

E 4.905.005.10

E2 2.30 2.40 2.50

E3 –3.50–

e – 0.50 –

L 0.300.400.50

Figure 12. Footprint recommendation for QFN56 (11 x 5 mm) pitch 0.5 mm

Doc ID 18318 Rev 1 15/19

Package mechanical data ST3DV520E

Figure 13. Carrier tape information for QFN56 (11 x 5 mm) pitch 0.5 mm

7875978_K

16/19 Doc ID 18318 Rev 1

ST3DV520E Package mechanical data

Figure 14. Reel information for QFN56 (11 x 5 mm) pitch 0.5 mm

Doc ID 18318 Rev 1 17/19

Revision history ST3DV520E

5 Revision history

Table 14. Document revision history

Date Revision Changes

08-Dec-2010 1 Initial release.

18/19 Doc ID 18318 Rev 1

ST3DV520E

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Doc ID 18318 Rev 1 19/19